* [igt-dev] [PATCH i-g-t 02/10] tools/intel_watermark: Don't do intel_register_access_fini() too early on hsw/bdw
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 8:14 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 03/10] tools/intel_watermark: Add missing newline Ville Syrjala
` (10 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The tool will segfault if we try to the WM_DBG read/write after
intel_register_access_fini(). So move intel_register_access_fini()
to the very end.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 1818d79d0bee..d61379c6dc7f 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -644,8 +644,6 @@ static void ilk_wm_dump(void)
if (IS_BROADWELL(devid) || IS_HASWELL(devid))
wm_misc = read_reg(0x45260);
- intel_register_access_fini(&mmio_data);
-
for (i = 0; i < num_pipes; i++)
printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
@@ -765,6 +763,8 @@ static void ilk_wm_dump(void)
/* clear the sticky bits */
write_reg(0x45280, wm_dbg);
}
+
+ intel_register_access_fini(&mmio_data);
}
static void vlv_wm_dump(void)
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 02/10] tools/intel_watermark: Don't do intel_register_access_fini() too early on hsw/bdw
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 02/10] tools/intel_watermark: Don't do intel_register_access_fini() too early on hsw/bdw Ville Syrjala
@ 2023-02-06 8:14 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 8:14 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The tool will segfault if we try to the WM_DBG read/write after
> intel_register_access_fini(). So move intel_register_access_fini()
> to the very end.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> tools/intel_watermark.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 1818d79d0bee..d61379c6dc7f 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -644,8 +644,6 @@ static void ilk_wm_dump(void)
> if (IS_BROADWELL(devid) || IS_HASWELL(devid))
> wm_misc = read_reg(0x45260);
>
> - intel_register_access_fini(&mmio_data);
> -
> for (i = 0; i < num_pipes; i++)
> printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
> if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> @@ -765,6 +763,8 @@ static void ilk_wm_dump(void)
> /* clear the sticky bits */
> write_reg(0x45280, wm_dbg);
> }
> +
> + intel_register_access_fini(&mmio_data);
> }
>
> static void vlv_wm_dump(void)
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 03/10] tools/intel_watermark: Add missing newline
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 02/10] tools/intel_watermark: Don't do intel_register_access_fini() too early on hsw/bdw Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 8:15 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 04/10] tools/intel_watermark: Read LP usage from FPGA_DBG on ivb Ville Syrjala
` (9 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The hsw/bdw WM_DBG output is missing a newline at the end, add one.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index d61379c6dc7f..863261e823a5 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -760,6 +760,7 @@ static void ilk_wm_dump(void)
if (wm_dbg & (1 << (23+i)))
printf(" LP%d", i);
}
+ printf("\n");
/* clear the sticky bits */
write_reg(0x45280, wm_dbg);
}
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 03/10] tools/intel_watermark: Add missing newline
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 03/10] tools/intel_watermark: Add missing newline Ville Syrjala
@ 2023-02-06 8:15 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 8:15 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The hsw/bdw WM_DBG output is missing a newline at the end, add one.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> tools/intel_watermark.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index d61379c6dc7f..863261e823a5 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -760,6 +760,7 @@ static void ilk_wm_dump(void)
> if (wm_dbg & (1 << (23+i)))
> printf(" LP%d", i);
> }
> + printf("\n");
> /* clear the sticky bits */
> write_reg(0x45280, wm_dbg);
> }
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 04/10] tools/intel_watermark: Read LP usage from FPGA_DBG on ivb
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 02/10] tools/intel_watermark: Don't do intel_register_access_fini() too early on hsw/bdw Ville Syrjala
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 03/10] tools/intel_watermark: Add missing newline Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 11:43 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 05/10] tools/intel_watermark: Extract is_cursor() Ville Syrjala
` (8 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
On ivb FPGA_DBG contains the similar LP level sticky bits that
are present in WM_DBG on hsw+. Let's dump these out.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 863261e823a5..eac40e4a5d17 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -763,6 +763,22 @@ static void ilk_wm_dump(void)
printf("\n");
/* clear the sticky bits */
write_reg(0x45280, wm_dbg);
+ } else if (IS_IVYBRIDGE(devid)) {
+ uint32_t fpga_dbg;
+
+ fpga_dbg = read_reg(0x42300);
+ printf("FPGA_DBG: 0x%08x\n", fpga_dbg);
+ printf(" LP used:");
+ if (fpga_dbg & (1 << 18))
+ printf(" LP0.5");
+ for (i = 1; i < 4; i++) {
+ if (fpga_dbg & (1 << (18+i)))
+ printf(" LP%d", i);
+ }
+ printf("\n");
+ /* clear the sticky LP bits */
+ fpga_dbg &= 1 << 21 | 1 << 20 | 1 << 19 | 1 << 18;
+ write_reg(0x42300, fpga_dbg);
}
intel_register_access_fini(&mmio_data);
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 04/10] tools/intel_watermark: Read LP usage from FPGA_DBG on ivb
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 04/10] tools/intel_watermark: Read LP usage from FPGA_DBG on ivb Ville Syrjala
@ 2023-02-06 11:43 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 11:43 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On ivb FPGA_DBG contains the similar LP level sticky bits that
> are present in WM_DBG on hsw+. Let's dump these out.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> tools/intel_watermark.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 863261e823a5..eac40e4a5d17 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -763,6 +763,22 @@ static void ilk_wm_dump(void)
> printf("\n");
> /* clear the sticky bits */
> write_reg(0x45280, wm_dbg);
> + } else if (IS_IVYBRIDGE(devid)) {
> + uint32_t fpga_dbg;
> +
> + fpga_dbg = read_reg(0x42300);
> + printf("FPGA_DBG: 0x%08x\n", fpga_dbg);
> + printf(" LP used:");
> + if (fpga_dbg & (1 << 18))
> + printf(" LP0.5");
> + for (i = 1; i < 4; i++) {
> + if (fpga_dbg & (1 << (18+i)))
> + printf(" LP%d", i);
> + }
> + printf("\n");
> + /* clear the sticky LP bits */
> + fpga_dbg &= 1 << 21 | 1 << 20 | 1 << 19 | 1 << 18;
> + write_reg(0x42300, fpga_dbg);
> }
>
> intel_register_access_fini(&mmio_data);
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 05/10] tools/intel_watermark: Extract is_cursor()
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (2 preceding siblings ...)
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 04/10] tools/intel_watermark: Read LP usage from FPGA_DBG on ivb Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 8:37 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 06/10] tools/intel_watermark: Decode plane enable bits for ilk-bdw Ville Syrjala
` (7 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make the code a bit less magical by pulling the
"is this plane cursor?" check into helper.
v2: One more
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 25 +++++++++++++++----------
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index eac40e4a5d17..19372db4506b 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -131,6 +131,11 @@ static char endis_ast(bool enabled)
return enabled ? '*' : ' ';
}
+static bool is_cursor(int plane)
+{
+ return plane == 0;
+}
+
static int skl_num_pipes(uint32_t d)
{
return intel_gen(d) >= 12 ? 4 : 3;
@@ -183,7 +188,7 @@ static const char *skl_plane_name(int plane)
{
static char name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(name, sizeof(name), "CURSOR");
else
snprintf(name, sizeof(name), "PLANE_%1d", plane);
@@ -204,7 +209,7 @@ static const char *skl_plane_ctl_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_CTL");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_CTL_%1d", plane);
@@ -216,7 +221,7 @@ static const char *skl_wm_reg_name(int plane, int level)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_%1d", level);
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_%1d_%1d", plane, level);
@@ -228,7 +233,7 @@ static const char *skl_wm_trans_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_TRANS_%1d", plane);
@@ -240,7 +245,7 @@ static const char *skl_wm_sagv_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_SAGV");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_SAGV_%1d", plane);
@@ -252,7 +257,7 @@ static const char *skl_wm_sagv_trans_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_SAGV_TRANS");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_SAGV_TRANS_%1d", plane);
@@ -264,7 +269,7 @@ static const char *skl_buf_cfg_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_BUF_CFG_%1d", plane);
@@ -328,7 +333,7 @@ static void skl_wm_dump(void)
plane_ctl[pipe][plane] = read_reg(addr + 0x80);
wm_trans[pipe][plane] = read_reg(addr + 0x00168);
buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
- if (plane != 0 && intel_gen(devid) < 11)
+ if (!is_cursor(plane) && intel_gen(devid) < 11)
nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);
else
nv12_buf_cfg[pipe][plane] = 0;
@@ -431,7 +436,7 @@ static void skl_wm_dump(void)
if (intel_gen(devid) >= 11)
continue;
- if (plane == 0)
+ if (is_cursor(plane))
continue;
printf("%21s\t", skl_nv12_buf_cfg_reg_name(plane));
@@ -458,7 +463,7 @@ static void skl_wm_dump(void)
printf(" LEVEL");
for (plane = 0; plane < num_planes; plane++) {
- if (plane == 0)
+ if (is_cursor(plane))
enable = REG_DECODE1(plane_ctl[pipe][plane], 0, 3) ||
REG_DECODE1(plane_ctl[pipe][plane], 5, 1);
else
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 05/10] tools/intel_watermark: Extract is_cursor()
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 05/10] tools/intel_watermark: Extract is_cursor() Ville Syrjala
@ 2023-02-06 8:37 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 8:37 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make the code a bit less magical by pulling the
> "is this plane cursor?" check into helper.
>
> v2: One more
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> tools/intel_watermark.c | 25 +++++++++++++++----------
> 1 file changed, 15 insertions(+), 10 deletions(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index eac40e4a5d17..19372db4506b 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -131,6 +131,11 @@ static char endis_ast(bool enabled)
> return enabled ? '*' : ' ';
> }
>
> +static bool is_cursor(int plane)
> +{
> + return plane == 0;
> +}
> +
> static int skl_num_pipes(uint32_t d)
> {
> return intel_gen(d) >= 12 ? 4 : 3;
> @@ -183,7 +188,7 @@ static const char *skl_plane_name(int plane)
> {
> static char name[32];
>
> - if (plane == 0)
> + if (is_cursor(plane))
> snprintf(name, sizeof(name), "CURSOR");
> else
> snprintf(name, sizeof(name), "PLANE_%1d", plane);
> @@ -204,7 +209,7 @@ static const char *skl_plane_ctl_reg_name(int plane)
> {
> static char reg_name[32];
>
> - if (plane == 0)
> + if (is_cursor(plane))
> snprintf(reg_name, sizeof(reg_name), "CUR_CTL");
> else
> snprintf(reg_name, sizeof(reg_name), "PLANE_CTL_%1d", plane);
> @@ -216,7 +221,7 @@ static const char *skl_wm_reg_name(int plane, int level)
> {
> static char reg_name[32];
>
> - if (plane == 0)
> + if (is_cursor(plane))
> snprintf(reg_name, sizeof(reg_name), "CUR_WM_%1d", level);
> else
> snprintf(reg_name, sizeof(reg_name), "PLANE_WM_%1d_%1d", plane, level);
> @@ -228,7 +233,7 @@ static const char *skl_wm_trans_reg_name(int plane)
> {
> static char reg_name[32];
>
> - if (plane == 0)
> + if (is_cursor(plane))
> snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS");
> else
> snprintf(reg_name, sizeof(reg_name), "PLANE_WM_TRANS_%1d", plane);
> @@ -240,7 +245,7 @@ static const char *skl_wm_sagv_reg_name(int plane)
> {
> static char reg_name[32];
>
> - if (plane == 0)
> + if (is_cursor(plane))
> snprintf(reg_name, sizeof(reg_name), "CUR_WM_SAGV");
> else
> snprintf(reg_name, sizeof(reg_name), "PLANE_WM_SAGV_%1d", plane);
> @@ -252,7 +257,7 @@ static const char *skl_wm_sagv_trans_reg_name(int plane)
> {
> static char reg_name[32];
>
> - if (plane == 0)
> + if (is_cursor(plane))
> snprintf(reg_name, sizeof(reg_name), "CUR_WM_SAGV_TRANS");
> else
> snprintf(reg_name, sizeof(reg_name), "PLANE_WM_SAGV_TRANS_%1d", plane);
> @@ -264,7 +269,7 @@ static const char *skl_buf_cfg_reg_name(int plane)
> {
> static char reg_name[32];
>
> - if (plane == 0)
> + if (is_cursor(plane))
> snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG");
> else
> snprintf(reg_name, sizeof(reg_name), "PLANE_BUF_CFG_%1d", plane);
> @@ -328,7 +333,7 @@ static void skl_wm_dump(void)
> plane_ctl[pipe][plane] = read_reg(addr + 0x80);
> wm_trans[pipe][plane] = read_reg(addr + 0x00168);
> buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
> - if (plane != 0 && intel_gen(devid) < 11)
> + if (!is_cursor(plane) && intel_gen(devid) < 11)
> nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);
> else
> nv12_buf_cfg[pipe][plane] = 0;
> @@ -431,7 +436,7 @@ static void skl_wm_dump(void)
> if (intel_gen(devid) >= 11)
> continue;
>
> - if (plane == 0)
> + if (is_cursor(plane))
> continue;
>
> printf("%21s\t", skl_nv12_buf_cfg_reg_name(plane));
> @@ -458,7 +463,7 @@ static void skl_wm_dump(void)
>
> printf(" LEVEL");
> for (plane = 0; plane < num_planes; plane++) {
> - if (plane == 0)
> + if (is_cursor(plane))
> enable = REG_DECODE1(plane_ctl[pipe][plane], 0, 3) ||
> REG_DECODE1(plane_ctl[pipe][plane], 5, 1);
> else
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 06/10] tools/intel_watermark: Decode plane enable bits for ilk-bdw
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (3 preceding siblings ...)
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 05/10] tools/intel_watermark: Extract is_cursor() Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 8:53 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 07/10] tools/intel_watermark: Dump all ARB_CTL registers on skl+ Ville Syrjala
` (6 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Knowing which planes are actually enabled is somewhat relevant
when debugging watermarks. Dump that information.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 60 ++++++++++++++++++++++++++++++-----------
1 file changed, 45 insertions(+), 15 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 19372db4506b..66e76e0dd3ef 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -93,10 +93,13 @@ static const char * const plane_name[] = {
NAME(SPR_F),
};
+struct ilk_plane {
+ bool enabled, trickle_feed_dis;
+};
+
struct ilk_wm_level {
int primary, sprite, cursor, latency, fbc;
bool enabled, sprite_enabled;
- bool primary_trickle_feed_dis, sprite_trickle_feed_dis;
};
struct ilk_wm {
@@ -604,13 +607,15 @@ static void ilk_wm_dump(void)
struct intel_mmio_data mmio_data;
int i;
uint32_t dspcntr[3];
- uint32_t spcntr[3];
+ uint32_t sprcntr[3];
+ uint32_t curcntr[3];
uint32_t wm_pipe[3];
uint32_t wm_linetime[3];
uint32_t wm_lp[3];
uint32_t wm_lp_spr[3];
uint32_t arb_ctl, arb_ctl2, wm_misc = 0;
int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
+ struct ilk_plane primary[3] = {}, sprite[3] = {}, cursor[3] = {};
struct ilk_wm wm = {};
intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
@@ -618,9 +623,13 @@ static void ilk_wm_dump(void)
for (i = 0; i < num_pipes; i++) {
dspcntr[i] = read_reg(0x70180 + i * 0x1000);
if (intel_gen(devid) >= 7)
- spcntr[i] = read_reg(0x70280 + i * 0x1000);
+ sprcntr[i] = read_reg(0x70280 + i * 0x1000);
else
- spcntr[i] = read_reg(0x72180 + i * 0x1000);
+ sprcntr[i] = read_reg(0x72180 + i * 0x1000);
+ if (intel_gen(devid) >= 7)
+ curcntr[i] = read_reg(0x70080 + i * 0x1000);
+ else
+ curcntr[i] = read_reg(0x70080 + i * 0x40);
}
wm_pipe[0] = read_reg(0x45100);
@@ -649,6 +658,12 @@ static void ilk_wm_dump(void)
if (IS_BROADWELL(devid) || IS_HASWELL(devid))
wm_misc = read_reg(0x45260);
+ for (i = 0; i < num_pipes; i++) {
+ printf(" DSPCNTR_%c = 0x%08x\n", pipe_name(i), dspcntr[i]);
+ printf(" SPRCNTR_%c = 0x%08x\n", pipe_name(i), sprcntr[i]);
+ printf(" CURCNTR_%c = 0x%08x\n", pipe_name(i), curcntr[i]);
+ }
+
for (i = 0; i < num_pipes; i++)
printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
@@ -668,6 +683,21 @@ static void ilk_wm_dump(void)
if (IS_BROADWELL(devid) || IS_HASWELL(devid))
printf(" WM_MISC = 0x%08x\n", wm_misc);
+ for (i = 0 ; i < num_pipes; i++) {
+ primary[i].enabled = REG_DECODE1(dspcntr[i], 31, 1);
+ sprite[i].enabled = REG_DECODE1(sprcntr[i], 31, 1);
+ cursor[i].enabled = REG_DECODE1(curcntr[i], 0, 3) ||
+ REG_DECODE1(curcntr[i], 5, 1);
+
+ primary[i].trickle_feed_dis = REG_DECODE1(dspcntr[i], 14, 1);
+
+ if (IS_GEN5(devid))
+ continue;
+
+ sprite[i].trickle_feed_dis = REG_DECODE1(sprcntr[i], 14, 1);
+ cursor[i].trickle_feed_dis = REG_DECODE1(curcntr[i], 14, 1);
+ }
+
for (i = 0 ; i < num_pipes; i++) {
wm.pipe[i].primary = REG_DECODE1(wm_pipe[i], 16, 8);
wm.pipe[i].sprite = REG_DECODE1(wm_pipe[i], 8, 8);
@@ -677,12 +707,6 @@ static void ilk_wm_dump(void)
wm.linetime[i].linetime = REG_DECODE1(wm_linetime[i], 0, 9);
wm.linetime[i].ips = REG_DECODE1(wm_linetime[i], 16, 9);
}
-
- wm.pipe[i].primary_trickle_feed_dis =
- REG_DECODE1(dspcntr[i], 14, 1);
- if (!IS_GEN5(devid))
- wm.pipe[i].sprite_trickle_feed_dis =
- REG_DECODE1(spcntr[i], 14, 1);
}
for (i = 0; i < 3; i++) {
@@ -733,11 +757,17 @@ static void ilk_wm_dump(void)
}
}
for (i = 0; i < num_pipes; i++) {
- printf("Primary %c trickle feed = %s\n",
- pipe_name(i), endis(!wm.pipe[i].primary_trickle_feed_dis));
- if (!IS_GEN5(devid))
- printf("Sprite %c trickle feed = %s\n",
- pipe_name(i), endis(!wm.pipe[i].sprite_trickle_feed_dis));
+ printf("Primary %c: %s, trickle feed = %s\n",
+ pipe_name(i), endis(primary[i].enabled),
+ endis(!primary[i].trickle_feed_dis));
+ printf("Sprite %c: %s, trickle feed = %s\n",
+ pipe_name(i), endis(sprite[i].enabled),
+ IS_GEN5(devid) ? "n/a" :
+ endis(!sprite[i].trickle_feed_dis));
+ printf("Cursor %c: %s, trickle feed = %s\n",
+ pipe_name(i), endis(cursor[i].enabled),
+ IS_GEN5(devid) ? "n/a" :
+ endis(!cursor[i].trickle_feed_dis));
}
if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
printf("DDB partitioning = %s\n",
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 06/10] tools/intel_watermark: Decode plane enable bits for ilk-bdw
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 06/10] tools/intel_watermark: Decode plane enable bits for ilk-bdw Ville Syrjala
@ 2023-02-06 8:53 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 8:53 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Knowing which planes are actually enabled is somewhat relevant
> when debugging watermarks. Dump that information.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> tools/intel_watermark.c | 60 ++++++++++++++++++++++++++++++-----------
> 1 file changed, 45 insertions(+), 15 deletions(-)
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 19372db4506b..66e76e0dd3ef 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -93,10 +93,13 @@ static const char * const plane_name[] = {
> NAME(SPR_F),
> };
>
> +struct ilk_plane {
> + bool enabled, trickle_feed_dis;
> +};
> +
> struct ilk_wm_level {
> int primary, sprite, cursor, latency, fbc;
> bool enabled, sprite_enabled;
> - bool primary_trickle_feed_dis, sprite_trickle_feed_dis;
> };
>
> struct ilk_wm {
> @@ -604,13 +607,15 @@ static void ilk_wm_dump(void)
> struct intel_mmio_data mmio_data;
> int i;
> uint32_t dspcntr[3];
> - uint32_t spcntr[3];
> + uint32_t sprcntr[3];
> + uint32_t curcntr[3];
> uint32_t wm_pipe[3];
> uint32_t wm_linetime[3];
> uint32_t wm_lp[3];
> uint32_t wm_lp_spr[3];
> uint32_t arb_ctl, arb_ctl2, wm_misc = 0;
> int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
> + struct ilk_plane primary[3] = {}, sprite[3] = {}, cursor[3] = {};
> struct ilk_wm wm = {};
>
> intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> @@ -618,9 +623,13 @@ static void ilk_wm_dump(void)
> for (i = 0; i < num_pipes; i++) {
> dspcntr[i] = read_reg(0x70180 + i * 0x1000);
> if (intel_gen(devid) >= 7)
> - spcntr[i] = read_reg(0x70280 + i * 0x1000);
> + sprcntr[i] = read_reg(0x70280 + i * 0x1000);
> else
> - spcntr[i] = read_reg(0x72180 + i * 0x1000);
> + sprcntr[i] = read_reg(0x72180 + i * 0x1000);
> + if (intel_gen(devid) >= 7)
> + curcntr[i] = read_reg(0x70080 + i * 0x1000);
> + else
> + curcntr[i] = read_reg(0x70080 + i * 0x40);
> }
>
> wm_pipe[0] = read_reg(0x45100);
> @@ -649,6 +658,12 @@ static void ilk_wm_dump(void)
> if (IS_BROADWELL(devid) || IS_HASWELL(devid))
> wm_misc = read_reg(0x45260);
>
> + for (i = 0; i < num_pipes; i++) {
> + printf(" DSPCNTR_%c = 0x%08x\n", pipe_name(i), dspcntr[i]);
> + printf(" SPRCNTR_%c = 0x%08x\n", pipe_name(i), sprcntr[i]);
> + printf(" CURCNTR_%c = 0x%08x\n", pipe_name(i), curcntr[i]);
> + }
> +
> for (i = 0; i < num_pipes; i++)
> printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
> if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> @@ -668,6 +683,21 @@ static void ilk_wm_dump(void)
> if (IS_BROADWELL(devid) || IS_HASWELL(devid))
> printf(" WM_MISC = 0x%08x\n", wm_misc);
>
> + for (i = 0 ; i < num_pipes; i++) {
> + primary[i].enabled = REG_DECODE1(dspcntr[i], 31, 1);
> + sprite[i].enabled = REG_DECODE1(sprcntr[i], 31, 1);
> + cursor[i].enabled = REG_DECODE1(curcntr[i], 0, 3) ||
> + REG_DECODE1(curcntr[i], 5, 1);
> +
> + primary[i].trickle_feed_dis = REG_DECODE1(dspcntr[i], 14, 1);
> +
> + if (IS_GEN5(devid))
> + continue;
> +
> + sprite[i].trickle_feed_dis = REG_DECODE1(sprcntr[i], 14, 1);
> + cursor[i].trickle_feed_dis = REG_DECODE1(curcntr[i], 14, 1);
> + }
> +
> for (i = 0 ; i < num_pipes; i++) {
> wm.pipe[i].primary = REG_DECODE1(wm_pipe[i], 16, 8);
> wm.pipe[i].sprite = REG_DECODE1(wm_pipe[i], 8, 8);
> @@ -677,12 +707,6 @@ static void ilk_wm_dump(void)
> wm.linetime[i].linetime = REG_DECODE1(wm_linetime[i], 0, 9);
> wm.linetime[i].ips = REG_DECODE1(wm_linetime[i], 16, 9);
> }
> -
> - wm.pipe[i].primary_trickle_feed_dis =
> - REG_DECODE1(dspcntr[i], 14, 1);
> - if (!IS_GEN5(devid))
> - wm.pipe[i].sprite_trickle_feed_dis =
> - REG_DECODE1(spcntr[i], 14, 1);
> }
>
> for (i = 0; i < 3; i++) {
> @@ -733,11 +757,17 @@ static void ilk_wm_dump(void)
> }
> }
> for (i = 0; i < num_pipes; i++) {
> - printf("Primary %c trickle feed = %s\n",
> - pipe_name(i), endis(!wm.pipe[i].primary_trickle_feed_dis));
> - if (!IS_GEN5(devid))
> - printf("Sprite %c trickle feed = %s\n",
> - pipe_name(i), endis(!wm.pipe[i].sprite_trickle_feed_dis));
> + printf("Primary %c: %s, trickle feed = %s\n",
> + pipe_name(i), endis(primary[i].enabled),
> + endis(!primary[i].trickle_feed_dis));
> + printf("Sprite %c: %s, trickle feed = %s\n",
> + pipe_name(i), endis(sprite[i].enabled),
> + IS_GEN5(devid) ? "n/a" :
> + endis(!sprite[i].trickle_feed_dis));
> + printf("Cursor %c: %s, trickle feed = %s\n",
> + pipe_name(i), endis(cursor[i].enabled),
> + IS_GEN5(devid) ? "n/a" :
> + endis(!cursor[i].trickle_feed_dis));
> }
> if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> printf("DDB partitioning = %s\n",
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 07/10] tools/intel_watermark: Dump all ARB_CTL registers on skl+
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (4 preceding siblings ...)
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 06/10] tools/intel_watermark: Decode plane enable bits for ilk-bdw Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 11:26 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 08/10] tools/intel_watermark: Use intel_display_ver() Ville Syrjala
` (5 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Dump the ARB_CTL registers on all skl+ platforms as well,
and decode the "FBC watermark disable" and "IPC enable"
bits from therein. Those at least are relevant for the
watermark state.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 27 ++++++++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 66e76e0dd3ef..7e957f0c8e9a 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -321,10 +321,13 @@ static void skl_wm_dump(void)
uint32_t nv12_buf_cfg[num_pipes][max_planes];
uint32_t plane_ctl[num_pipes][max_planes];
uint32_t wm_linetime[num_pipes];
- uint32_t wm_dbg;
+ uint32_t arb_ctl, arb_ctl2, wm_dbg;
intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ arb_ctl = read_reg(0x45000);
+ arb_ctl2 = read_reg(0x45004);
+
for (pipe = 0; pipe < num_pipes; pipe++) {
int num_planes = skl_num_planes(devid, pipe);
@@ -453,6 +456,22 @@ static void skl_wm_dump(void)
}
printf("\n");
+ if (intel_gen(devid) >= 13) {
+ printf(" ARB_LP_CTL 0x%08x\n", arb_ctl);
+ printf(" ARB_HP_CTL 0x%08x\n", arb_ctl2);
+ } else if (intel_gen(devid) >= 12) {
+ printf(" ARB_CTL 0x%08x\n", arb_ctl);
+ printf(" ARB_CTL_ABOX1 0x%08x\n", read_reg(0x45800));
+ printf(" ARB_CTL_ABOX2 0x%08x\n", read_reg(0x45808));
+ printf(" ARB_CTL2 0x%08x\n", arb_ctl2);
+ printf(" ARB_CTL2_ABOX1 0x%08x\n", read_reg(0x45804));
+ printf(" ARB_CTL2_ABOX2 0x%08x\n", read_reg(0x4580c));
+ } else {
+ printf(" ARB_CTL 0x%08x\n", arb_ctl);
+ printf(" ARB_CTL2 0x%08x\n", arb_ctl2);
+ }
+ printf("\n");
+
for (pipe = 0; pipe < num_pipes; pipe++) {
uint32_t start, end, size;
uint32_t lines, blocks, enable;
@@ -583,6 +602,12 @@ static void skl_wm_dump(void)
printf("\n\n\n");
}
+ if (intel_gen(devid) < 13)
+ printf("FBC watermark: %s\n", endis(!REG_DECODE1(arb_ctl, 15, 1)));
+ printf("IPC: %s\n", endis(REG_DECODE1(arb_ctl2, 3, 1)));
+
+ printf("\n");
+
printf("* plane watermark enabled\n");
printf("(x) line watermark if enabled\n");
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 07/10] tools/intel_watermark: Dump all ARB_CTL registers on skl+
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 07/10] tools/intel_watermark: Dump all ARB_CTL registers on skl+ Ville Syrjala
@ 2023-02-06 11:26 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 11:26 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Dump the ARB_CTL registers on all skl+ platforms as well,
> and decode the "FBC watermark disable" and "IPC enable"
> bits from therein. Those at least are relevant for the
> watermark state.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> tools/intel_watermark.c | 27 ++++++++++++++++++++++++++-
> 1 file changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 66e76e0dd3ef..7e957f0c8e9a 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -321,10 +321,13 @@ static void skl_wm_dump(void)
> uint32_t nv12_buf_cfg[num_pipes][max_planes];
> uint32_t plane_ctl[num_pipes][max_planes];
> uint32_t wm_linetime[num_pipes];
> - uint32_t wm_dbg;
> + uint32_t arb_ctl, arb_ctl2, wm_dbg;
>
> intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
>
> + arb_ctl = read_reg(0x45000);
> + arb_ctl2 = read_reg(0x45004);
> +
> for (pipe = 0; pipe < num_pipes; pipe++) {
> int num_planes = skl_num_planes(devid, pipe);
>
> @@ -453,6 +456,22 @@ static void skl_wm_dump(void)
> }
> printf("\n");
>
> + if (intel_gen(devid) >= 13) {
> + printf(" ARB_LP_CTL 0x%08x\n", arb_ctl);
> + printf(" ARB_HP_CTL 0x%08x\n", arb_ctl2);
> + } else if (intel_gen(devid) >= 12) {
> + printf(" ARB_CTL 0x%08x\n", arb_ctl);
> + printf(" ARB_CTL_ABOX1 0x%08x\n", read_reg(0x45800));
> + printf(" ARB_CTL_ABOX2 0x%08x\n", read_reg(0x45808));
> + printf(" ARB_CTL2 0x%08x\n", arb_ctl2);
> + printf(" ARB_CTL2_ABOX1 0x%08x\n", read_reg(0x45804));
> + printf(" ARB_CTL2_ABOX2 0x%08x\n", read_reg(0x4580c));
> + } else {
> + printf(" ARB_CTL 0x%08x\n", arb_ctl);
> + printf(" ARB_CTL2 0x%08x\n", arb_ctl2);
> + }
> + printf("\n");
> +
> for (pipe = 0; pipe < num_pipes; pipe++) {
> uint32_t start, end, size;
> uint32_t lines, blocks, enable;
> @@ -583,6 +602,12 @@ static void skl_wm_dump(void)
> printf("\n\n\n");
> }
>
> + if (intel_gen(devid) < 13)
> + printf("FBC watermark: %s\n", endis(!REG_DECODE1(arb_ctl, 15, 1)));
> + printf("IPC: %s\n", endis(REG_DECODE1(arb_ctl2, 3, 1)));
> +
> + printf("\n");
> +
> printf("* plane watermark enabled\n");
> printf("(x) line watermark if enabled\n");
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 08/10] tools/intel_watermark: Use intel_display_ver()
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (5 preceding siblings ...)
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 07/10] tools/intel_watermark: Dump all ARB_CTL registers on skl+ Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 11:30 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 09/10] tools/intel_watermark: Introduce skl_has_nv12_buf_cfg() Ville Syrjala
` (4 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_gen() is no longer useful for determining the display IP
version, switch over to intel_display_ver().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 42 ++++++++++++++++++++---------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 7e957f0c8e9a..7991e80ac876 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -141,12 +141,12 @@ static bool is_cursor(int plane)
static int skl_num_pipes(uint32_t d)
{
- return intel_gen(d) >= 12 ? 4 : 3;
+ return intel_display_ver(d) >= 12 ? 4 : 3;
}
static int skl_num_planes(uint32_t d, int pipe)
{
- int gen = intel_gen(d);
+ int gen = intel_display_ver(d);
if (gen >= 13 || IS_ALDERLAKE_S(d) || IS_ROCKETLAKE(d))
return 6;
@@ -162,7 +162,7 @@ static int skl_num_planes(uint32_t d, int pipe)
static int skl_max_planes(uint32_t d)
{
- int gen = intel_gen(d);
+ int gen = intel_display_ver(d);
if (gen >= 13 || IS_ALDERLAKE_S(d) || IS_ROCKETLAKE(d))
return 6;
@@ -176,7 +176,7 @@ static int skl_max_planes(uint32_t d)
static bool skl_has_sagv_wm(uint32_t d)
{
- return intel_gen(d) >= 13;
+ return intel_display_ver(d) >= 13;
}
static int skl_num_wm_levels(uint32_t d)
@@ -339,7 +339,7 @@ static void skl_wm_dump(void)
plane_ctl[pipe][plane] = read_reg(addr + 0x80);
wm_trans[pipe][plane] = read_reg(addr + 0x00168);
buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
- if (!is_cursor(plane) && intel_gen(devid) < 11)
+ if (!is_cursor(plane) && intel_display_ver(devid) < 11)
nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);
else
nv12_buf_cfg[pipe][plane] = 0;
@@ -439,7 +439,7 @@ static void skl_wm_dump(void)
}
printf("\n");
- if (intel_gen(devid) >= 11)
+ if (intel_display_ver(devid) >= 11)
continue;
if (is_cursor(plane))
@@ -456,10 +456,10 @@ static void skl_wm_dump(void)
}
printf("\n");
- if (intel_gen(devid) >= 13) {
+ if (intel_display_ver(devid) >= 13) {
printf(" ARB_LP_CTL 0x%08x\n", arb_ctl);
printf(" ARB_HP_CTL 0x%08x\n", arb_ctl2);
- } else if (intel_gen(devid) >= 12) {
+ } else if (intel_display_ver(devid) >= 12) {
printf(" ARB_CTL 0x%08x\n", arb_ctl);
printf(" ARB_CTL_ABOX1 0x%08x\n", read_reg(0x45800));
printf(" ARB_CTL_ABOX2 0x%08x\n", read_reg(0x45808));
@@ -575,7 +575,7 @@ static void skl_wm_dump(void)
}
printf("\n");
- if (intel_gen(devid) < 11) {
+ if (intel_display_ver(devid) < 11) {
printf("\nNV12 DDB allocation:");
printf("\nstart");
@@ -602,7 +602,7 @@ static void skl_wm_dump(void)
printf("\n\n\n");
}
- if (intel_gen(devid) < 13)
+ if (intel_display_ver(devid) < 13)
printf("FBC watermark: %s\n", endis(!REG_DECODE1(arb_ctl, 15, 1)));
printf("IPC: %s\n", endis(REG_DECODE1(arb_ctl2, 3, 1)));
@@ -639,7 +639,7 @@ static void ilk_wm_dump(void)
uint32_t wm_lp[3];
uint32_t wm_lp_spr[3];
uint32_t arb_ctl, arb_ctl2, wm_misc = 0;
- int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
+ int num_pipes = intel_display_ver(devid) >= 7 ? 3 : 2;
struct ilk_plane primary[3] = {}, sprite[3] = {}, cursor[3] = {};
struct ilk_wm wm = {};
@@ -647,11 +647,11 @@ static void ilk_wm_dump(void)
for (i = 0; i < num_pipes; i++) {
dspcntr[i] = read_reg(0x70180 + i * 0x1000);
- if (intel_gen(devid) >= 7)
+ if (intel_display_ver(devid) >= 7)
sprcntr[i] = read_reg(0x70280 + i * 0x1000);
else
sprcntr[i] = read_reg(0x72180 + i * 0x1000);
- if (intel_gen(devid) >= 7)
+ if (intel_display_ver(devid) >= 7)
curcntr[i] = read_reg(0x70080 + i * 0x1000);
else
curcntr[i] = read_reg(0x70080 + i * 0x40);
@@ -673,7 +673,7 @@ static void ilk_wm_dump(void)
wm_lp[2] = read_reg(0x45110);
wm_lp_spr[0] = read_reg(0x45120);
- if (intel_gen(devid) >= 7) {
+ if (intel_display_ver(devid) >= 7) {
wm_lp_spr[1] = read_reg(0x45124);
wm_lp_spr[2] = read_reg(0x45128);
}
@@ -699,7 +699,7 @@ static void ilk_wm_dump(void)
printf(" WM_LP2 = 0x%08x\n", wm_lp[1]);
printf(" WM_LP3 = 0x%08x\n", wm_lp[2]);
printf(" WM_LP1_SPR = 0x%08x\n", wm_lp_spr[0]);
- if (intel_gen(devid) >= 7) {
+ if (intel_display_ver(devid) >= 7) {
printf(" WM_LP2_SPR = 0x%08x\n", wm_lp_spr[1]);
printf(" WM_LP3_SPR = 0x%08x\n", wm_lp_spr[2]);
}
@@ -744,8 +744,8 @@ static void ilk_wm_dump(void)
wm.lp[i].primary = REG_DECODE1(wm_lp[i], 8, 11);
wm.lp[i].cursor = REG_DECODE1(wm_lp[i], 0, 8);
- if (i == 0 || intel_gen(devid) >= 7) {
- if (intel_gen(devid) < 7)
+ if (i == 0 || intel_display_ver(devid) >= 7) {
+ if (intel_display_ver(devid) < 7)
wm.lp[i].sprite_enabled = REG_DECODE1(wm_lp_spr[i], 31, 1);
wm.lp[i].sprite = REG_DECODE1(wm_lp_spr[i], 0, 11);
}
@@ -763,7 +763,7 @@ static void ilk_wm_dump(void)
wm.linetime[i].ips, wm.linetime[i].ips * 0.125f);
}
}
- if (intel_gen(devid) >= 7) {
+ if (intel_display_ver(devid) >= 7) {
for (i = 0; i < 3; i++) {
printf("WM_LP%d: %s, latency=%d, fbc=%d, primary=%d, cursor=%d, sprite=%d\n",
i + 1, endis(wm.lp[i].enabled), wm.lp[i].latency, wm.lp[i].fbc,
@@ -797,7 +797,7 @@ static void ilk_wm_dump(void)
if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
printf("DDB partitioning = %s\n",
REG_DECODE1(wm_misc, 0, 1) ? "5/6" : "1/2");
- } else if (intel_gen(devid) >= 7) {
+ } else if (intel_display_ver(devid) >= 7) {
printf("DDB partitioning = %s\n",
REG_DECODE1(arb_ctl2, 6, 1) ? "5/6" : "1/2");
}
@@ -1498,12 +1498,12 @@ int main(int argc, char *argv[])
}
}
- if (intel_gen(devid) >= 9) {
+ if (intel_display_ver(devid) >= 9) {
skl_wm_dump();
} else if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) {
display_base = 0x180000;
vlv_wm_dump();
- } else if (intel_gen(devid) >= 5) {
+ } else if (intel_display_ver(devid) >= 5) {
ilk_wm_dump();
} else if (IS_G4X(devid)) {
g4x_wm_dump();
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 08/10] tools/intel_watermark: Use intel_display_ver()
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 08/10] tools/intel_watermark: Use intel_display_ver() Ville Syrjala
@ 2023-02-06 11:30 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 11:30 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_gen() is no longer useful for determining the display IP
> version, switch over to intel_display_ver().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> tools/intel_watermark.c | 42 ++++++++++++++++++++---------------------
> 1 file changed, 21 insertions(+), 21 deletions(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 7e957f0c8e9a..7991e80ac876 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -141,12 +141,12 @@ static bool is_cursor(int plane)
>
> static int skl_num_pipes(uint32_t d)
> {
> - return intel_gen(d) >= 12 ? 4 : 3;
> + return intel_display_ver(d) >= 12 ? 4 : 3;
> }
>
> static int skl_num_planes(uint32_t d, int pipe)
> {
> - int gen = intel_gen(d);
> + int gen = intel_display_ver(d);
>
> if (gen >= 13 || IS_ALDERLAKE_S(d) || IS_ROCKETLAKE(d))
> return 6;
> @@ -162,7 +162,7 @@ static int skl_num_planes(uint32_t d, int pipe)
>
> static int skl_max_planes(uint32_t d)
> {
> - int gen = intel_gen(d);
> + int gen = intel_display_ver(d);
>
> if (gen >= 13 || IS_ALDERLAKE_S(d) || IS_ROCKETLAKE(d))
> return 6;
> @@ -176,7 +176,7 @@ static int skl_max_planes(uint32_t d)
>
> static bool skl_has_sagv_wm(uint32_t d)
> {
> - return intel_gen(d) >= 13;
> + return intel_display_ver(d) >= 13;
> }
>
> static int skl_num_wm_levels(uint32_t d)
> @@ -339,7 +339,7 @@ static void skl_wm_dump(void)
> plane_ctl[pipe][plane] = read_reg(addr + 0x80);
> wm_trans[pipe][plane] = read_reg(addr + 0x00168);
> buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
> - if (!is_cursor(plane) && intel_gen(devid) < 11)
> + if (!is_cursor(plane) && intel_display_ver(devid) < 11)
> nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);
> else
> nv12_buf_cfg[pipe][plane] = 0;
> @@ -439,7 +439,7 @@ static void skl_wm_dump(void)
> }
> printf("\n");
>
> - if (intel_gen(devid) >= 11)
> + if (intel_display_ver(devid) >= 11)
> continue;
>
> if (is_cursor(plane))
> @@ -456,10 +456,10 @@ static void skl_wm_dump(void)
> }
> printf("\n");
>
> - if (intel_gen(devid) >= 13) {
> + if (intel_display_ver(devid) >= 13) {
> printf(" ARB_LP_CTL 0x%08x\n", arb_ctl);
> printf(" ARB_HP_CTL 0x%08x\n", arb_ctl2);
> - } else if (intel_gen(devid) >= 12) {
> + } else if (intel_display_ver(devid) >= 12) {
> printf(" ARB_CTL 0x%08x\n", arb_ctl);
> printf(" ARB_CTL_ABOX1 0x%08x\n", read_reg(0x45800));
> printf(" ARB_CTL_ABOX2 0x%08x\n", read_reg(0x45808));
> @@ -575,7 +575,7 @@ static void skl_wm_dump(void)
> }
> printf("\n");
>
> - if (intel_gen(devid) < 11) {
> + if (intel_display_ver(devid) < 11) {
> printf("\nNV12 DDB allocation:");
>
> printf("\nstart");
> @@ -602,7 +602,7 @@ static void skl_wm_dump(void)
> printf("\n\n\n");
> }
>
> - if (intel_gen(devid) < 13)
> + if (intel_display_ver(devid) < 13)
> printf("FBC watermark: %s\n", endis(!REG_DECODE1(arb_ctl, 15, 1)));
> printf("IPC: %s\n", endis(REG_DECODE1(arb_ctl2, 3, 1)));
>
> @@ -639,7 +639,7 @@ static void ilk_wm_dump(void)
> uint32_t wm_lp[3];
> uint32_t wm_lp_spr[3];
> uint32_t arb_ctl, arb_ctl2, wm_misc = 0;
> - int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
> + int num_pipes = intel_display_ver(devid) >= 7 ? 3 : 2;
> struct ilk_plane primary[3] = {}, sprite[3] = {}, cursor[3] = {};
> struct ilk_wm wm = {};
>
> @@ -647,11 +647,11 @@ static void ilk_wm_dump(void)
>
> for (i = 0; i < num_pipes; i++) {
> dspcntr[i] = read_reg(0x70180 + i * 0x1000);
> - if (intel_gen(devid) >= 7)
> + if (intel_display_ver(devid) >= 7)
> sprcntr[i] = read_reg(0x70280 + i * 0x1000);
> else
> sprcntr[i] = read_reg(0x72180 + i * 0x1000);
> - if (intel_gen(devid) >= 7)
> + if (intel_display_ver(devid) >= 7)
> curcntr[i] = read_reg(0x70080 + i * 0x1000);
> else
> curcntr[i] = read_reg(0x70080 + i * 0x40);
> @@ -673,7 +673,7 @@ static void ilk_wm_dump(void)
> wm_lp[2] = read_reg(0x45110);
>
> wm_lp_spr[0] = read_reg(0x45120);
> - if (intel_gen(devid) >= 7) {
> + if (intel_display_ver(devid) >= 7) {
> wm_lp_spr[1] = read_reg(0x45124);
> wm_lp_spr[2] = read_reg(0x45128);
> }
> @@ -699,7 +699,7 @@ static void ilk_wm_dump(void)
> printf(" WM_LP2 = 0x%08x\n", wm_lp[1]);
> printf(" WM_LP3 = 0x%08x\n", wm_lp[2]);
> printf(" WM_LP1_SPR = 0x%08x\n", wm_lp_spr[0]);
> - if (intel_gen(devid) >= 7) {
> + if (intel_display_ver(devid) >= 7) {
> printf(" WM_LP2_SPR = 0x%08x\n", wm_lp_spr[1]);
> printf(" WM_LP3_SPR = 0x%08x\n", wm_lp_spr[2]);
> }
> @@ -744,8 +744,8 @@ static void ilk_wm_dump(void)
> wm.lp[i].primary = REG_DECODE1(wm_lp[i], 8, 11);
> wm.lp[i].cursor = REG_DECODE1(wm_lp[i], 0, 8);
>
> - if (i == 0 || intel_gen(devid) >= 7) {
> - if (intel_gen(devid) < 7)
> + if (i == 0 || intel_display_ver(devid) >= 7) {
> + if (intel_display_ver(devid) < 7)
> wm.lp[i].sprite_enabled = REG_DECODE1(wm_lp_spr[i], 31, 1);
> wm.lp[i].sprite = REG_DECODE1(wm_lp_spr[i], 0, 11);
> }
> @@ -763,7 +763,7 @@ static void ilk_wm_dump(void)
> wm.linetime[i].ips, wm.linetime[i].ips * 0.125f);
> }
> }
> - if (intel_gen(devid) >= 7) {
> + if (intel_display_ver(devid) >= 7) {
> for (i = 0; i < 3; i++) {
> printf("WM_LP%d: %s, latency=%d, fbc=%d, primary=%d, cursor=%d,
> sprite=%d\n",
> i + 1, endis(wm.lp[i].enabled), wm.lp[i].latency, wm.lp[i].fbc,
> @@ -797,7 +797,7 @@ static void ilk_wm_dump(void)
> if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> printf("DDB partitioning = %s\n",
> REG_DECODE1(wm_misc, 0, 1) ? "5/6" : "1/2");
> - } else if (intel_gen(devid) >= 7) {
> + } else if (intel_display_ver(devid) >= 7) {
> printf("DDB partitioning = %s\n",
> REG_DECODE1(arb_ctl2, 6, 1) ? "5/6" : "1/2");
> }
> @@ -1498,12 +1498,12 @@ int main(int argc, char *argv[])
> }
> }
>
> - if (intel_gen(devid) >= 9) {
> + if (intel_display_ver(devid) >= 9) {
> skl_wm_dump();
> } else if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) {
> display_base = 0x180000;
> vlv_wm_dump();
> - } else if (intel_gen(devid) >= 5) {
> + } else if (intel_display_ver(devid) >= 5) {
> ilk_wm_dump();
> } else if (IS_G4X(devid)) {
> g4x_wm_dump();
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 09/10] tools/intel_watermark: Introduce skl_has_nv12_buf_cfg()
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (6 preceding siblings ...)
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 08/10] tools/intel_watermark: Use intel_display_ver() Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 11:32 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 10/10] tools/intel_watermark: Decode SAGV WM usage correctly on ADL+ Ville Syrjala
` (3 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Replace the hand rolled display_ver>=11 checks with
a more descriptive helper.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 7991e80ac876..e598cf122159 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -179,6 +179,11 @@ static bool skl_has_sagv_wm(uint32_t d)
return intel_display_ver(d) >= 13;
}
+static bool skl_has_nv12_buf_cfg(uint32_t d)
+{
+ return intel_display_ver(d) < 11;
+}
+
static int skl_num_wm_levels(uint32_t d)
{
if (skl_has_sagv_wm(d))
@@ -339,7 +344,7 @@ static void skl_wm_dump(void)
plane_ctl[pipe][plane] = read_reg(addr + 0x80);
wm_trans[pipe][plane] = read_reg(addr + 0x00168);
buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
- if (!is_cursor(plane) && intel_display_ver(devid) < 11)
+ if (!is_cursor(plane) && skl_has_nv12_buf_cfg(devid))
nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);
else
nv12_buf_cfg[pipe][plane] = 0;
@@ -439,7 +444,7 @@ static void skl_wm_dump(void)
}
printf("\n");
- if (intel_display_ver(devid) >= 11)
+ if (!skl_has_nv12_buf_cfg(devid))
continue;
if (is_cursor(plane))
@@ -575,7 +580,7 @@ static void skl_wm_dump(void)
}
printf("\n");
- if (intel_display_ver(devid) < 11) {
+ if (skl_has_nv12_buf_cfg(devid)) {
printf("\nNV12 DDB allocation:");
printf("\nstart");
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 09/10] tools/intel_watermark: Introduce skl_has_nv12_buf_cfg()
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 09/10] tools/intel_watermark: Introduce skl_has_nv12_buf_cfg() Ville Syrjala
@ 2023-02-06 11:32 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 11:32 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Replace the hand rolled display_ver>=11 checks with
> a more descriptive helper.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> tools/intel_watermark.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 7991e80ac876..e598cf122159 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -179,6 +179,11 @@ static bool skl_has_sagv_wm(uint32_t d)
> return intel_display_ver(d) >= 13;
> }
>
> +static bool skl_has_nv12_buf_cfg(uint32_t d)
> +{
> + return intel_display_ver(d) < 11;
> +}
> +
> static int skl_num_wm_levels(uint32_t d)
> {
> if (skl_has_sagv_wm(d))
> @@ -339,7 +344,7 @@ static void skl_wm_dump(void)
> plane_ctl[pipe][plane] = read_reg(addr + 0x80);
> wm_trans[pipe][plane] = read_reg(addr + 0x00168);
> buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
> - if (!is_cursor(plane) && intel_display_ver(devid) < 11)
> + if (!is_cursor(plane) && skl_has_nv12_buf_cfg(devid))
> nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);
> else
> nv12_buf_cfg[pipe][plane] = 0;
> @@ -439,7 +444,7 @@ static void skl_wm_dump(void)
> }
> printf("\n");
>
> - if (intel_display_ver(devid) >= 11)
> + if (!skl_has_nv12_buf_cfg(devid))
> continue;
>
> if (is_cursor(plane))
> @@ -575,7 +580,7 @@ static void skl_wm_dump(void)
> }
> printf("\n");
>
> - if (intel_display_ver(devid) < 11) {
> + if (skl_has_nv12_buf_cfg(devid)) {
> printf("\nNV12 DDB allocation:");
>
> printf("\nstart");
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 10/10] tools/intel_watermark: Decode SAGV WM usage correctly on ADL+
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (7 preceding siblings ...)
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 09/10] tools/intel_watermark: Introduce skl_has_nv12_buf_cfg() Ville Syrjala
@ 2023-01-25 4:55 ` Ville Syrjala
2023-02-06 11:40 ` Govindapillai, Vinod
2023-01-25 6:02 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Patchwork
` (2 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2023-01-25 4:55 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The LP6 bit in WM_DBG has become the SAGV bit on ADL+. Decode
it correctly.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index e598cf122159..115ae8b2ad19 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -625,6 +625,8 @@ static void skl_wm_dump(void)
if (wm_dbg & (1 << (23 + level)))
printf(" LP%d", level);
}
+ if (skl_has_sagv_wm(devid) && wm_dbg & (1 << 29))
+ printf(" SAGV");
printf("\n");
/* clear the sticky bits */
write_reg(0x45280, wm_dbg);
--
2.39.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 10/10] tools/intel_watermark: Decode SAGV WM usage correctly on ADL+
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 10/10] tools/intel_watermark: Decode SAGV WM usage correctly on ADL+ Ville Syrjala
@ 2023-02-06 11:40 ` Govindapillai, Vinod
0 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 11:40 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The LP6 bit in WM_DBG has become the SAGV bit on ADL+. Decode
> it correctly.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> tools/intel_watermark.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index e598cf122159..115ae8b2ad19 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -625,6 +625,8 @@ static void skl_wm_dump(void)
> if (wm_dbg & (1 << (23 + level)))
> printf(" LP%d", level);
> }
> + if (skl_has_sagv_wm(devid) && wm_dbg & (1 << 29))
> + printf(" SAGV");
> printf("\n");
> /* clear the sticky bits */
> write_reg(0x45280, wm_dbg);
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (8 preceding siblings ...)
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 10/10] tools/intel_watermark: Decode SAGV WM usage correctly on ADL+ Ville Syrjala
@ 2023-01-25 6:02 ` Patchwork
2023-01-25 12:27 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2023-02-06 8:12 ` [igt-dev] [PATCH i-g-t 01/10] " Govindapillai, Vinod
11 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2023-01-25 6:02 UTC (permalink / raw)
To: Ville Syrjala; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 3339 bytes --]
== Series Details ==
Series: series starting with [i-g-t,01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+
URL : https://patchwork.freedesktop.org/series/113300/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12631 -> IGTPW_8398
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/index.html
Participating hosts (39 -> 38)
------------------------------
Missing (1): fi-bsw-kefka
Known issues
------------
Here are the changes found in IGTPW_8398 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: [PASS][1] -> [INCOMPLETE][2] ([i915#7156])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: [PASS][3] -> [DMESG-FAIL][4] ([i915#5334] / [i915#7872])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
#### Possible fixes ####
* igt@debugfs_test@read_all_entries:
- fi-kbl-soraka: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/fi-kbl-soraka/igt@debugfs_test@read_all_entries.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/fi-kbl-soraka/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_gttfill@basic:
- fi-pnv-d510: [FAIL][7] ([i915#7229]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#4137]: https://gitlab.freedesktop.org/drm/intel/issues/4137
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7156]: https://gitlab.freedesktop.org/drm/intel/issues/7156
[i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7136 -> IGTPW_8398
CI-20190529: 20190529
CI_DRM_12631: 6bcfacd291ed6ff1ff50a295f970c98d54eabe05 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8398: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/index.html
IGT_7136: 31b6af91747ad8c705399c9006cdb81cb1864146 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/index.html
[-- Attachment #2: Type: text/html, Size: 3762 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (9 preceding siblings ...)
2023-01-25 6:02 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Patchwork
@ 2023-01-25 12:27 ` Patchwork
2023-02-06 8:12 ` [igt-dev] [PATCH i-g-t 01/10] " Govindapillai, Vinod
11 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2023-01-25 12:27 UTC (permalink / raw)
To: Ville Syrjala; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 22433 bytes --]
== Series Details ==
Series: series starting with [i-g-t,01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+
URL : https://patchwork.freedesktop.org/series/113300/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12631_full -> IGTPW_8398_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/index.html
Participating hosts (12 -> 11)
------------------------------
Additional (1): shard-rkl0
Missing (2): pig-skl-6260u pig-kbl-iris
Known issues
------------
Here are the changes found in IGTPW_8398_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [PASS][1] -> [FAIL][2] ([i915#2842])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-apl3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-apl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [PASS][3] -> [FAIL][4] ([i915#2842])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-glk4/igt@gem_exec_fair@basic-pace@rcs0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-glk8/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2:
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#2122])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-glk4/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-glk2/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
* igt@kms_vblank@pipe-c-query-busy-hang:
- shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271]) +15 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-snb4/igt@kms_vblank@pipe-c-query-busy-hang.html
#### Possible fixes ####
* igt@drm_fdinfo@idle@rcs0:
- {shard-rkl}: [FAIL][8] ([i915#7742]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-2/igt@drm_fdinfo@idle@rcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-4/igt@drm_fdinfo@idle@rcs0.html
* igt@fbdev@nullptr:
- {shard-rkl}: [SKIP][10] ([i915#2582]) -> [PASS][11] +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-2/igt@fbdev@nullptr.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@fbdev@nullptr.html
* igt@gem_bad_reloc@negative-reloc-lut:
- {shard-rkl}: [SKIP][12] ([i915#3281]) -> [PASS][13] +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-1/igt@gem_bad_reloc@negative-reloc-lut.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-5/igt@gem_bad_reloc@negative-reloc-lut.html
* igt@gem_eio@suspend:
- {shard-rkl}: [FAIL][14] ([i915#7052]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-4/igt@gem_eio@suspend.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-2/igt@gem_eio@suspend.html
* igt@gem_exec_fair@basic-deadline:
- {shard-rkl}: [FAIL][16] ([i915#2846]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-4/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- {shard-rkl}: [SKIP][18] ([fdo#109313]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-6/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-5/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_pread@self:
- {shard-rkl}: [SKIP][20] ([i915#3282]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-6/igt@gem_pread@self.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-5/igt@gem_pread@self.html
* igt@gen9_exec_parse@batch-invalid-length:
- {shard-rkl}: [SKIP][22] ([i915#2527]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-1/igt@gen9_exec_parse@batch-invalid-length.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-5/igt@gen9_exec_parse@batch-invalid-length.html
* igt@i915_pm_dc@dc5-psr:
- {shard-rkl}: [SKIP][24] ([i915#658]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-4/igt@i915_pm_dc@dc5-psr.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@i915_pm_dc@dc5-psr.html
* igt@i915_pm_dc@dc6-dpms:
- {shard-rkl}: [SKIP][26] ([i915#3361]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-5/igt@i915_pm_dc@dc6-dpms.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-3/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_selftest@mock@sanitycheck:
- shard-snb: [SKIP][28] ([fdo#109271]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-snb5/igt@i915_selftest@mock@sanitycheck.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-snb2/igt@i915_selftest@mock@sanitycheck.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- {shard-tglu}: [SKIP][30] ([i915#7651]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-tglu-6/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-tglu-2/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- {shard-rkl}: [SKIP][32] ([i915#1845] / [i915#4098]) -> [PASS][33] +23 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-4/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
- {shard-tglu}: [SKIP][34] ([i915#1845]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-tglu-6/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-tglu-5/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
* igt@kms_fbcon_fbt@psr:
- {shard-rkl}: [SKIP][36] ([i915#3955]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-3/igt@kms_fbcon_fbt@psr.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1:
- shard-glk: [FAIL][38] ([i915#79]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-rkl}: [SKIP][40] ([i915#1849] / [i915#4098]) -> [PASS][41] +17 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt:
- {shard-tglu}: [SKIP][42] ([i915#1849]) -> [PASS][43] +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html
* igt@kms_plane@pixel-format-source-clamping@pipe-b-planes:
- {shard-tglu}: [SKIP][44] ([i915#1849] / [i915#3558]) -> [PASS][45] +3 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-tglu-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-tglu-8/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
* igt@kms_plane@plane-panning-top-left@pipe-a-planes:
- {shard-rkl}: [SKIP][46] ([i915#1849]) -> [PASS][47] +7 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-1/igt@kms_plane@plane-panning-top-left@pipe-a-planes.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@kms_plane@plane-panning-top-left@pipe-a-planes.html
* igt@kms_psr@cursor_plane_onoff:
- {shard-rkl}: [SKIP][48] ([i915#1072]) -> [PASS][49] +2 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-1/igt@kms_psr@cursor_plane_onoff.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@kms_psr@cursor_plane_onoff.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- {shard-rkl}: [SKIP][50] ([i915#5461]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-4/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a:
- {shard-rkl}: [SKIP][52] ([i915#4098]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-3/igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-6/igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a.html
* igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm:
- {shard-tglu}: [SKIP][54] ([i915#1845] / [i915#7651]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-tglu-6/igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-tglu-1/igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm.html
* igt@perf@gen12-mi-rpc:
- {shard-rkl}: [SKIP][56] ([fdo#109289]) -> [PASS][57] +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-rkl-5/igt@perf@gen12-mi-rpc.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-rkl-4/igt@perf@gen12-mi-rpc.html
* igt@perf_pmu@idle@rcs0:
- {shard-dg1}: [FAIL][58] ([i915#4349]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12631/shard-dg1-17/igt@perf_pmu@idle@rcs0.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/shard-dg1-16/igt@perf_pmu@idle@rcs0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2876]: https://gitlab.freedesktop.org/drm/intel/issues/2876
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4884]: https://gitlab.freedesktop.org/drm/intel/issues/4884
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7136 -> IGTPW_8398
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_12631: 6bcfacd291ed6ff1ff50a295f970c98d54eabe05 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8398: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/index.html
IGT_7136: 31b6af91747ad8c705399c9006cdb81cb1864146 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8398/index.html
[-- Attachment #2: Type: text/html, Size: 15777 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
` (10 preceding siblings ...)
2023-01-25 12:27 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
@ 2023-02-06 8:12 ` Govindapillai, Vinod
11 siblings, 0 replies; 22+ messages in thread
From: Govindapillai, Vinod @ 2023-02-06 8:12 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, igt-dev@lists.freedesktop.org
On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The skl+ code forgot to call intel_register_access_fini(). Make
> it do so.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
> tools/intel_watermark.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 1e235ed30a63..1818d79d0bee 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -590,6 +590,8 @@ static void skl_wm_dump(void)
> printf("\n");
> /* clear the sticky bits */
> write_reg(0x45280, wm_dbg);
> +
> + intel_register_access_fini(&mmio_data);
> }
>
> static void ilk_wm_dump(void)
^ permalink raw reply [flat|nested] 22+ messages in thread