* [PATCH i-g-t 0/3] Fence register stuff
@ 2013-04-09 12:25 ville.syrjala
2013-04-09 12:25 ` [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 ville.syrjala
` (2 more replies)
0 siblings, 3 replies; 13+ messages in thread
From: ville.syrjala @ 2013-04-09 12:25 UTC (permalink / raw)
To: intel-gfx
Some fence stuff related to the 32 fence registers/256KB max fence stride
kernel changes.
I'm not sure gem_tiling_max_stride does any good since you can only use
it to verify that the tested fence stride <= max fence stride. Also I
ran it only on ILK,SNB and IVB, so at least the Gen2-3 code is
totally untested.
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 2013-04-09 12:25 [PATCH i-g-t 0/3] Fence register stuff ville.syrjala @ 2013-04-09 12:25 ` ville.syrjala 2013-04-09 13:05 ` Chris Wilson 2013-04-09 12:25 ` [PATCH i-g-t 2/3] tests: Use gem_available_fences() ville.syrjala 2013-04-09 12:25 ` [PATCH i-g-t 3/3] tests/gem_tiling_max_stride: Add a test for max fence stride ville.syrjala 2 siblings, 1 reply; 13+ messages in thread From: ville.syrjala @ 2013-04-09 12:25 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> IVB+ supports 32 fence registers, bump the maximum in the test. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/gem_fenced_exec_thrash.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/gem_fenced_exec_thrash.c b/tests/gem_fenced_exec_thrash.c index 8281449..b17eba2 100644 --- a/tests/gem_fenced_exec_thrash.c +++ b/tests/gem_fenced_exec_thrash.c @@ -45,7 +45,7 @@ #define BATCH_SIZE 4096 -#define MAX_FENCES 16 +#define MAX_FENCES 32 #define MI_BATCH_BUFFER_END (0xA<<23) -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 2013-04-09 12:25 ` [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 ville.syrjala @ 2013-04-09 13:05 ` Chris Wilson 2013-04-11 17:43 ` [PATCH] tests/gem_fenced_exec_thrash: Test with > max fences ville.syrjala 0 siblings, 1 reply; 13+ messages in thread From: Chris Wilson @ 2013-04-09 13:05 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx On Tue, Apr 09, 2013 at 03:25:37PM +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > IVB+ supports 32 fence registers, bump the maximum in the test. Then again the test is only relevant for gen2/3 (and 1), and I don't forsee the use of fences for GPU surface tiling being resurrected. On the other hand, the test makes sure that future gpus ignore the old restrictions. One feature request for the test: feed in > max_fences expect ENOSPC/EDEADLCK on gen2/3. -Chris -- Chris Wilson, Intel Open Source Technology Centre ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH] tests/gem_fenced_exec_thrash: Test with > max fences 2013-04-09 13:05 ` Chris Wilson @ 2013-04-11 17:43 ` ville.syrjala 2013-04-11 18:22 ` Daniel Vetter 0 siblings, 1 reply; 13+ messages in thread From: ville.syrjala @ 2013-04-11 17:43 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Make sure the kernel returns EDEADLK when the number of fences is exceeded for gen2-3. For gen4+ the test makes sure the kernel ignores the EXEC_OBJECT_NEEDS_FENCE flag. Note that I changed the code not to round the num_fences to an even number. Not sure why that was there, and if there's a reason for it, we need to add it back. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/gem_fenced_exec_thrash.c | 38 +++++++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 13 deletions(-) diff --git a/tests/gem_fenced_exec_thrash.c b/tests/gem_fenced_exec_thrash.c index ca88c53..c8a2c58 100644 --- a/tests/gem_fenced_exec_thrash.c +++ b/tests/gem_fenced_exec_thrash.c @@ -38,6 +38,7 @@ #include <i915_drm.h> #include "drmtest.h" +#include "intel_gpu_tools.h" #define WIDTH 1024 #define HEIGHT 1024 @@ -47,8 +48,6 @@ #define MAX_FENCES 32 -#define MI_BATCH_BUFFER_END (0xA<<23) - /* * Testcase: execbuf fence accounting * @@ -95,7 +94,7 @@ static int get_num_fences(int fd) printf ("total %d fences\n", val); assert(val > 4); - return val - 2; + return val; } static void fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t handle) @@ -106,23 +105,19 @@ static void fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t han reloc->write_domain = 0; } -int -main(int argc, char **argv) +static void run_test(int fd, int num_fences, int expected_errno) { struct drm_i915_gem_execbuffer2 execbuf[2]; - struct drm_i915_gem_exec_object2 exec[2][2*MAX_FENCES+1]; - struct drm_i915_gem_relocation_entry reloc[2*MAX_FENCES]; + struct drm_i915_gem_exec_object2 exec[2][2*MAX_FENCES+3]; + struct drm_i915_gem_relocation_entry reloc[2*MAX_FENCES+2]; - int fd = drm_open_any(); - int i, n, num_fences; + int i, n; int loop = 1000; memset(execbuf, 0, sizeof(execbuf)); memset(exec, 0, sizeof(exec)); memset(reloc, 0, sizeof(reloc)); - num_fences = get_num_fences(fd) & ~1; - assert(num_fences <= MAX_FENCES); for (n = 0; n < 2*num_fences; n++) { uint32_t handle = tiled_bo_create(fd); exec[1][2*num_fences - n-1].handle = exec[0][n].handle = handle; @@ -148,13 +143,30 @@ main(int argc, char **argv) ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf[0]); - assert(ret == 0); + assert(expected_errno ? + ret < 0 && errno == expected_errno : + ret == 0); ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf[1]); - assert(ret == 0); + assert(expected_errno ? + ret < 0 && errno == expected_errno : + ret == 0); } while (--loop); +} + +int +main(int argc, char **argv) +{ + int fd = drm_open_any(); + int num_fences = get_num_fences(fd); + uint32_t devid = intel_get_drm_devid(fd); + + assert(num_fences <= MAX_FENCES); + + run_test(fd, num_fences - 2, 0); + run_test(fd, num_fences + 1, intel_gen(devid) >= 4 ? 0 : EDEADLK); close(fd); -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH] tests/gem_fenced_exec_thrash: Test with > max fences 2013-04-11 17:43 ` [PATCH] tests/gem_fenced_exec_thrash: Test with > max fences ville.syrjala @ 2013-04-11 18:22 ` Daniel Vetter 0 siblings, 0 replies; 13+ messages in thread From: Daniel Vetter @ 2013-04-11 18:22 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx On Thu, Apr 11, 2013 at 08:43:40PM +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Make sure the kernel returns EDEADLK when the number of fences is > exceeded for gen2-3. For gen4+ the test makes sure the kernel ignores > the EXEC_OBJECT_NEEDS_FENCE flag. > > Note that I changed the code not to round the num_fences to an even > number. Not sure why that was there, and if there's a reason for it, > we need to add it back. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Looks nice, merged. -Daniel > --- > tests/gem_fenced_exec_thrash.c | 38 +++++++++++++++++++++++++------------- > 1 file changed, 25 insertions(+), 13 deletions(-) > > diff --git a/tests/gem_fenced_exec_thrash.c b/tests/gem_fenced_exec_thrash.c > index ca88c53..c8a2c58 100644 > --- a/tests/gem_fenced_exec_thrash.c > +++ b/tests/gem_fenced_exec_thrash.c > @@ -38,6 +38,7 @@ > #include <i915_drm.h> > > #include "drmtest.h" > +#include "intel_gpu_tools.h" > > #define WIDTH 1024 > #define HEIGHT 1024 > @@ -47,8 +48,6 @@ > > #define MAX_FENCES 32 > > -#define MI_BATCH_BUFFER_END (0xA<<23) > - > /* > * Testcase: execbuf fence accounting > * > @@ -95,7 +94,7 @@ static int get_num_fences(int fd) > printf ("total %d fences\n", val); > assert(val > 4); > > - return val - 2; > + return val; > } > > static void fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t handle) > @@ -106,23 +105,19 @@ static void fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t han > reloc->write_domain = 0; > } > > -int > -main(int argc, char **argv) > +static void run_test(int fd, int num_fences, int expected_errno) > { > struct drm_i915_gem_execbuffer2 execbuf[2]; > - struct drm_i915_gem_exec_object2 exec[2][2*MAX_FENCES+1]; > - struct drm_i915_gem_relocation_entry reloc[2*MAX_FENCES]; > + struct drm_i915_gem_exec_object2 exec[2][2*MAX_FENCES+3]; > + struct drm_i915_gem_relocation_entry reloc[2*MAX_FENCES+2]; > > - int fd = drm_open_any(); > - int i, n, num_fences; > + int i, n; > int loop = 1000; > > memset(execbuf, 0, sizeof(execbuf)); > memset(exec, 0, sizeof(exec)); > memset(reloc, 0, sizeof(reloc)); > > - num_fences = get_num_fences(fd) & ~1; > - assert(num_fences <= MAX_FENCES); > for (n = 0; n < 2*num_fences; n++) { > uint32_t handle = tiled_bo_create(fd); > exec[1][2*num_fences - n-1].handle = exec[0][n].handle = handle; > @@ -148,13 +143,30 @@ main(int argc, char **argv) > ret = drmIoctl(fd, > DRM_IOCTL_I915_GEM_EXECBUFFER2, > &execbuf[0]); > - assert(ret == 0); > + assert(expected_errno ? > + ret < 0 && errno == expected_errno : > + ret == 0); > > ret = drmIoctl(fd, > DRM_IOCTL_I915_GEM_EXECBUFFER2, > &execbuf[1]); > - assert(ret == 0); > + assert(expected_errno ? > + ret < 0 && errno == expected_errno : > + ret == 0); > } while (--loop); > +} > + > +int > +main(int argc, char **argv) > +{ > + int fd = drm_open_any(); > + int num_fences = get_num_fences(fd); > + uint32_t devid = intel_get_drm_devid(fd); > + > + assert(num_fences <= MAX_FENCES); > + > + run_test(fd, num_fences - 2, 0); > + run_test(fd, num_fences + 1, intel_gen(devid) >= 4 ? 0 : EDEADLK); > > close(fd); > > -- > 1.8.1.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH i-g-t 2/3] tests: Use gem_available_fences() 2013-04-09 12:25 [PATCH i-g-t 0/3] Fence register stuff ville.syrjala 2013-04-09 12:25 ` [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 ville.syrjala @ 2013-04-09 12:25 ` ville.syrjala 2013-04-09 12:25 ` [PATCH i-g-t 3/3] tests/gem_tiling_max_stride: Add a test for max fence stride ville.syrjala 2 siblings, 0 replies; 13+ messages in thread From: ville.syrjala @ 2013-04-09 12:25 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> lib/drmtest.c provides gem_available_fences(). Use it where appropriate. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/gem_fence_thrash.c | 8 ++------ tests/gem_fenced_exec_thrash.c | 8 ++------ tests/gem_stress.c | 8 ++------ 3 files changed, 6 insertions(+), 18 deletions(-) diff --git a/tests/gem_fence_thrash.c b/tests/gem_fence_thrash.c index 01fd0f6..e1cfc4e 100644 --- a/tests/gem_fence_thrash.c +++ b/tests/gem_fence_thrash.c @@ -169,19 +169,15 @@ static int run_test(int threads_per_fence, void *f, int tiling, int surfaces_per_thread) { struct test t; - drm_i915_getparam_t gp; pthread_t *threads; int n, num_fences, num_threads; - int ret; t.fd = drm_open_any(); t.tiling = tiling; t.num_surfaces = surfaces_per_thread; - gp.param = I915_PARAM_NUM_FENCES_AVAIL; - gp.value = &num_fences; - ret = ioctl(t.fd, DRM_IOCTL_I915_GETPARAM, &gp); - assert (ret == 0); + num_fences = gem_available_fences(t.fd); + assert (num_fences > 0); num_threads = threads_per_fence * num_fences; diff --git a/tests/gem_fenced_exec_thrash.c b/tests/gem_fenced_exec_thrash.c index b17eba2..ca88c53 100644 --- a/tests/gem_fenced_exec_thrash.c +++ b/tests/gem_fenced_exec_thrash.c @@ -88,13 +88,9 @@ batch_create (int fd) static int get_num_fences(int fd) { - drm_i915_getparam_t gp; - int ret, val; + int val; - gp.param = I915_PARAM_NUM_FENCES_AVAIL; - gp.value = &val; - ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); - assert (ret == 0); + val = gem_available_fences(fd); printf ("total %d fences\n", val); assert(val > 4); diff --git a/tests/gem_stress.c b/tests/gem_stress.c index 54597af..9b31a69 100644 --- a/tests/gem_stress.c +++ b/tests/gem_stress.c @@ -605,13 +605,9 @@ static void copy_tiles(unsigned *permutation) static int get_num_fences(void) { - drm_i915_getparam_t gp; - int ret, val; + int val; - gp.param = I915_PARAM_NUM_FENCES_AVAIL; - gp.value = &val; - ret = drmIoctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp); - assert (ret == 0); + val = gem_available_fences(drm_fd); printf ("total %d fences\n", val); assert(val > 4); -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH i-g-t 3/3] tests/gem_tiling_max_stride: Add a test for max fence stride 2013-04-09 12:25 [PATCH i-g-t 0/3] Fence register stuff ville.syrjala 2013-04-09 12:25 ` [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 ville.syrjala 2013-04-09 12:25 ` [PATCH i-g-t 2/3] tests: Use gem_available_fences() ville.syrjala @ 2013-04-09 12:25 ` ville.syrjala 2013-04-09 13:06 ` Chris Wilson 2 siblings, 1 reply; 13+ messages in thread From: ville.syrjala @ 2013-04-09 12:25 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> gem_tiling_max_stride writes a data pattern to an X-tiled buffer using the maximum supported stride, reads the data back as linear, and verifies that the data didn't get scrambled on the way. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/Makefile.am | 1 + tests/gem_tiling_max_stride.c | 118 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 119 insertions(+) create mode 100644 tests/gem_tiling_max_stride.c diff --git a/tests/Makefile.am b/tests/Makefile.am index f8758cd..e147e4e 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -99,6 +99,7 @@ TESTS_progs = \ gem_ctx_bad_exec \ gem_ctx_basic \ gem_reg_read \ + gem_tiling_max_stride \ $(NOUVEAU_TESTS) \ prime_self_import \ prime_udl \ diff --git a/tests/gem_tiling_max_stride.c b/tests/gem_tiling_max_stride.c new file mode 100644 index 0000000..3ba8c10 --- /dev/null +++ b/tests/gem_tiling_max_stride.c @@ -0,0 +1,118 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Ville Syrjälä <ville.syrjala@linux.intel.com> + * + */ + +#include <unistd.h> +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <assert.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <sys/mman.h> +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_gpu_tools.h" + +/** + * Testcase: Check that max fence stride works + */ + +int main(int argc, char *argv[]) +{ + int fd; + uint32_t *ptr; + uint32_t *data; + uint32_t handle; + uint32_t stride; + uint32_t size; + uint32_t devid; + int i = 0, x, y; + int tile_width = 512; + int tile_height = 8; + + fd = drm_open_any(); + + devid = intel_get_drm_devid(fd); + + if (intel_gen(devid) >= 7) + stride = 256 * 1024; + else if (intel_gen(devid) >= 4) + stride = 128 * 1024; + else { + tile_width = 128; + tile_height = 16; + stride = 8 * 1024; + } + + size = stride * tile_height; + + data = malloc(size); + assert(data); + + /* Fill each line with the line number */ + for (y = 0; y < tile_height; y++) { + for (x = 0; x < stride / 4; x++) + data[i++] = y; + } + + handle = gem_create(fd, size); + + ptr = gem_mmap(fd, handle, size, PROT_READ | PROT_WRITE); + assert(ptr); + + gem_set_tiling(fd, handle, I915_TILING_X, stride); + + gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + + memcpy(ptr, data, size); + + memset(data, 0, size); + + gem_set_tiling(fd, handle, I915_TILING_NONE, 0); + + memcpy(data, ptr, size); + + /* Check that each tile contains the expected pattern */ + for (i = 0; i < size / 4; ) { + for (y = 0; y < tile_height; y++) { + for (x = 0; x < tile_width / 4; x++) { + assert(y == data[i]); + i++; + } + } + } + + munmap(ptr, size); + + close(fd); + + return 0; +} -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/gem_tiling_max_stride: Add a test for max fence stride 2013-04-09 12:25 ` [PATCH i-g-t 3/3] tests/gem_tiling_max_stride: Add a test for max fence stride ville.syrjala @ 2013-04-09 13:06 ` Chris Wilson 2013-04-09 13:41 ` [PATCH i-g-t v2] " ville.syrjala 0 siblings, 1 reply; 13+ messages in thread From: Chris Wilson @ 2013-04-09 13:06 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx On Tue, Apr 09, 2013 at 03:25:39PM +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > gem_tiling_max_stride writes a data pattern to an X-tiled buffer using > the maximum supported stride, reads the data back as linear, and > verifies that the data didn't get scrambled on the way. And please also check that stride > max is rejected. -Chris -- Chris Wilson, Intel Open Source Technology Centre ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH i-g-t v2] tests/gem_tiling_max_stride: Add a test for max fence stride 2013-04-09 13:06 ` Chris Wilson @ 2013-04-09 13:41 ` ville.syrjala 2013-04-09 13:51 ` Chris Wilson 0 siblings, 1 reply; 13+ messages in thread From: ville.syrjala @ 2013-04-09 13:41 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> gem_tiling_max_stride writes a data pattern to an X-tiled buffer using the maximum supported stride, reads the data back as linear, and verifies that the data didn't get scrambled on the way. The test also checks that some invalid stride values are rejected properly. v2: Check invalid strides Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/Makefile.am | 1 + tests/gem_tiling_max_stride.c | 141 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 142 insertions(+) create mode 100644 tests/gem_tiling_max_stride.c diff --git a/tests/Makefile.am b/tests/Makefile.am index f8758cd..e147e4e 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -99,6 +99,7 @@ TESTS_progs = \ gem_ctx_bad_exec \ gem_ctx_basic \ gem_reg_read \ + gem_tiling_max_stride \ $(NOUVEAU_TESTS) \ prime_self_import \ prime_udl \ diff --git a/tests/gem_tiling_max_stride.c b/tests/gem_tiling_max_stride.c new file mode 100644 index 0000000..42b68e5 --- /dev/null +++ b/tests/gem_tiling_max_stride.c @@ -0,0 +1,141 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Ville Syrjälä <ville.syrjala@linux.intel.com> + * + */ + +#include <unistd.h> +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <assert.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <sys/mman.h> +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_gpu_tools.h" + +static void test_invalid_tiling(int fd, uint32_t handle, int tiling, int stride) +{ + struct drm_i915_gem_set_tiling st; + int ret; + + memset(&st, 0, sizeof(st)); + do { + st.handle = handle; + st.tiling_mode = tiling; + st.stride = tiling ? stride : 0; + + ret = ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &st); + } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); + assert(ret == -1 && errno == EINVAL); +} + +/** + * Testcase: Check that max fence stride works + */ + +int main(int argc, char *argv[]) +{ + int fd; + uint32_t *ptr; + uint32_t *data; + uint32_t handle; + uint32_t stride; + uint32_t size; + uint32_t devid; + int i = 0, x, y; + int tile_width = 512; + int tile_height = 8; + + fd = drm_open_any(); + + devid = intel_get_drm_devid(fd); + + if (intel_gen(devid) >= 7) + stride = 256 * 1024; + else if (intel_gen(devid) >= 4) + stride = 128 * 1024; + else { + tile_width = 128; + tile_height = 16; + stride = 8 * 1024; + } + + size = stride * tile_height; + + data = malloc(size); + assert(data); + + /* Fill each line with the line number */ + for (y = 0; y < tile_height; y++) { + for (x = 0; x < stride / 4; x++) + data[i++] = y; + } + + handle = gem_create(fd, size); + + ptr = gem_mmap(fd, handle, size, PROT_READ | PROT_WRITE); + assert(ptr); + + test_invalid_tiling(fd, handle, I915_TILING_X, stride - 1); + test_invalid_tiling(fd, handle, I915_TILING_X, stride + 1); + test_invalid_tiling(fd, handle, I915_TILING_X, stride + 127); + test_invalid_tiling(fd, handle, I915_TILING_X, stride + 128); + test_invalid_tiling(fd, handle, I915_TILING_X, stride + tile_width); + test_invalid_tiling(fd, handle, I915_TILING_X, stride * 2); + + gem_set_tiling(fd, handle, I915_TILING_X, stride); + + gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + + memcpy(ptr, data, size); + + memset(data, 0, size); + + gem_set_tiling(fd, handle, I915_TILING_NONE, 0); + + memcpy(data, ptr, size); + + /* Check that each tile contains the expected pattern */ + for (i = 0; i < size / 4; ) { + for (y = 0; y < tile_height; y++) { + for (x = 0; x < tile_width / 4; x++) { + assert(y == data[i]); + i++; + } + } + } + + munmap(ptr, size); + + close(fd); + + return 0; +} -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH i-g-t v2] tests/gem_tiling_max_stride: Add a test for max fence stride 2013-04-09 13:41 ` [PATCH i-g-t v2] " ville.syrjala @ 2013-04-09 13:51 ` Chris Wilson 2013-04-09 14:45 ` [PATCH i-g-t v4] " ville.syrjala 0 siblings, 1 reply; 13+ messages in thread From: Chris Wilson @ 2013-04-09 13:51 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx On Tue, Apr 09, 2013 at 04:41:42PM +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > gem_tiling_max_stride writes a data pattern to an X-tiled buffer using > the maximum supported stride, reads the data back as linear, and > verifies that the data didn't get scrambled on the way. > > The test also checks that some invalid stride values are rejected > properly. > > v2: Check invalid strides tile_width is 512 on gen3, and 128 on gen2 for X-tiling and the tile_height is 8 and 16 respectively. For test_tiling(), just test both tiling modes, and include a tile_width/2 and (max-tile_width+1). Otherwise those negative tests look good. -Chris -- Chris Wilson, Intel Open Source Technology Centre ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH i-g-t v4] tests/gem_tiling_max_stride: Add a test for max fence stride 2013-04-09 13:51 ` Chris Wilson @ 2013-04-09 14:45 ` ville.syrjala 2013-04-09 18:06 ` Chris Wilson 0 siblings, 1 reply; 13+ messages in thread From: ville.syrjala @ 2013-04-09 14:45 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> gem_tiling_max_stride writes a data pattern to an X-tiled buffer using the maximum supported stride, reads the data back as linear, and verifies that the data didn't get scrambled on the way. The test also checks that some invalid stride values are rejected properly. v2: Check invalid strides v3: Check invalid stride with Y-tiling Include a few more invalid stride values Fix gen3 X-tile size v4: A few more invalid strides :) Drop the useless memset() Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/Makefile.am | 1 + tests/gem_tiling_max_stride.c | 153 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 154 insertions(+) create mode 100644 tests/gem_tiling_max_stride.c diff --git a/tests/Makefile.am b/tests/Makefile.am index f8758cd..e147e4e 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -99,6 +99,7 @@ TESTS_progs = \ gem_ctx_bad_exec \ gem_ctx_basic \ gem_reg_read \ + gem_tiling_max_stride \ $(NOUVEAU_TESTS) \ prime_self_import \ prime_udl \ diff --git a/tests/gem_tiling_max_stride.c b/tests/gem_tiling_max_stride.c new file mode 100644 index 0000000..21daab0 --- /dev/null +++ b/tests/gem_tiling_max_stride.c @@ -0,0 +1,153 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Ville Syrjälä <ville.syrjala@linux.intel.com> + * + */ + +#include <unistd.h> +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <assert.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <limits.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <sys/mman.h> +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_gpu_tools.h" + +static void do_test_invalid_tiling(int fd, uint32_t handle, int tiling, int stride) +{ + struct drm_i915_gem_set_tiling st; + int ret; + + memset(&st, 0, sizeof(st)); + do { + st.handle = handle; + st.tiling_mode = tiling; + st.stride = tiling ? stride : 0; + + ret = ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &st); + } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); + assert(ret == -1 && errno == EINVAL); +} + +static void test_invalid_tiling(int fd, uint32_t handle, int stride) +{ + do_test_invalid_tiling(fd, handle, I915_TILING_X, stride); + do_test_invalid_tiling(fd, handle, I915_TILING_Y, stride); +} + +/** + * Testcase: Check that max fence stride works + */ + +int main(int argc, char *argv[]) +{ + int fd; + uint32_t *ptr; + uint32_t *data; + uint32_t handle; + uint32_t stride; + uint32_t size; + uint32_t devid; + int i = 0, x, y; + int tile_width = 512; + int tile_height = 8; + + fd = drm_open_any(); + + devid = intel_get_drm_devid(fd); + + if (intel_gen(devid) >= 7) + stride = 256 * 1024; + else if (intel_gen(devid) >= 4) + stride = 128 * 1024; + else { + if (IS_GEN2(devid)) { + tile_width = 128; + tile_height = 16; + } + stride = 8 * 1024; + } + + size = stride * tile_height; + + data = malloc(size); + assert(data); + + /* Fill each line with the line number */ + for (y = 0; y < tile_height; y++) { + for (x = 0; x < stride / 4; x++) + data[i++] = y; + } + + handle = gem_create(fd, size); + + ptr = gem_mmap(fd, handle, size, PROT_READ | PROT_WRITE); + assert(ptr); + + test_invalid_tiling(fd, handle, 0); + test_invalid_tiling(fd, handle, 64); + test_invalid_tiling(fd, handle, stride - 1); + test_invalid_tiling(fd, handle, stride + 1); + test_invalid_tiling(fd, handle, stride + 127); + test_invalid_tiling(fd, handle, stride + 128); + test_invalid_tiling(fd, handle, stride + tile_width - 1); + test_invalid_tiling(fd, handle, stride + tile_width); + test_invalid_tiling(fd, handle, stride * 2); + test_invalid_tiling(fd, handle, INT_MAX); + test_invalid_tiling(fd, handle, UINT_MAX); + + gem_set_tiling(fd, handle, I915_TILING_X, stride); + + gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + + memcpy(ptr, data, size); + + gem_set_tiling(fd, handle, I915_TILING_NONE, 0); + + memcpy(data, ptr, size); + + /* Check that each tile contains the expected pattern */ + for (i = 0; i < size / 4; ) { + for (y = 0; y < tile_height; y++) { + for (x = 0; x < tile_width / 4; x++) { + assert(y == data[i]); + i++; + } + } + } + + munmap(ptr, size); + + close(fd); + + return 0; +} -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH i-g-t v4] tests/gem_tiling_max_stride: Add a test for max fence stride 2013-04-09 14:45 ` [PATCH i-g-t v4] " ville.syrjala @ 2013-04-09 18:06 ` Chris Wilson 2013-04-09 18:21 ` Daniel Vetter 0 siblings, 1 reply; 13+ messages in thread From: Chris Wilson @ 2013-04-09 18:06 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx On Tue, Apr 09, 2013 at 05:45:37PM +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > gem_tiling_max_stride writes a data pattern to an X-tiled buffer using > the maximum supported stride, reads the data back as linear, and > verifies that the data didn't get scrambled on the way. > > The test also checks that some invalid stride values are rejected > properly. > > v2: Check invalid strides > v3: Check invalid stride with Y-tiling > Include a few more invalid stride values > Fix gen3 X-tile size > v4: A few more invalid strides :) > Drop the useless memset() > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> I think I've exhausted my wishlist, and congrats on finding the bug, so Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris -- Chris Wilson, Intel Open Source Technology Centre ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH i-g-t v4] tests/gem_tiling_max_stride: Add a test for max fence stride 2013-04-09 18:06 ` Chris Wilson @ 2013-04-09 18:21 ` Daniel Vetter 0 siblings, 0 replies; 13+ messages in thread From: Daniel Vetter @ 2013-04-09 18:21 UTC (permalink / raw) To: Chris Wilson, ville.syrjala, intel-gfx On Tue, Apr 09, 2013 at 07:06:32PM +0100, Chris Wilson wrote: > On Tue, Apr 09, 2013 at 05:45:37PM +0300, ville.syrjala@linux.intel.com wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > gem_tiling_max_stride writes a data pattern to an X-tiled buffer using > > the maximum supported stride, reads the data back as linear, and > > verifies that the data didn't get scrambled on the way. > > > > The test also checks that some invalid stride values are rejected > > properly. > > > > v2: Check invalid strides > > v3: Check invalid stride with Y-tiling > > Include a few more invalid stride values > > Fix gen3 X-tile size > > v4: A few more invalid strides :) > > Drop the useless memset() > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > I think I've exhausted my wishlist, and congrats on finding the bug, so > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Merged all three patches, thanks a lot for supplying paranoid igt cases. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2013-04-11 18:19 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-04-09 12:25 [PATCH i-g-t 0/3] Fence register stuff ville.syrjala 2013-04-09 12:25 ` [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 ville.syrjala 2013-04-09 13:05 ` Chris Wilson 2013-04-11 17:43 ` [PATCH] tests/gem_fenced_exec_thrash: Test with > max fences ville.syrjala 2013-04-11 18:22 ` Daniel Vetter 2013-04-09 12:25 ` [PATCH i-g-t 2/3] tests: Use gem_available_fences() ville.syrjala 2013-04-09 12:25 ` [PATCH i-g-t 3/3] tests/gem_tiling_max_stride: Add a test for max fence stride ville.syrjala 2013-04-09 13:06 ` Chris Wilson 2013-04-09 13:41 ` [PATCH i-g-t v2] " ville.syrjala 2013-04-09 13:51 ` Chris Wilson 2013-04-09 14:45 ` [PATCH i-g-t v4] " ville.syrjala 2013-04-09 18:06 ` Chris Wilson 2013-04-09 18:21 ` Daniel Vetter
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