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From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 09/14] drm/i915: Linetime watermarks are a HSW feature
Date: Thu,  5 Dec 2013 15:51:36 +0200	[thread overview]
Message-ID: <1386251501-10602-10-git-send-email-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <1386251501-10602-1-git-send-email-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Linetime watermarks don't exist on ILK/SNB/IVB, so don't compute them
except on HSW.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 023be16..954c1fb 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2656,7 +2656,8 @@ static bool intel_compute_pipe_wm(struct drm_crtc *crtc,
 		ilk_compute_wm_level(dev_priv, level, params,
 				     &pipe_wm->wm[level]);
 
-	pipe_wm->linetime = hsw_compute_linetime_wm(dev, crtc);
+	if (IS_HASWELL(dev))
+		pipe_wm->linetime = hsw_compute_linetime_wm(dev, crtc);
 
 	/* At least LP0 must be valid */
 	return ilk_validate_wm_level(0, &max, &pipe_wm->wm[0]);
@@ -3235,7 +3236,8 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
 	};
 
 	hw->wm_pipe[pipe] = I915_READ(wm0_pipe_reg[pipe]);
-	hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe));
+	if (IS_HASWELL(dev))
+		hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe));
 
 	if (intel_crtc_active(crtc)) {
 		u32 tmp = hw->wm_pipe[pipe];
-- 
1.8.3.2

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  parent reply	other threads:[~2013-12-05 13:52 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-05 13:51 [PATCH 00/14] drm/i915: Make ILK/SNB/IVB use HSW watermark code ville.syrjala
2013-12-05 13:51 ` [PATCH 01/14] drm/i915: Add IVB DDB partitioning control ville.syrjala
2013-12-05 13:51 ` [PATCH 02/14] drm/i915: Add ILK/SNB/IVB WM latency field support ville.syrjala
2013-12-05 13:51 ` [PATCH 03/14] drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled ville.syrjala
2013-12-05 13:51 ` [PATCH 04/14] Revert "drm/i915/sprite: Always enable the scaler on IronLake" ville.syrjala
2013-12-16 21:42   ` Imre Deak
2013-12-05 13:51 ` [PATCH 05/14] drm/i915: Fix LP1 sprite watermarks for ILK/SNB ville.syrjala
2013-12-05 13:51 ` [PATCH 06/14] drm/i915: Fix LP1+ watermark disabling ILK ville.syrjala
2013-12-16 21:46   ` Imre Deak
2013-12-05 13:51 ` [PATCH 07/14] drm/i915: Don't merge LP1+ watermarks on ILK/SNB/IVB when multiple pipes are enabled ville.syrjala
2013-12-05 13:51 ` [PATCH 08/14] drm/i915: Disable FBC WM on ILK, and disable LP2+ when FBC is enabled ville.syrjala
2013-12-05 13:51 ` ville.syrjala [this message]
2013-12-05 13:51 ` [PATCH 10/14] drm/i915: Disable LP1+ watermarks safely in init ville.syrjala
2013-12-05 14:27   ` Chris Wilson
2013-12-05 14:41     ` Ville Syrjälä
2013-12-05 13:51 ` [PATCH 11/14] drm/i915: Move ILK/SNB/IVB over to the HSW WM code ville.syrjala
2013-12-16 22:16   ` Imre Deak
2013-12-05 13:51 ` [PATCH 12/14] drm/i915: Try to fix the messy IVB sprite scaling workaround ville.syrjala
2013-12-05 13:51 ` [PATCH 13/14] drm/i915: Don't disable primary when color keying is used ville.syrjala
2013-12-05 13:51 ` [PATCH 14/14] drm/i915: Avoid underruns when disabling sprites ville.syrjala
2013-12-05 14:30 ` [PATCH 00/14] drm/i915: Make ILK/SNB/IVB use HSW watermark code Daniel Vetter
2013-12-05 14:48   ` Ville Syrjälä
2013-12-16 21:38 ` Imre Deak
2013-12-17 10:13   ` Daniel Vetter

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