From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 05/14] drm/i915: Fix LP1 sprite watermarks for ILK/SNB
Date: Thu, 5 Dec 2013 15:51:32 +0200 [thread overview]
Message-ID: <1386251501-10602-6-git-send-email-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <1386251501-10602-1-git-send-email-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
ILK/SNB don't have LP2+ watermarks for sprites. Also the LP1 sprite
watermark register has its own enable bit. Take these differences
into account when programming the LP1+ registers.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 27 ++++++++++++++++++++-------
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4b3ccac..db7f3a6 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2768,7 +2768,11 @@ static void hsw_compute_wm_results(struct drm_device *dev,
results->wm_lp[wm_lp - 1] |=
r->fbc_val << WM1_LP_FBC_SHIFT;
- results->wm_lp_spr[wm_lp - 1] = r->spr_val;
+ if (INTEL_INFO(dev)->gen <= 6 && r->spr_val) {
+ WARN_ON(wm_lp != 1);
+ results->wm_lp_spr[wm_lp - 1] = WM1S_LP_EN | r->spr_val;
+ } else
+ results->wm_lp_spr[wm_lp - 1] = r->spr_val;
}
/* LP0 register values */
@@ -2900,6 +2904,10 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] != 0)
I915_WRITE(WM1_LP_ILK, 0);
+ if (INTEL_INFO(dev)->gen <= 6 &&
+ dirty & WM_DIRTY_LP(1) && previous->wm_lp_spr[0] != 0)
+ I915_WRITE(WM1S_LP_ILK, 0);
+
if (dirty & WM_DIRTY_PIPE(PIPE_A))
I915_WRITE(WM0_PIPEA_ILK, results->wm_pipe[0]);
if (dirty & WM_DIRTY_PIPE(PIPE_B))
@@ -2941,12 +2949,17 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
I915_WRITE(DISP_ARB_CTL, val);
}
- if (dirty & WM_DIRTY_LP(1) && previous->wm_lp_spr[0] != results->wm_lp_spr[0])
- I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]);
- if (dirty & WM_DIRTY_LP(2) && previous->wm_lp_spr[1] != results->wm_lp_spr[1])
- I915_WRITE(WM2S_LP_IVB, results->wm_lp_spr[1]);
- if (dirty & WM_DIRTY_LP(3) && previous->wm_lp_spr[2] != results->wm_lp_spr[2])
- I915_WRITE(WM3S_LP_IVB, results->wm_lp_spr[2]);
+ if (INTEL_INFO(dev)->gen <= 6) {
+ if (dirty & WM_DIRTY_LP(1) && results->wm_lp_spr[0] != 0)
+ I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]);
+ } else {
+ if (dirty & WM_DIRTY_LP(1) && previous->wm_lp_spr[0] != results->wm_lp_spr[0])
+ I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]);
+ if (dirty & WM_DIRTY_LP(2) && previous->wm_lp_spr[1] != results->wm_lp_spr[1])
+ I915_WRITE(WM2S_LP_IVB, results->wm_lp_spr[1]);
+ if (dirty & WM_DIRTY_LP(3) && previous->wm_lp_spr[2] != results->wm_lp_spr[2])
+ I915_WRITE(WM3S_LP_IVB, results->wm_lp_spr[2]);
+ }
if (dirty & WM_DIRTY_LP(1) && results->wm_lp[0] != 0)
I915_WRITE(WM1_LP_ILK, results->wm_lp[0]);
--
1.8.3.2
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next prev parent reply other threads:[~2013-12-05 13:52 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-05 13:51 [PATCH 00/14] drm/i915: Make ILK/SNB/IVB use HSW watermark code ville.syrjala
2013-12-05 13:51 ` [PATCH 01/14] drm/i915: Add IVB DDB partitioning control ville.syrjala
2013-12-05 13:51 ` [PATCH 02/14] drm/i915: Add ILK/SNB/IVB WM latency field support ville.syrjala
2013-12-05 13:51 ` [PATCH 03/14] drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled ville.syrjala
2013-12-05 13:51 ` [PATCH 04/14] Revert "drm/i915/sprite: Always enable the scaler on IronLake" ville.syrjala
2013-12-16 21:42 ` Imre Deak
2013-12-05 13:51 ` ville.syrjala [this message]
2013-12-05 13:51 ` [PATCH 06/14] drm/i915: Fix LP1+ watermark disabling ILK ville.syrjala
2013-12-16 21:46 ` Imre Deak
2013-12-05 13:51 ` [PATCH 07/14] drm/i915: Don't merge LP1+ watermarks on ILK/SNB/IVB when multiple pipes are enabled ville.syrjala
2013-12-05 13:51 ` [PATCH 08/14] drm/i915: Disable FBC WM on ILK, and disable LP2+ when FBC is enabled ville.syrjala
2013-12-05 13:51 ` [PATCH 09/14] drm/i915: Linetime watermarks are a HSW feature ville.syrjala
2013-12-05 13:51 ` [PATCH 10/14] drm/i915: Disable LP1+ watermarks safely in init ville.syrjala
2013-12-05 14:27 ` Chris Wilson
2013-12-05 14:41 ` Ville Syrjälä
2013-12-05 13:51 ` [PATCH 11/14] drm/i915: Move ILK/SNB/IVB over to the HSW WM code ville.syrjala
2013-12-16 22:16 ` Imre Deak
2013-12-05 13:51 ` [PATCH 12/14] drm/i915: Try to fix the messy IVB sprite scaling workaround ville.syrjala
2013-12-05 13:51 ` [PATCH 13/14] drm/i915: Don't disable primary when color keying is used ville.syrjala
2013-12-05 13:51 ` [PATCH 14/14] drm/i915: Avoid underruns when disabling sprites ville.syrjala
2013-12-05 14:30 ` [PATCH 00/14] drm/i915: Make ILK/SNB/IVB use HSW watermark code Daniel Vetter
2013-12-05 14:48 ` Ville Syrjälä
2013-12-16 21:38 ` Imre Deak
2013-12-17 10:13 ` Daniel Vetter
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