From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [PATCH v8 15/19] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
Date: Fri, 2 Nov 2018 14:31:34 -0700 [thread overview]
Message-ID: <20181102213138.301-16-manasi.d.navare@intel.com> (raw)
In-Reply-To: <20181102213138.301-1-manasi.d.navare@intel.com>
DSC PPS secondary data packet infoframes are filled with
DSC picure parameter set metadata according to the DSC standard.
These infoframes are sent to the sink device and used during DSC
decoding.
v3:
* Rename to intel_dp_write_pps_sdp (Ville)
* Use const intel_crtc_state (Ville)
v2:
* Rebase ond drm-tip
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_vdsc.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915/intel_vdsc.c
index 0eaa69778160..85af5f784aad 100644
--- a/drivers/gpu/drm/i915/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/intel_vdsc.c
@@ -988,6 +988,25 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
}
}
+static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ const struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg;
+ struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;
+
+ /* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */
+ drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp);
+
+ /* Fill the PPS payload bytes as per DSC spec 1.2 Table 4-1 */
+ drm_dsc_pps_infoframe_pack(&dp_dsc_pps_sdp, vdsc_cfg);
+
+ intel_dig_port->write_infoframe(encoder, crtc_state,
+ DP_SDP_PPS, &dp_dsc_pps_sdp,
+ sizeof(dp_dsc_pps_sdp));
+}
+
void intel_dsc_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
@@ -997,5 +1016,7 @@ void intel_dsc_enable(struct intel_encoder *encoder,
intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
+ intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
+
return;
}
--
2.18.0
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next prev parent reply other threads:[~2018-11-02 21:31 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-02 21:31 [PATCH v8 00/19] DSC enabling remaining patches respin Manasi Navare
2018-11-02 21:31 ` [PATCH v8 01/19] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-02 21:31 ` [PATCH v8 02/19] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-11-02 21:31 ` [PATCH v8 03/19] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-11-02 21:31 ` [PATCH v8 04/19] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-06 1:38 ` Srivatsa, Anusha
2018-11-06 20:17 ` Manasi Navare
2018-11-02 21:31 ` [PATCH v8 05/19] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-11-02 21:31 ` [PATCH v8 06/19] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-11-02 21:31 ` [PATCH v8 07/19] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-11-03 2:09 ` Manasi Navare
2018-11-06 14:42 ` Ville Syrjälä
2018-11-06 20:37 ` Manasi Navare
2018-11-07 22:31 ` Manasi Navare
2018-11-06 22:41 ` Srivatsa, Anusha
2018-11-06 22:48 ` Manasi Navare
2018-11-02 21:31 ` [PATCH v8 08/19] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-11-02 21:31 ` [PATCH v8 09/19] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-11-02 21:31 ` [PATCH v8 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-11-06 14:33 ` Ville Syrjälä
2018-11-06 16:52 ` Manasi Navare
2018-11-06 17:00 ` Ville Syrjälä
2018-11-06 20:14 ` Manasi Navare
2018-11-06 20:30 ` Ville Syrjälä
2018-11-02 21:31 ` [PATCH v8 11/19] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-11-02 21:31 ` [PATCH v8 12/19] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-11-02 21:31 ` [PATCH v8 13/19] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-11-06 14:36 ` Ville Syrjälä
2018-11-06 16:50 ` Manasi Navare
2018-11-02 21:31 ` [PATCH v8 14/19] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-11-02 21:31 ` Manasi Navare [this message]
2018-11-02 21:31 ` [PATCH v8 16/19] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-11-02 21:31 ` [PATCH v8 17/19] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-11-02 21:31 ` [PATCH v8 18/19] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-11-02 21:31 ` [PATCH v8 19/19] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable Manasi Navare
2018-11-03 2:40 ` Manasi Navare
2018-11-02 21:51 ` ✗ Fi.CI.CHECKPATCH: warning for DSC enabling remaining patches respin Patchwork
2018-11-02 21:57 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-02 22:30 ` ✗ Fi.CI.BAT: failure " Patchwork
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