Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH v8 08/19] drm/i915/dp: Do not enable PSR2 if DSC is enabled
Date: Fri,  2 Nov 2018 14:31:27 -0700	[thread overview]
Message-ID: <20181102213138.301-9-manasi.d.navare@intel.com> (raw)
In-Reply-To: <20181102213138.301-1-manasi.d.navare@intel.com>

If a eDP panel supports both PSR2 and VDSC, our HW cannot
support both at a time. Give priority to PSR2 if a requested
resolution can be supported without compression else enable
VDSC and keep PSR2 disabled.

v4:
Fix the unrealted stuff removed during rebase (Ville)
v3:
* Rebase
v2:
* Add warning for DSC and PSR2 enabled together (DK)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index bc2d88313ed0..08967657b742 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -75,6 +75,10 @@ static bool intel_psr2_enabled(struct drm_i915_private *dev_priv,
 	if (i915_modparams.enable_psr == -1)
 		return false;
 
+	/* Cannot enable DSC and PSR2 simultaneously */
+	WARN_ON(crtc_state->dsc_params.compression_enable &&
+		crtc_state->has_psr2);
+
 	switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
 	case I915_PSR_DEBUG_FORCE_PSR1:
 		return false;
@@ -463,6 +467,16 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	if (!dev_priv->psr.sink_psr2_support)
 		return false;
 
+	/*
+	 * DSC and PSR2 cannot be enabled simultaneously. If a requested
+	 * resolution requires DSC to be enabled, priority is given to DSC
+	 * over PSR2.
+	 */
+	if (crtc_state->dsc_params.compression_enable) {
+		DRM_DEBUG_KMS("PSR2 cannot be enabled since DSC is enabled\n");
+		return false;
+	}
+
 	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
 		psr_max_h = 4096;
 		psr_max_v = 2304;
-- 
2.18.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-11-02 21:31 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-02 21:31 [PATCH v8 00/19] DSC enabling remaining patches respin Manasi Navare
2018-11-02 21:31 ` [PATCH v8 01/19] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-02 21:31 ` [PATCH v8 02/19] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-11-02 21:31 ` [PATCH v8 03/19] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-11-02 21:31 ` [PATCH v8 04/19] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-06  1:38   ` Srivatsa, Anusha
2018-11-06 20:17     ` Manasi Navare
2018-11-02 21:31 ` [PATCH v8 05/19] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-11-02 21:31 ` [PATCH v8 06/19] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-11-02 21:31 ` [PATCH v8 07/19] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-11-03  2:09   ` Manasi Navare
2018-11-06 14:42     ` Ville Syrjälä
2018-11-06 20:37       ` Manasi Navare
2018-11-07 22:31         ` Manasi Navare
2018-11-06 22:41       ` Srivatsa, Anusha
2018-11-06 22:48         ` Manasi Navare
2018-11-02 21:31 ` Manasi Navare [this message]
2018-11-02 21:31 ` [PATCH v8 09/19] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-11-02 21:31 ` [PATCH v8 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-11-06 14:33   ` Ville Syrjälä
2018-11-06 16:52     ` Manasi Navare
2018-11-06 17:00       ` Ville Syrjälä
2018-11-06 20:14         ` Manasi Navare
2018-11-06 20:30           ` Ville Syrjälä
2018-11-02 21:31 ` [PATCH v8 11/19] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-11-02 21:31 ` [PATCH v8 12/19] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-11-02 21:31 ` [PATCH v8 13/19] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-11-06 14:36   ` Ville Syrjälä
2018-11-06 16:50     ` Manasi Navare
2018-11-02 21:31 ` [PATCH v8 14/19] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-11-02 21:31 ` [PATCH v8 15/19] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-11-02 21:31 ` [PATCH v8 16/19] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-11-02 21:31 ` [PATCH v8 17/19] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-11-02 21:31 ` [PATCH v8 18/19] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-11-02 21:31 ` [PATCH v8 19/19] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable Manasi Navare
2018-11-03  2:40   ` Manasi Navare
2018-11-02 21:51 ` ✗ Fi.CI.CHECKPATCH: warning for DSC enabling remaining patches respin Patchwork
2018-11-02 21:57 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-02 22:30 ` ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181102213138.301-9-manasi.d.navare@intel.com \
    --to=manasi.d.navare@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox