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From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/7] drm/i915: do not map aperture if it is not available.
Date: Tue, 29 Oct 2019 09:58:51 +0000	[thread overview]
Message-ID: <20191029095856.25431-2-matthew.auld@intel.com> (raw)
In-Reply-To: <20191029095856.25431-1-matthew.auld@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Skip both setup and cleanup of the aperture mapping if the HW doesn't
have an aperture bar.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index eebc7fee81e2..73dad8c6acc2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2770,7 +2770,9 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
 	i915_address_space_fini(&ggtt->vm);
 
 	arch_phys_wc_del(ggtt->mtrr);
-	io_mapping_fini(&ggtt->iomap);
+
+	if (ggtt->iomap.size)
+		io_mapping_fini(&ggtt->iomap);
 }
 
 /**
@@ -2997,10 +2999,12 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
-	ggtt->gmadr =
-		(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
-						 pci_resource_len(pdev, 2));
-	ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	if (!IS_DGFX(dev_priv)) {
+		ggtt->gmadr =
+			(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
+							 pci_resource_len(pdev, 2));
+		ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	}
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)
@@ -3223,14 +3227,17 @@ static int ggtt_init_hw(struct i915_ggtt *ggtt)
 	if (!HAS_LLC(i915) && !HAS_PPGTT(i915))
 		ggtt->vm.mm.color_adjust = i915_ggtt_color_adjust;
 
-	if (!io_mapping_init_wc(&ggtt->iomap,
-				ggtt->gmadr.start,
-				ggtt->mappable_end)) {
-		ggtt->vm.cleanup(&ggtt->vm);
-		return -EIO;
-	}
+	if (ggtt->mappable_end) {
+		if (!io_mapping_init_wc(&ggtt->iomap,
+					ggtt->gmadr.start,
+					ggtt->mappable_end)) {
+			ggtt->vm.cleanup(&ggtt->vm);
+			return -EIO;
+		}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start, ggtt->mappable_end);
+		ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start,
+					      ggtt->mappable_end);
+	}
 
 	i915_ggtt_init_fences(ggtt);
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/7] drm/i915: do not map aperture if it is not available.
Date: Tue, 29 Oct 2019 09:58:51 +0000	[thread overview]
Message-ID: <20191029095856.25431-2-matthew.auld@intel.com> (raw)
Message-ID: <20191029095851.tQWPzPNv6zv89JcRwleQ61ESYY-h8nyN-YJyDYB9EGk@z> (raw)
In-Reply-To: <20191029095856.25431-1-matthew.auld@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Skip both setup and cleanup of the aperture mapping if the HW doesn't
have an aperture bar.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index eebc7fee81e2..73dad8c6acc2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2770,7 +2770,9 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
 	i915_address_space_fini(&ggtt->vm);
 
 	arch_phys_wc_del(ggtt->mtrr);
-	io_mapping_fini(&ggtt->iomap);
+
+	if (ggtt->iomap.size)
+		io_mapping_fini(&ggtt->iomap);
 }
 
 /**
@@ -2997,10 +2999,12 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
-	ggtt->gmadr =
-		(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
-						 pci_resource_len(pdev, 2));
-	ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	if (!IS_DGFX(dev_priv)) {
+		ggtt->gmadr =
+			(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
+							 pci_resource_len(pdev, 2));
+		ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	}
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)
@@ -3223,14 +3227,17 @@ static int ggtt_init_hw(struct i915_ggtt *ggtt)
 	if (!HAS_LLC(i915) && !HAS_PPGTT(i915))
 		ggtt->vm.mm.color_adjust = i915_ggtt_color_adjust;
 
-	if (!io_mapping_init_wc(&ggtt->iomap,
-				ggtt->gmadr.start,
-				ggtt->mappable_end)) {
-		ggtt->vm.cleanup(&ggtt->vm);
-		return -EIO;
-	}
+	if (ggtt->mappable_end) {
+		if (!io_mapping_init_wc(&ggtt->iomap,
+					ggtt->gmadr.start,
+					ggtt->mappable_end)) {
+			ggtt->vm.cleanup(&ggtt->vm);
+			return -EIO;
+		}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start, ggtt->mappable_end);
+		ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start,
+					      ggtt->mappable_end);
+	}
 
 	i915_ggtt_init_fences(ggtt);
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-10-29  9:59 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-29  9:58 [PATCH 1/7] drm/i915: define i915_ggtt_has_aperture Matthew Auld
2019-10-29  9:58 ` [Intel-gfx] " Matthew Auld
2019-10-29  9:58 ` Matthew Auld [this message]
2019-10-29  9:58   ` [Intel-gfx] [PATCH 2/7] drm/i915: do not map aperture if it is not available Matthew Auld
2019-10-29 10:04   ` Chris Wilson
2019-10-29 10:04     ` [Intel-gfx] " Chris Wilson
2019-10-29  9:58 ` [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture Matthew Auld
2019-10-29  9:58   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:06   ` Chris Wilson
2019-10-29 10:06     ` [Intel-gfx] " Chris Wilson
2019-10-29 21:23   ` Daniele Ceraolo Spurio
2019-10-29 21:23     ` [Intel-gfx] " Daniele Ceraolo Spurio
2019-10-29 21:44     ` Chris Wilson
2019-10-29 21:44       ` [Intel-gfx] " Chris Wilson
2019-10-29 21:50       ` Daniele Ceraolo Spurio
2019-10-29 21:50         ` [Intel-gfx] " Daniele Ceraolo Spurio
2019-10-29  9:58 ` [PATCH 4/7] drm/i915: error capture with no ggtt slot Matthew Auld
2019-10-29  9:58   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:06   ` Chris Wilson
2019-10-29 10:06     ` [Intel-gfx] " Chris Wilson
2019-10-29  9:58 ` [PATCH 5/7] drm/i915: Don't try to place HWS in non-existing mappable region Matthew Auld
2019-10-29  9:58   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:07   ` Chris Wilson
2019-10-29 10:07     ` [Intel-gfx] " Chris Wilson
2019-10-29  9:58 ` [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture Matthew Auld
2019-10-29  9:58   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:08   ` Chris Wilson
2019-10-29 10:08     ` [Intel-gfx] " Chris Wilson
2019-10-29 21:46   ` Daniele Ceraolo Spurio
2019-10-29 21:46     ` [Intel-gfx] " Daniele Ceraolo Spurio
2019-10-29 21:51     ` Chris Wilson
2019-10-29 21:51       ` [Intel-gfx] " Chris Wilson
2019-10-29 21:59       ` Daniele Ceraolo Spurio
2019-10-29 21:59         ` [Intel-gfx] " Daniele Ceraolo Spurio
2019-10-29  9:58 ` [PATCH 7/7] drm/i915/selftests: check for missing aperture Matthew Auld
2019-10-29  9:58   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:09   ` Chris Wilson
2019-10-29 10:09     ` [Intel-gfx] " Chris Wilson
2019-10-29 10:02 ` [PATCH 1/7] drm/i915: define i915_ggtt_has_aperture Chris Wilson
2019-10-29 10:02   ` [Intel-gfx] " Chris Wilson
2019-10-29 10:17 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] " Patchwork
2019-10-29 10:17   ` [Intel-gfx] " Patchwork
2019-10-29 10:20 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-10-29 10:20   ` [Intel-gfx] " Patchwork
2019-10-29 10:37 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-29 10:37   ` [Intel-gfx] " Patchwork
2019-10-29 21:16 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-29 21:16   ` [Intel-gfx] " Patchwork

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