[PATCH 1/7] drm/i915: define i915_ggtt_has_aperture

[PATCH 1/7] drm/i915: define i915_ggtt_has_aperture

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

The following patches in the series will use it to avoid certain
operations when the mappable aperture is not available in HW.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index f074f1de66e8..28044449aa41 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -575,6 +575,11 @@ void i915_ggtt_disable_guc(struct i915_ggtt *ggtt);
 int i915_init_ggtt(struct drm_i915_private *dev_priv);
 void i915_ggtt_driver_release(struct drm_i915_private *dev_priv);
 
+static inline bool i915_ggtt_has_aperture(struct i915_ggtt *ggtt)
+{
+	return ggtt->mappable_end > 0;
+}
+
 int i915_ppgtt_init_hw(struct intel_gt *gt);
 
 struct i915_ppgtt *i915_ppgtt_create(struct drm_i915_private *dev_priv);
-- 
2.20.1

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[Intel-gfx] [PATCH 1/7] drm/i915: define i915_ggtt_has_aperture

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

The following patches in the series will use it to avoid certain
operations when the mappable aperture is not available in HW.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index f074f1de66e8..28044449aa41 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -575,6 +575,11 @@ void i915_ggtt_disable_guc(struct i915_ggtt *ggtt);
 int i915_init_ggtt(struct drm_i915_private *dev_priv);
 void i915_ggtt_driver_release(struct drm_i915_private *dev_priv);
 
+static inline bool i915_ggtt_has_aperture(struct i915_ggtt *ggtt)
+{
+	return ggtt->mappable_end > 0;
+}
+
 int i915_ppgtt_init_hw(struct intel_gt *gt);
 
 struct i915_ppgtt *i915_ppgtt_create(struct drm_i915_private *dev_priv);
-- 
2.20.1

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[PATCH 2/7] drm/i915: do not map aperture if it is not available.

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Skip both setup and cleanup of the aperture mapping if the HW doesn't
have an aperture bar.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index eebc7fee81e2..73dad8c6acc2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2770,7 +2770,9 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
 	i915_address_space_fini(&ggtt->vm);
 
 	arch_phys_wc_del(ggtt->mtrr);
-	io_mapping_fini(&ggtt->iomap);
+
+	if (ggtt->iomap.size)
+		io_mapping_fini(&ggtt->iomap);
 }
 
 /**
@@ -2997,10 +2999,12 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
-	ggtt->gmadr =
-		(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
-						 pci_resource_len(pdev, 2));
-	ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	if (!IS_DGFX(dev_priv)) {
+		ggtt->gmadr =
+			(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
+							 pci_resource_len(pdev, 2));
+		ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	}
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)
@@ -3223,14 +3227,17 @@ static int ggtt_init_hw(struct i915_ggtt *ggtt)
 	if (!HAS_LLC(i915) && !HAS_PPGTT(i915))
 		ggtt->vm.mm.color_adjust = i915_ggtt_color_adjust;
 
-	if (!io_mapping_init_wc(&ggtt->iomap,
-				ggtt->gmadr.start,
-				ggtt->mappable_end)) {
-		ggtt->vm.cleanup(&ggtt->vm);
-		return -EIO;
-	}
+	if (ggtt->mappable_end) {
+		if (!io_mapping_init_wc(&ggtt->iomap,
+					ggtt->gmadr.start,
+					ggtt->mappable_end)) {
+			ggtt->vm.cleanup(&ggtt->vm);
+			return -EIO;
+		}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start, ggtt->mappable_end);
+		ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start,
+					      ggtt->mappable_end);
+	}
 
 	i915_ggtt_init_fences(ggtt);
 
-- 
2.20.1

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[Intel-gfx] [PATCH 2/7] drm/i915: do not map aperture if it is not available.

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Skip both setup and cleanup of the aperture mapping if the HW doesn't
have an aperture bar.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index eebc7fee81e2..73dad8c6acc2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2770,7 +2770,9 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
 	i915_address_space_fini(&ggtt->vm);
 
 	arch_phys_wc_del(ggtt->mtrr);
-	io_mapping_fini(&ggtt->iomap);
+
+	if (ggtt->iomap.size)
+		io_mapping_fini(&ggtt->iomap);
 }
 
 /**
@@ -2997,10 +2999,12 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
-	ggtt->gmadr =
-		(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
-						 pci_resource_len(pdev, 2));
-	ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	if (!IS_DGFX(dev_priv)) {
+		ggtt->gmadr =
+			(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),
+							 pci_resource_len(pdev, 2));
+		ggtt->mappable_end = resource_size(&ggtt->gmadr);
+	}
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)
@@ -3223,14 +3227,17 @@ static int ggtt_init_hw(struct i915_ggtt *ggtt)
 	if (!HAS_LLC(i915) && !HAS_PPGTT(i915))
 		ggtt->vm.mm.color_adjust = i915_ggtt_color_adjust;
 
-	if (!io_mapping_init_wc(&ggtt->iomap,
-				ggtt->gmadr.start,
-				ggtt->mappable_end)) {
-		ggtt->vm.cleanup(&ggtt->vm);
-		return -EIO;
-	}
+	if (ggtt->mappable_end) {
+		if (!io_mapping_init_wc(&ggtt->iomap,
+					ggtt->gmadr.start,
+					ggtt->mappable_end)) {
+			ggtt->vm.cleanup(&ggtt->vm);
+			return -EIO;
+		}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start, ggtt->mappable_end);
+		ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start,
+					      ggtt->mappable_end);
+	}
 
 	i915_ggtt_init_fences(ggtt);
 
-- 
2.20.1

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Re: [PATCH 2/7] drm/i915: do not map aperture if it is not available.

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:51)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> Skip both setup and cleanup of the aperture mapping if the HW doesn't
> have an aperture bar.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++++++++++++++++++-----------
>  1 file changed, 19 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index eebc7fee81e2..73dad8c6acc2 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2770,7 +2770,9 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
>         i915_address_space_fini(&ggtt->vm);
>  
>         arch_phys_wc_del(ggtt->mtrr);
> -       io_mapping_fini(&ggtt->iomap);
> +
> +       if (ggtt->iomap.size)
> +               io_mapping_fini(&ggtt->iomap);

Marginally annoying we had not made io_mapping_fini() nop-proof.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 2/7] drm/i915: do not map aperture if it is not available.

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:51)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> Skip both setup and cleanup of the aperture mapping if the HW doesn't
> have an aperture bar.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++++++++++++++++++-----------
>  1 file changed, 19 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index eebc7fee81e2..73dad8c6acc2 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2770,7 +2770,9 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
>         i915_address_space_fini(&ggtt->vm);
>  
>         arch_phys_wc_del(ggtt->mtrr);
> -       io_mapping_fini(&ggtt->iomap);
> +
> +       if (ggtt->iomap.size)
> +               io_mapping_fini(&ggtt->iomap);

Marginally annoying we had not made io_mapping_fini() nop-proof.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

We can't fence anything without aperture.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 321189e1b0f2..71efccfde122 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
 
 	detect_bit_6_swizzle(ggtt);
 
-	if (INTEL_GEN(i915) >= 7 &&
-	    !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
+	if (!i915_ggtt_has_aperture(ggtt))
+		num_fences = 0;
+	else if (INTEL_GEN(i915) >= 7 &&
+		 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
 		num_fences = 32;
 	else if (INTEL_GEN(i915) >= 4 ||
 		 IS_I945G(i915) || IS_I945GM(i915) ||
-- 
2.20.1

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[Intel-gfx] [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

We can't fence anything without aperture.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 321189e1b0f2..71efccfde122 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
 
 	detect_bit_6_swizzle(ggtt);
 
-	if (INTEL_GEN(i915) >= 7 &&
-	    !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
+	if (!i915_ggtt_has_aperture(ggtt))
+		num_fences = 0;
+	else if (INTEL_GEN(i915) >= 7 &&
+		 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
 		num_fences = 32;
 	else if (INTEL_GEN(i915) >= 4 ||
 		 IS_I945G(i915) || IS_I945GM(i915) ||
-- 
2.20.1

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Re: [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:52)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> We can't fence anything without aperture.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>

Neat.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:52)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> We can't fence anything without aperture.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>

Neat.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:58 AM, Matthew Auld wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> We can't fence anything without aperture.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> index 321189e1b0f2..71efccfde122 100644
> --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> @@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
>   
>   	detect_bit_6_swizzle(ggtt);
>   
> -	if (INTEL_GEN(i915) >= 7 &&
> -	    !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
> +	if (!i915_ggtt_has_aperture(ggtt))

Daniel had mentioned that the fencing HW has been nerfed in gen12 and 
suggested settings num_fences to zero for all gen12+. Should we go 
directly with that?

Daniele

> +		num_fences = 0;
> +	else if (INTEL_GEN(i915) >= 7 &&
> +		 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
>   		num_fences = 32;
>   	else if (INTEL_GEN(i915) >= 4 ||
>   		 IS_I945G(i915) || IS_I945GM(i915) ||
> 
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Re: [Intel-gfx] [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:58 AM, Matthew Auld wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> We can't fence anything without aperture.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> index 321189e1b0f2..71efccfde122 100644
> --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> @@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
>   
>   	detect_bit_6_swizzle(ggtt);
>   
> -	if (INTEL_GEN(i915) >= 7 &&
> -	    !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
> +	if (!i915_ggtt_has_aperture(ggtt))

Daniel had mentioned that the fencing HW has been nerfed in gen12 and 
suggested settings num_fences to zero for all gen12+. Should we go 
directly with that?

Daniele

> +		num_fences = 0;
> +	else if (INTEL_GEN(i915) >= 7 &&
> +		 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
>   		num_fences = 32;
>   	else if (INTEL_GEN(i915) >= 4 ||
>   		 IS_I945G(i915) || IS_I945GM(i915) ||
> 
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Re: [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-10-29 21:23:16)
> 
> 
> On 10/29/19 2:58 AM, Matthew Auld wrote:
> > From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > 
> > We can't fence anything without aperture.
> > 
> > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > ---
> >   drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
> >   1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > index 321189e1b0f2..71efccfde122 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > @@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
> >   
> >       detect_bit_6_swizzle(ggtt);
> >   
> > -     if (INTEL_GEN(i915) >= 7 &&
> > -         !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
> > +     if (!i915_ggtt_has_aperture(ggtt))
> 
> Daniel had mentioned that the fencing HW has been nerfed in gen12 and 
> suggested settings num_fences to zero for all gen12+. Should we go 
> directly with that?

Do fences exist, yes/no? If there are literally no fences forevermore...
tgl begs to differ though.
-Chris
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Re: [Intel-gfx] [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-10-29 21:23:16)
> 
> 
> On 10/29/19 2:58 AM, Matthew Auld wrote:
> > From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > 
> > We can't fence anything without aperture.
> > 
> > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > ---
> >   drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
> >   1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > index 321189e1b0f2..71efccfde122 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > @@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
> >   
> >       detect_bit_6_swizzle(ggtt);
> >   
> > -     if (INTEL_GEN(i915) >= 7 &&
> > -         !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
> > +     if (!i915_ggtt_has_aperture(ggtt))
> 
> Daniel had mentioned that the fencing HW has been nerfed in gen12 and 
> suggested settings num_fences to zero for all gen12+. Should we go 
> directly with that?

Do fences exist, yes/no? If there are literally no fences forevermore...
tgl begs to differ though.
-Chris
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Re: [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:44 PM, Chris Wilson wrote:
> Quoting Daniele Ceraolo Spurio (2019-10-29 21:23:16)
>>
>>
>> On 10/29/19 2:58 AM, Matthew Auld wrote:
>>> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>>
>>> We can't fence anything without aperture.
>>>
>>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>> ---
>>>    drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
>>>    1 file changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>>> index 321189e1b0f2..71efccfde122 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>>> @@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
>>>    
>>>        detect_bit_6_swizzle(ggtt);
>>>    
>>> -     if (INTEL_GEN(i915) >= 7 &&
>>> -         !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
>>> +     if (!i915_ggtt_has_aperture(ggtt))
>>
>> Daniel had mentioned that the fencing HW has been nerfed in gen12 and
>> suggested settings num_fences to zero for all gen12+. Should we go
>> directly with that?
> 
> Do fences exist, yes/no? If there are literally no fences forevermore...
> tgl begs to differ though.
> -Chris
> 

The registers are there in the specs and I don't see any special notes 
about their usage. I'll leave it to Daniel to comment on the capability 
reduction he mentioned. Not a blocker for this patch in the meantime.

Daniele

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Re: [Intel-gfx] [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:44 PM, Chris Wilson wrote:
> Quoting Daniele Ceraolo Spurio (2019-10-29 21:23:16)
>>
>>
>> On 10/29/19 2:58 AM, Matthew Auld wrote:
>>> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>>
>>> We can't fence anything without aperture.
>>>
>>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>> ---
>>>    drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
>>>    1 file changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>>> index 321189e1b0f2..71efccfde122 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>>> @@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
>>>    
>>>        detect_bit_6_swizzle(ggtt);
>>>    
>>> -     if (INTEL_GEN(i915) >= 7 &&
>>> -         !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
>>> +     if (!i915_ggtt_has_aperture(ggtt))
>>
>> Daniel had mentioned that the fencing HW has been nerfed in gen12 and
>> suggested settings num_fences to zero for all gen12+. Should we go
>> directly with that?
> 
> Do fences exist, yes/no? If there are literally no fences forevermore...
> tgl begs to differ though.
> -Chris
> 

The registers are there in the specs and I don't see any special notes 
about their usage. I'll leave it to Daniel to comment on the capability 
reduction he mentioned. Not a blocker for this patch in the meantime.

Daniele

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[PATCH 4/7] drm/i915: error capture with no ggtt slot

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

If the aperture is not available in HW we can't use a ggtt slot and wc
copy, so fall back to regular kmap.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 19 ++++----
 drivers/gpu/drm/i915/i915_gpu_error.c | 66 ++++++++++++++++++++++-----
 2 files changed, 65 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 73dad8c6acc2..ba047e329028 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2661,7 +2661,8 @@ static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
 static void cleanup_init_ggtt(struct i915_ggtt *ggtt)
 {
 	ggtt_release_guc_top(ggtt);
-	drm_mm_remove_node(&ggtt->error_capture);
+	if (drm_mm_node_allocated(&ggtt->error_capture))
+		drm_mm_remove_node(&ggtt->error_capture);
 }
 
 static int init_ggtt(struct i915_ggtt *ggtt)
@@ -2692,13 +2693,15 @@ static int init_ggtt(struct i915_ggtt *ggtt)
 	if (ret)
 		return ret;
 
-	/* Reserve a mappable slot for our lockless error capture */
-	ret = drm_mm_insert_node_in_range(&ggtt->vm.mm, &ggtt->error_capture,
-					  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
-					  0, ggtt->mappable_end,
-					  DRM_MM_INSERT_LOW);
-	if (ret)
-		return ret;
+	if (ggtt->mappable_end) {
+		/* Reserve a mappable slot for our lockless error capture */
+		ret = drm_mm_insert_node_in_range(&ggtt->vm.mm, &ggtt->error_capture,
+						  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
+						  0, ggtt->mappable_end,
+						  DRM_MM_INSERT_LOW);
+		if (ret)
+			return ret;
+	}
 
 	/*
 	 * The upper portion of the GuC address space has a sizeable hole
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 9bcdcebd2948..d7540c283de8 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -40,6 +40,7 @@
 #include "display/intel_overlay.h"
 
 #include "gem/i915_gem_context.h"
+#include "gem/i915_gem_lmem.h"
 
 #include "i915_drv.h"
 #include "i915_gpu_error.h"
@@ -235,6 +236,7 @@ struct compress {
 	struct pagevec pool;
 	struct z_stream_s zstream;
 	void *tmp;
+	bool wc;
 };
 
 static bool compress_init(struct compress *c)
@@ -292,7 +294,7 @@ static int compress_page(struct compress *c,
 	struct z_stream_s *zstream = &c->zstream;
 
 	zstream->next_in = src;
-	if (c->tmp && i915_memcpy_from_wc(c->tmp, src, PAGE_SIZE))
+	if (c->wc && c->tmp && i915_memcpy_from_wc(c->tmp, src, PAGE_SIZE))
 		zstream->next_in = c->tmp;
 	zstream->avail_in = PAGE_SIZE;
 
@@ -367,6 +369,7 @@ static void err_compression_marker(struct drm_i915_error_state_buf *m)
 
 struct compress {
 	struct pagevec pool;
+	bool wc;
 };
 
 static bool compress_init(struct compress *c)
@@ -389,7 +392,7 @@ static int compress_page(struct compress *c,
 	if (!ptr)
 		return -ENOMEM;
 
-	if (!i915_memcpy_from_wc(ptr, src, PAGE_SIZE))
+	if (!(c->wc && i915_memcpy_from_wc(ptr, src, PAGE_SIZE)))
 		memcpy(ptr, src, PAGE_SIZE);
 	dst->pages[dst->page_count++] = ptr;
 
@@ -966,7 +969,6 @@ i915_error_object_create(struct drm_i915_private *i915,
 	struct drm_i915_error_object *dst;
 	unsigned long num_pages;
 	struct sgt_iter iter;
-	dma_addr_t dma;
 	int ret;
 
 	might_sleep();
@@ -992,17 +994,54 @@ i915_error_object_create(struct drm_i915_private *i915,
 	dst->page_count = 0;
 	dst->unused = 0;
 
+	compress->wc = i915_gem_object_is_lmem(vma->obj) ||
+		       drm_mm_node_allocated(&ggtt->error_capture);
+
 	ret = -EINVAL;
-	for_each_sgt_daddr(dma, iter, vma->pages) {
+	if (drm_mm_node_allocated(&ggtt->error_capture)) {
 		void __iomem *s;
+		dma_addr_t dma;
 
-		ggtt->vm.insert_page(&ggtt->vm, dma, slot, I915_CACHE_NONE, 0);
+		for_each_sgt_daddr(dma, iter, vma->pages) {
+			ggtt->vm.insert_page(&ggtt->vm, dma, slot,
+					     I915_CACHE_NONE, 0);
 
-		s = io_mapping_map_wc(&ggtt->iomap, slot, PAGE_SIZE);
-		ret = compress_page(compress, (void  __force *)s, dst);
-		io_mapping_unmap(s);
-		if (ret)
-			break;
+			s = io_mapping_map_wc(&ggtt->iomap, slot, PAGE_SIZE);
+			ret = compress_page(compress, (void  __force *)s, dst);
+			io_mapping_unmap(s);
+			if (ret)
+				break;
+		}
+	} else if (i915_gem_object_is_lmem(vma->obj)) {
+		struct intel_memory_region *mem = vma->obj->mm.region;
+		dma_addr_t dma;
+
+		for_each_sgt_daddr(dma, iter, vma->pages) {
+			void __iomem *s;
+
+			s = io_mapping_map_atomic_wc(&mem->iomap, dma);
+			ret = compress_page(compress, s, dst);
+			io_mapping_unmap_atomic(s);
+			if (ret)
+				break;
+		}
+	} else {
+		struct page *page;
+
+		for_each_sgt_page(page, iter, vma->pages) {
+			void *s;
+
+			drm_clflush_pages(&page, 1);
+
+			s = kmap_atomic(page);
+			ret = compress_page(compress, s, dst);
+			kunmap_atomic(s);
+
+			drm_clflush_pages(&page, 1);
+
+			if (ret)
+				break;
+		}
 	}
 
 	if (ret || compress_flush(compress, dst)) {
@@ -1657,9 +1696,12 @@ static void capture_params(struct i915_gpu_state *error)
 static void capture_finish(struct i915_gpu_state *error)
 {
 	struct i915_ggtt *ggtt = &error->i915->ggtt;
-	const u64 slot = ggtt->error_capture.start;
 
-	ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE);
+	if (drm_mm_node_allocated(&ggtt->error_capture)) {
+		const u64 slot = ggtt->error_capture.start;
+
+		ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE);
+	}
 }
 
 #define DAY_AS_SECONDS(x) (24 * 60 * 60 * (x))
-- 
2.20.1

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[Intel-gfx] [PATCH 4/7] drm/i915: error capture with no ggtt slot

[Matthew Auld]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

If the aperture is not available in HW we can't use a ggtt slot and wc
copy, so fall back to regular kmap.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 19 ++++----
 drivers/gpu/drm/i915/i915_gpu_error.c | 66 ++++++++++++++++++++++-----
 2 files changed, 65 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 73dad8c6acc2..ba047e329028 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2661,7 +2661,8 @@ static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
 static void cleanup_init_ggtt(struct i915_ggtt *ggtt)
 {
 	ggtt_release_guc_top(ggtt);
-	drm_mm_remove_node(&ggtt->error_capture);
+	if (drm_mm_node_allocated(&ggtt->error_capture))
+		drm_mm_remove_node(&ggtt->error_capture);
 }
 
 static int init_ggtt(struct i915_ggtt *ggtt)
@@ -2692,13 +2693,15 @@ static int init_ggtt(struct i915_ggtt *ggtt)
 	if (ret)
 		return ret;
 
-	/* Reserve a mappable slot for our lockless error capture */
-	ret = drm_mm_insert_node_in_range(&ggtt->vm.mm, &ggtt->error_capture,
-					  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
-					  0, ggtt->mappable_end,
-					  DRM_MM_INSERT_LOW);
-	if (ret)
-		return ret;
+	if (ggtt->mappable_end) {
+		/* Reserve a mappable slot for our lockless error capture */
+		ret = drm_mm_insert_node_in_range(&ggtt->vm.mm, &ggtt->error_capture,
+						  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
+						  0, ggtt->mappable_end,
+						  DRM_MM_INSERT_LOW);
+		if (ret)
+			return ret;
+	}
 
 	/*
 	 * The upper portion of the GuC address space has a sizeable hole
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 9bcdcebd2948..d7540c283de8 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -40,6 +40,7 @@
 #include "display/intel_overlay.h"
 
 #include "gem/i915_gem_context.h"
+#include "gem/i915_gem_lmem.h"
 
 #include "i915_drv.h"
 #include "i915_gpu_error.h"
@@ -235,6 +236,7 @@ struct compress {
 	struct pagevec pool;
 	struct z_stream_s zstream;
 	void *tmp;
+	bool wc;
 };
 
 static bool compress_init(struct compress *c)
@@ -292,7 +294,7 @@ static int compress_page(struct compress *c,
 	struct z_stream_s *zstream = &c->zstream;
 
 	zstream->next_in = src;
-	if (c->tmp && i915_memcpy_from_wc(c->tmp, src, PAGE_SIZE))
+	if (c->wc && c->tmp && i915_memcpy_from_wc(c->tmp, src, PAGE_SIZE))
 		zstream->next_in = c->tmp;
 	zstream->avail_in = PAGE_SIZE;
 
@@ -367,6 +369,7 @@ static void err_compression_marker(struct drm_i915_error_state_buf *m)
 
 struct compress {
 	struct pagevec pool;
+	bool wc;
 };
 
 static bool compress_init(struct compress *c)
@@ -389,7 +392,7 @@ static int compress_page(struct compress *c,
 	if (!ptr)
 		return -ENOMEM;
 
-	if (!i915_memcpy_from_wc(ptr, src, PAGE_SIZE))
+	if (!(c->wc && i915_memcpy_from_wc(ptr, src, PAGE_SIZE)))
 		memcpy(ptr, src, PAGE_SIZE);
 	dst->pages[dst->page_count++] = ptr;
 
@@ -966,7 +969,6 @@ i915_error_object_create(struct drm_i915_private *i915,
 	struct drm_i915_error_object *dst;
 	unsigned long num_pages;
 	struct sgt_iter iter;
-	dma_addr_t dma;
 	int ret;
 
 	might_sleep();
@@ -992,17 +994,54 @@ i915_error_object_create(struct drm_i915_private *i915,
 	dst->page_count = 0;
 	dst->unused = 0;
 
+	compress->wc = i915_gem_object_is_lmem(vma->obj) ||
+		       drm_mm_node_allocated(&ggtt->error_capture);
+
 	ret = -EINVAL;
-	for_each_sgt_daddr(dma, iter, vma->pages) {
+	if (drm_mm_node_allocated(&ggtt->error_capture)) {
 		void __iomem *s;
+		dma_addr_t dma;
 
-		ggtt->vm.insert_page(&ggtt->vm, dma, slot, I915_CACHE_NONE, 0);
+		for_each_sgt_daddr(dma, iter, vma->pages) {
+			ggtt->vm.insert_page(&ggtt->vm, dma, slot,
+					     I915_CACHE_NONE, 0);
 
-		s = io_mapping_map_wc(&ggtt->iomap, slot, PAGE_SIZE);
-		ret = compress_page(compress, (void  __force *)s, dst);
-		io_mapping_unmap(s);
-		if (ret)
-			break;
+			s = io_mapping_map_wc(&ggtt->iomap, slot, PAGE_SIZE);
+			ret = compress_page(compress, (void  __force *)s, dst);
+			io_mapping_unmap(s);
+			if (ret)
+				break;
+		}
+	} else if (i915_gem_object_is_lmem(vma->obj)) {
+		struct intel_memory_region *mem = vma->obj->mm.region;
+		dma_addr_t dma;
+
+		for_each_sgt_daddr(dma, iter, vma->pages) {
+			void __iomem *s;
+
+			s = io_mapping_map_atomic_wc(&mem->iomap, dma);
+			ret = compress_page(compress, s, dst);
+			io_mapping_unmap_atomic(s);
+			if (ret)
+				break;
+		}
+	} else {
+		struct page *page;
+
+		for_each_sgt_page(page, iter, vma->pages) {
+			void *s;
+
+			drm_clflush_pages(&page, 1);
+
+			s = kmap_atomic(page);
+			ret = compress_page(compress, s, dst);
+			kunmap_atomic(s);
+
+			drm_clflush_pages(&page, 1);
+
+			if (ret)
+				break;
+		}
 	}
 
 	if (ret || compress_flush(compress, dst)) {
@@ -1657,9 +1696,12 @@ static void capture_params(struct i915_gpu_state *error)
 static void capture_finish(struct i915_gpu_state *error)
 {
 	struct i915_ggtt *ggtt = &error->i915->ggtt;
-	const u64 slot = ggtt->error_capture.start;
 
-	ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE);
+	if (drm_mm_node_allocated(&ggtt->error_capture)) {
+		const u64 slot = ggtt->error_capture.start;
+
+		ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE);
+	}
 }
 
 #define DAY_AS_SECONDS(x) (24 * 60 * 60 * (x))
-- 
2.20.1

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Re: [PATCH 4/7] drm/i915: error capture with no ggtt slot

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:53)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> If the aperture is not available in HW we can't use a ggtt slot and wc
> copy, so fall back to regular kmap.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
> +       } else if (i915_gem_object_is_lmem(vma->obj)) {
> +               struct intel_memory_region *mem = vma->obj->mm.region;
> +               dma_addr_t dma;
> +
> +               for_each_sgt_daddr(dma, iter, vma->pages) {
> +                       void __iomem *s;
> +
> +                       s = io_mapping_map_atomic_wc(&mem->iomap, dma);
> +                       ret = compress_page(compress, s, dst);

Just a (void __force *)s required here.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Re: [Intel-gfx] [PATCH 4/7] drm/i915: error capture with no ggtt slot

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:53)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> If the aperture is not available in HW we can't use a ggtt slot and wc
> copy, so fall back to regular kmap.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
> +       } else if (i915_gem_object_is_lmem(vma->obj)) {
> +               struct intel_memory_region *mem = vma->obj->mm.region;
> +               dma_addr_t dma;
> +
> +               for_each_sgt_daddr(dma, iter, vma->pages) {
> +                       void __iomem *s;
> +
> +                       s = io_mapping_map_atomic_wc(&mem->iomap, dma);
> +                       ret = compress_page(compress, s, dst);

Just a (void __force *)s required here.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[PATCH 5/7] drm/i915: Don't try to place HWS in non-existing mappable region

[Matthew Auld]

From: Michal Wajdeczko <michal.wajdeczko@intel.com>

HWS placement restrictions can't just rely on HAS_LLC flag.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 9cc1ea6519ec..355523114c71 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -528,7 +528,7 @@ static int pin_ggtt_status_page(struct intel_engine_cs *engine,
 	unsigned int flags;
 
 	flags = PIN_GLOBAL;
-	if (!HAS_LLC(engine->i915))
+	if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt))
 		/*
 		 * On g33, we cannot place HWS above 256MiB, so
 		 * restrict its pinning to the low mappable arena.
-- 
2.20.1

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[Intel-gfx] [PATCH 5/7] drm/i915: Don't try to place HWS in non-existing mappable region

[Matthew Auld]

From: Michal Wajdeczko <michal.wajdeczko@intel.com>

HWS placement restrictions can't just rely on HAS_LLC flag.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 9cc1ea6519ec..355523114c71 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -528,7 +528,7 @@ static int pin_ggtt_status_page(struct intel_engine_cs *engine,
 	unsigned int flags;
 
 	flags = PIN_GLOBAL;
-	if (!HAS_LLC(engine->i915))
+	if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt))
 		/*
 		 * On g33, we cannot place HWS above 256MiB, so
 		 * restrict its pinning to the low mappable arena.
-- 
2.20.1

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Re: [PATCH 5/7] drm/i915: Don't try to place HWS in non-existing mappable region

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:54)
> From: Michal Wajdeczko <michal.wajdeczko@intel.com>
> 
> HWS placement restrictions can't just rely on HAS_LLC flag.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 9cc1ea6519ec..355523114c71 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -528,7 +528,7 @@ static int pin_ggtt_status_page(struct intel_engine_cs *engine,
>         unsigned int flags;
>  
>         flags = PIN_GLOBAL;
> -       if (!HAS_LLC(engine->i915))
> +       if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt))
>                 /*
>                  * On g33, we cannot place HWS above 256MiB, so
>                  * restrict its pinning to the low mappable arena.

How we will laugh if it turns out future HW cannot handle having the
HWSP placed anywhere! :)

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 5/7] drm/i915: Don't try to place HWS in non-existing mappable region

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:54)
> From: Michal Wajdeczko <michal.wajdeczko@intel.com>
> 
> HWS placement restrictions can't just rely on HAS_LLC flag.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 9cc1ea6519ec..355523114c71 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -528,7 +528,7 @@ static int pin_ggtt_status_page(struct intel_engine_cs *engine,
>         unsigned int flags;
>  
>         flags = PIN_GLOBAL;
> -       if (!HAS_LLC(engine->i915))
> +       if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt))
>                 /*
>                  * On g33, we cannot place HWS above 256MiB, so
>                  * restrict its pinning to the low mappable arena.

How we will laugh if it turns out future HW cannot handle having the
HWSP placed anywhere! :)

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Matthew Auld]

Since we have no way access it from the CPU. For such cases just
fallback to internal objects.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_ring.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
index fa01c1407760..ece20504d240 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -108,7 +108,9 @@ static struct i915_vma *create_ring_vma(struct i915_ggtt *ggtt, int size)
 	struct drm_i915_gem_object *obj;
 	struct i915_vma *vma;
 
-	obj = i915_gem_object_create_stolen(i915, size);
+	obj = ERR_PTR(-ENODEV);
+	if (i915_ggtt_has_aperture(ggtt))
+		obj = i915_gem_object_create_stolen(i915, size);
 	if (IS_ERR(obj))
 		obj = i915_gem_object_create_internal(i915, size);
 	if (IS_ERR(obj))
-- 
2.20.1

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[Intel-gfx] [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Matthew Auld]

Since we have no way access it from the CPU. For such cases just
fallback to internal objects.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_ring.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
index fa01c1407760..ece20504d240 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -108,7 +108,9 @@ static struct i915_vma *create_ring_vma(struct i915_ggtt *ggtt, int size)
 	struct drm_i915_gem_object *obj;
 	struct i915_vma *vma;
 
-	obj = i915_gem_object_create_stolen(i915, size);
+	obj = ERR_PTR(-ENODEV);
+	if (i915_ggtt_has_aperture(ggtt))
+		obj = i915_gem_object_create_stolen(i915, size);
 	if (IS_ERR(obj))
 		obj = i915_gem_object_create_internal(i915, size);
 	if (IS_ERR(obj))
-- 
2.20.1

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Re: [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:55)
> Since we have no way access it from the CPU. For such cases just
> fallback to internal objects.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:55)
> Since we have no way access it from the CPU. For such cases just
> fallback to internal objects.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:58 AM, Matthew Auld wrote:
> Since we have no way access it from the CPU. For such cases just
> fallback to internal objects.
> 

Since the problem is not limited to rings but it applies to all stolen 
objects, wouldn't it be better to just skip the stolen initialization or 
return an error from i915_gem_object_create_stolen()?

Daniele

> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_ring.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> index fa01c1407760..ece20504d240 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> @@ -108,7 +108,9 @@ static struct i915_vma *create_ring_vma(struct i915_ggtt *ggtt, int size)
>   	struct drm_i915_gem_object *obj;
>   	struct i915_vma *vma;
>   
> -	obj = i915_gem_object_create_stolen(i915, size);
> +	obj = ERR_PTR(-ENODEV);
> +	if (i915_ggtt_has_aperture(ggtt))
> +		obj = i915_gem_object_create_stolen(i915, size);
>   	if (IS_ERR(obj))
>   		obj = i915_gem_object_create_internal(i915, size);
>   	if (IS_ERR(obj))
> 
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Re: [Intel-gfx] [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:58 AM, Matthew Auld wrote:
> Since we have no way access it from the CPU. For such cases just
> fallback to internal objects.
> 

Since the problem is not limited to rings but it applies to all stolen 
objects, wouldn't it be better to just skip the stolen initialization or 
return an error from i915_gem_object_create_stolen()?

Daniele

> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_ring.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> index fa01c1407760..ece20504d240 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> @@ -108,7 +108,9 @@ static struct i915_vma *create_ring_vma(struct i915_ggtt *ggtt, int size)
>   	struct drm_i915_gem_object *obj;
>   	struct i915_vma *vma;
>   
> -	obj = i915_gem_object_create_stolen(i915, size);
> +	obj = ERR_PTR(-ENODEV);
> +	if (i915_ggtt_has_aperture(ggtt))
> +		obj = i915_gem_object_create_stolen(i915, size);
>   	if (IS_ERR(obj))
>   		obj = i915_gem_object_create_internal(i915, size);
>   	if (IS_ERR(obj))
> 
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Re: [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-10-29 21:46:46)
> 
> 
> On 10/29/19 2:58 AM, Matthew Auld wrote:
> > Since we have no way access it from the CPU. For such cases just
> > fallback to internal objects.
> > 
> 
> Since the problem is not limited to rings but it applies to all stolen 
> objects, wouldn't it be better to just skip the stolen initialization or 
> return an error from i915_gem_object_create_stolen()?

Not all stolen objects are accessed on the CPU, the problem expressed
here is not universal.
-Chris
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Re: [Intel-gfx] [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-10-29 21:46:46)
> 
> 
> On 10/29/19 2:58 AM, Matthew Auld wrote:
> > Since we have no way access it from the CPU. For such cases just
> > fallback to internal objects.
> > 
> 
> Since the problem is not limited to rings but it applies to all stolen 
> objects, wouldn't it be better to just skip the stolen initialization or 
> return an error from i915_gem_object_create_stolen()?

Not all stolen objects are accessed on the CPU, the problem expressed
here is not universal.
-Chris
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Re: [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:51 PM, Chris Wilson wrote:
> Quoting Daniele Ceraolo Spurio (2019-10-29 21:46:46)
>>
>>
>> On 10/29/19 2:58 AM, Matthew Auld wrote:
>>> Since we have no way access it from the CPU. For such cases just
>>> fallback to internal objects.
>>>
>>
>> Since the problem is not limited to rings but it applies to all stolen
>> objects, wouldn't it be better to just skip the stolen initialization or
>> return an error from i915_gem_object_create_stolen()?
> 
> Not all stolen objects are accessed on the CPU, the problem expressed
> here is not universal.
> -Chris
> 

ok, please ignore my comment then.

Daniele
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Re: [Intel-gfx] [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture

[Daniele Ceraolo Spurio]

On 10/29/19 2:51 PM, Chris Wilson wrote:
> Quoting Daniele Ceraolo Spurio (2019-10-29 21:46:46)
>>
>>
>> On 10/29/19 2:58 AM, Matthew Auld wrote:
>>> Since we have no way access it from the CPU. For such cases just
>>> fallback to internal objects.
>>>
>>
>> Since the problem is not limited to rings but it applies to all stolen
>> objects, wouldn't it be better to just skip the stolen initialization or
>> return an error from i915_gem_object_create_stolen()?
> 
> Not all stolen objects are accessed on the CPU, the problem expressed
> here is not universal.
> -Chris
> 

ok, please ignore my comment then.

Daniele
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[PATCH 7/7] drm/i915/selftests: check for missing aperture

[Matthew Auld]

We may be missing support for the mappable aperture on some platforms.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 .../drm/i915/gem/selftests/i915_gem_coherency.c    |  5 ++++-
 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c |  6 ++++++
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c       | 14 ++++++++++----
 drivers/gpu/drm/i915/selftests/i915_gem.c          |  4 ++++
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c      |  3 +++
 5 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 0a195e5b98e6..279e9047bc6d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -250,7 +250,10 @@ static bool always_valid(struct context *ctx)
 
 static bool needs_fence_registers(struct context *ctx)
 {
-	return !intel_gt_is_wedged(ctx->engine->gt);
+	if (intel_gt_is_wedged(ctx->engine->gt))
+		return false;
+
+	return ctx->engine->gt->ggtt->num_fences;
 }
 
 static bool needs_mi_store_dword(struct context *ctx)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index d45a93928ff5..29b2077b73d2 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -301,6 +301,9 @@ static int igt_partial_tiling(void *arg)
 	int tiling;
 	int err;
 
+	if (!i915_ggtt_has_aperture(&i915->ggtt))
+		return 0;
+
 	/* We want to check the page mapping and fencing of a large object
 	 * mmapped through the GTT. The object we create is larger than can
 	 * possibly be mmaped as a whole, and so we must use partial GGTT vma.
@@ -431,6 +434,9 @@ static int igt_smoke_tiling(void *arg)
 	IGT_TIMEOUT(end);
 	int err;
 
+	if (!i915_ggtt_has_aperture(&i915->ggtt))
+		return 0;
+
 	/*
 	 * igt_partial_tiling() does an exhastive check of partial tiling
 	 * chunking, but will undoubtably run out of time. Here, we do a
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index b7207b488391..8abc0a1d692b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -1149,8 +1149,12 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 	struct i915_request *rq;
 	struct evict_vma arg;
 	struct hang h;
+	unsigned int pin_flags;
 	int err;
 
+	if (!gt->ggtt->num_fences && flags & EXEC_OBJECT_NEEDS_FENCE)
+		return 0;
+
 	if (!engine || !intel_engine_can_store_dword(engine))
 		return 0;
 
@@ -1186,10 +1190,12 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 		goto out_obj;
 	}
 
-	err = i915_vma_pin(arg.vma, 0, 0,
-			   i915_vma_is_ggtt(arg.vma) ?
-			   PIN_GLOBAL | PIN_MAPPABLE :
-			   PIN_USER);
+	pin_flags = i915_vma_is_ggtt(arg.vma) ? PIN_GLOBAL : PIN_USER;
+
+	if (flags & EXEC_OBJECT_NEEDS_FENCE)
+		pin_flags |= PIN_MAPPABLE;
+
+	err = i915_vma_pin(arg.vma, 0, 0, pin_flags);
 	if (err) {
 		i915_request_add(rq);
 		goto out_obj;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
index 6d22567ad620..e378543ed453 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -45,6 +45,10 @@ static void trash_stolen(struct drm_i915_private *i915)
 	unsigned long page;
 	u32 prng = 0x12345678;
 
+	/* XXX: fsck. needs some more thought... */
+	if (!i915_ggtt_has_aperture(ggtt))
+		return;
+
 	for (page = 0; page < size; page += PAGE_SIZE) {
 		const dma_addr_t dma = i915->dsm.start + page;
 		u32 __iomem *s;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index a1cb072e4a1b..3f7e80fb3bbd 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -1149,6 +1149,9 @@ static int igt_ggtt_page(void *arg)
 	unsigned int *order, n;
 	int err;
 
+	if (!i915_ggtt_has_aperture(ggtt))
+		return 0;
+
 	obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
 	if (IS_ERR(obj))
 		return PTR_ERR(obj);
-- 
2.20.1

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[Intel-gfx] [PATCH 7/7] drm/i915/selftests: check for missing aperture

[Matthew Auld]

We may be missing support for the mappable aperture on some platforms.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 .../drm/i915/gem/selftests/i915_gem_coherency.c    |  5 ++++-
 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c |  6 ++++++
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c       | 14 ++++++++++----
 drivers/gpu/drm/i915/selftests/i915_gem.c          |  4 ++++
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c      |  3 +++
 5 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 0a195e5b98e6..279e9047bc6d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -250,7 +250,10 @@ static bool always_valid(struct context *ctx)
 
 static bool needs_fence_registers(struct context *ctx)
 {
-	return !intel_gt_is_wedged(ctx->engine->gt);
+	if (intel_gt_is_wedged(ctx->engine->gt))
+		return false;
+
+	return ctx->engine->gt->ggtt->num_fences;
 }
 
 static bool needs_mi_store_dword(struct context *ctx)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index d45a93928ff5..29b2077b73d2 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -301,6 +301,9 @@ static int igt_partial_tiling(void *arg)
 	int tiling;
 	int err;
 
+	if (!i915_ggtt_has_aperture(&i915->ggtt))
+		return 0;
+
 	/* We want to check the page mapping and fencing of a large object
 	 * mmapped through the GTT. The object we create is larger than can
 	 * possibly be mmaped as a whole, and so we must use partial GGTT vma.
@@ -431,6 +434,9 @@ static int igt_smoke_tiling(void *arg)
 	IGT_TIMEOUT(end);
 	int err;
 
+	if (!i915_ggtt_has_aperture(&i915->ggtt))
+		return 0;
+
 	/*
 	 * igt_partial_tiling() does an exhastive check of partial tiling
 	 * chunking, but will undoubtably run out of time. Here, we do a
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index b7207b488391..8abc0a1d692b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -1149,8 +1149,12 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 	struct i915_request *rq;
 	struct evict_vma arg;
 	struct hang h;
+	unsigned int pin_flags;
 	int err;
 
+	if (!gt->ggtt->num_fences && flags & EXEC_OBJECT_NEEDS_FENCE)
+		return 0;
+
 	if (!engine || !intel_engine_can_store_dword(engine))
 		return 0;
 
@@ -1186,10 +1190,12 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 		goto out_obj;
 	}
 
-	err = i915_vma_pin(arg.vma, 0, 0,
-			   i915_vma_is_ggtt(arg.vma) ?
-			   PIN_GLOBAL | PIN_MAPPABLE :
-			   PIN_USER);
+	pin_flags = i915_vma_is_ggtt(arg.vma) ? PIN_GLOBAL : PIN_USER;
+
+	if (flags & EXEC_OBJECT_NEEDS_FENCE)
+		pin_flags |= PIN_MAPPABLE;
+
+	err = i915_vma_pin(arg.vma, 0, 0, pin_flags);
 	if (err) {
 		i915_request_add(rq);
 		goto out_obj;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
index 6d22567ad620..e378543ed453 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -45,6 +45,10 @@ static void trash_stolen(struct drm_i915_private *i915)
 	unsigned long page;
 	u32 prng = 0x12345678;
 
+	/* XXX: fsck. needs some more thought... */
+	if (!i915_ggtt_has_aperture(ggtt))
+		return;
+
 	for (page = 0; page < size; page += PAGE_SIZE) {
 		const dma_addr_t dma = i915->dsm.start + page;
 		u32 __iomem *s;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index a1cb072e4a1b..3f7e80fb3bbd 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -1149,6 +1149,9 @@ static int igt_ggtt_page(void *arg)
 	unsigned int *order, n;
 	int err;
 
+	if (!i915_ggtt_has_aperture(ggtt))
+		return 0;
+
 	obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
 	if (IS_ERR(obj))
 		return PTR_ERR(obj);
-- 
2.20.1

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Re: [PATCH 7/7] drm/i915/selftests: check for missing aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:56)
> We may be missing support for the mappable aperture on some platforms.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>  .../drm/i915/gem/selftests/i915_gem_coherency.c    |  5 ++++-
>  drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c |  6 ++++++
>  drivers/gpu/drm/i915/gt/selftest_hangcheck.c       | 14 ++++++++++----
>  drivers/gpu/drm/i915/selftests/i915_gem.c          |  4 ++++
>  drivers/gpu/drm/i915/selftests/i915_gem_gtt.c      |  3 +++
>  5 files changed, 27 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> index 0a195e5b98e6..279e9047bc6d 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> @@ -250,7 +250,10 @@ static bool always_valid(struct context *ctx)
>  
>  static bool needs_fence_registers(struct context *ctx)
>  {

I vote for a struct intel_gt *gt = ctx->engine->gt;

> -       return !intel_gt_is_wedged(ctx->engine->gt);
> +       if (intel_gt_is_wedged(ctx->engine->gt))
> +               return false;
> +
> +       return ctx->engine->gt->ggtt->num_fences;
>  }

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 7/7] drm/i915/selftests: check for missing aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:56)
> We may be missing support for the mappable aperture on some platforms.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>  .../drm/i915/gem/selftests/i915_gem_coherency.c    |  5 ++++-
>  drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c |  6 ++++++
>  drivers/gpu/drm/i915/gt/selftest_hangcheck.c       | 14 ++++++++++----
>  drivers/gpu/drm/i915/selftests/i915_gem.c          |  4 ++++
>  drivers/gpu/drm/i915/selftests/i915_gem_gtt.c      |  3 +++
>  5 files changed, 27 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> index 0a195e5b98e6..279e9047bc6d 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> @@ -250,7 +250,10 @@ static bool always_valid(struct context *ctx)
>  
>  static bool needs_fence_registers(struct context *ctx)
>  {

I vote for a struct intel_gt *gt = ctx->engine->gt;

> -       return !intel_gt_is_wedged(ctx->engine->gt);
> +       if (intel_gt_is_wedged(ctx->engine->gt))
> +               return false;
> +
> +       return ctx->engine->gt->ggtt->num_fences;
>  }

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 1/7] drm/i915: define i915_ggtt_has_aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:50)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> The following patches in the series will use it to avoid certain
> operations when the mappable aperture is not available in HW.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [Intel-gfx] [PATCH 1/7] drm/i915: define i915_ggtt_has_aperture

[Chris Wilson]

Quoting Matthew Auld (2019-10-29 09:58:50)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> The following patches in the series will use it to avoid certain
> operations when the mappable aperture is not available in HW.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
6d8f88fa8405 drm/i915: define i915_ggtt_has_aperture
d802efde66e4 drm/i915: do not map aperture if it is not available.
-:38: CHECK:SPACING: No space is necessary after a cast
#38: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:3004:
+			(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),

total: 0 errors, 0 warnings, 1 checks, 50 lines checked
a7a2178c7393 drm/i915: set num_fence_regs to 0 if there is no aperture
7cfb9135592b drm/i915: error capture with no ggtt slot
8bb585d4866a drm/i915: Don't try to place HWS in non-existing mappable region
1c42b31bf095 drm/i915: don't allocate the ring in stolen if we lack aperture
5a85b5a48a60 drm/i915/selftests: check for missing aperture

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
6d8f88fa8405 drm/i915: define i915_ggtt_has_aperture
d802efde66e4 drm/i915: do not map aperture if it is not available.
-:38: CHECK:SPACING: No space is necessary after a cast
#38: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:3004:
+			(struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2),

total: 0 errors, 0 warnings, 1 checks, 50 lines checked
a7a2178c7393 drm/i915: set num_fence_regs to 0 if there is no aperture
7cfb9135592b drm/i915: error capture with no ggtt slot
8bb585d4866a drm/i915: Don't try to place HWS in non-existing mappable region
1c42b31bf095 drm/i915: don't allocate the ring in stolen if we lack aperture
5a85b5a48a60 drm/i915/selftests: check for missing aperture

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✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: define i915_ggtt_has_aperture
Okay!

Commit: drm/i915: do not map aperture if it is not available.
Okay!

Commit: drm/i915: set num_fence_regs to 0 if there is no aperture
Okay!

Commit: drm/i915: error capture with no ggtt slot
-
+drivers/gpu/drm/i915/i915_gpu_error.c:1023:55:    expected void *src
+drivers/gpu/drm/i915/i915_gpu_error.c:1023:55:    got void [noderef] <asn:2> *[assigned] s
+drivers/gpu/drm/i915/i915_gpu_error.c:1023:55: warning: incorrect type in argument 2 (different address spaces)

Commit: drm/i915: Don't try to place HWS in non-existing mappable region
Okay!

Commit: drm/i915: don't allocate the ring in stolen if we lack aperture
Okay!

Commit: drm/i915/selftests: check for missing aperture
Okay!

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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: define i915_ggtt_has_aperture
Okay!

Commit: drm/i915: do not map aperture if it is not available.
Okay!

Commit: drm/i915: set num_fence_regs to 0 if there is no aperture
Okay!

Commit: drm/i915: error capture with no ggtt slot
-
+drivers/gpu/drm/i915/i915_gpu_error.c:1023:55:    expected void *src
+drivers/gpu/drm/i915/i915_gpu_error.c:1023:55:    got void [noderef] <asn:2> *[assigned] s
+drivers/gpu/drm/i915/i915_gpu_error.c:1023:55: warning: incorrect type in argument 2 (different address spaces)

Commit: drm/i915: Don't try to place HWS in non-existing mappable region
Okay!

Commit: drm/i915: don't allocate the ring in stolen if we lack aperture
Okay!

Commit: drm/i915/selftests: check for missing aperture
Okay!

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✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7208 -> Patchwork_15045
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/index.html

Known issues
------------

  Here are the changes found in Patchwork_15045 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-small-bo-tiledy:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][3] -> [DMESG-WARN][4] ([fdo#102614])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_create@basic:
    - fi-icl-u3:          [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u3/igt@gem_exec_create@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u3/igt@gem_exec_create@basic.html

  * igt@i915_pm_rpm@module-reload:
    - {fi-icl-u4}:        [DMESG-WARN][7] ([fdo#106107]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u4/igt@i915_pm_rpm@module-reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u4/igt@i915_pm_rpm@module-reload.html
    - fi-icl-u3:          [DMESG-WARN][9] ([fdo#106107]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u3/igt@i915_pm_rpm@module-reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u3/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_execlists:
    - {fi-icl-guc}:       [INCOMPLETE][11] ([fdo#107713]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-guc/igt@i915_selftest@live_execlists.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-guc/igt@i915_selftest@live_execlists.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-icl-u2:          [DMESG-WARN][13] ([fdo#102505] / [fdo#110390]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-icl-u2:          [FAIL][15] ([fdo#109635 ]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 
  [fdo#110390]: https://bugs.freedesktop.org/show_bug.cgi?id=110390


Participating hosts (51 -> 43)
------------------------------

  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7208 -> Patchwork_15045

  CI-20190529: 20190529
  CI_DRM_7208: 0e6cec76a950de7c4284f588846616027080ec3d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5248: 81e55f1f97d73e48f00caa7e4fb98295023c5afa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15045: 5a85b5a48a60eca3deee049cfa34597569b22498 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5a85b5a48a60 drm/i915/selftests: check for missing aperture
1c42b31bf095 drm/i915: don't allocate the ring in stolen if we lack aperture
8bb585d4866a drm/i915: Don't try to place HWS in non-existing mappable region
7cfb9135592b drm/i915: error capture with no ggtt slot
a7a2178c7393 drm/i915: set num_fence_regs to 0 if there is no aperture
d802efde66e4 drm/i915: do not map aperture if it is not available.
6d8f88fa8405 drm/i915: define i915_ggtt_has_aperture

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7208 -> Patchwork_15045
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/index.html

Known issues
------------

  Here are the changes found in Patchwork_15045 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-small-bo-tiledy:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][3] -> [DMESG-WARN][4] ([fdo#102614])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_create@basic:
    - fi-icl-u3:          [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u3/igt@gem_exec_create@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u3/igt@gem_exec_create@basic.html

  * igt@i915_pm_rpm@module-reload:
    - {fi-icl-u4}:        [DMESG-WARN][7] ([fdo#106107]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u4/igt@i915_pm_rpm@module-reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u4/igt@i915_pm_rpm@module-reload.html
    - fi-icl-u3:          [DMESG-WARN][9] ([fdo#106107]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u3/igt@i915_pm_rpm@module-reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u3/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_execlists:
    - {fi-icl-guc}:       [INCOMPLETE][11] ([fdo#107713]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-guc/igt@i915_selftest@live_execlists.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-guc/igt@i915_selftest@live_execlists.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-icl-u2:          [DMESG-WARN][13] ([fdo#102505] / [fdo#110390]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-icl-u2:          [FAIL][15] ([fdo#109635 ]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 
  [fdo#110390]: https://bugs.freedesktop.org/show_bug.cgi?id=110390


Participating hosts (51 -> 43)
------------------------------

  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7208 -> Patchwork_15045

  CI-20190529: 20190529
  CI_DRM_7208: 0e6cec76a950de7c4284f588846616027080ec3d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5248: 81e55f1f97d73e48f00caa7e4fb98295023c5afa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15045: 5a85b5a48a60eca3deee049cfa34597569b22498 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5a85b5a48a60 drm/i915/selftests: check for missing aperture
1c42b31bf095 drm/i915: don't allocate the ring in stolen if we lack aperture
8bb585d4866a drm/i915: Don't try to place HWS in non-existing mappable region
7cfb9135592b drm/i915: error capture with no ggtt slot
a7a2178c7393 drm/i915: set num_fence_regs to 0 if there is no aperture
d802efde66e4 drm/i915: do not map aperture if it is not available.
6d8f88fa8405 drm/i915: define i915_ggtt_has_aperture

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7208_full -> Patchwork_15045_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15045_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vcs1-dirty-switch:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb2/igt@gem_ctx_isolation@vcs1-dirty-switch.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb5/igt@gem_ctx_isolation@vcs1-dirty-switch.html

  * igt@gem_ctx_switch@vcs1-heavy-queue:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#112080]) +8 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb4/igt@gem_ctx_switch@vcs1-heavy-queue.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb8/igt@gem_ctx_switch@vcs1-heavy-queue.html

  * igt@gem_exec_async@concurrent-writes-bsd:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#112146]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb8/igt@gem_exec_async@concurrent-writes-bsd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@gem_exec_async@concurrent-writes-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#109276]) +11 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-hsw:          [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-hsw7/igt@gem_userptr_blits@dmabuf-unsync.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-hsw1/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-snb:          [PASS][11] -> [DMESG-WARN][12] ([fdo#111870]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-kbl:          [PASS][13] -> [INCOMPLETE][14] ([fdo#103665])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl1/igt@i915_suspend@fence-restore-tiled2untiled.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl2/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +5 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#102670])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-glk:          [PASS][19] -> [FAIL][20] ([fdo#111609])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-glk8/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-glk6/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip@absolute-wf_vblank:
    - shard-apl:          [PASS][21] -> [INCOMPLETE][22] ([fdo#103927]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl3/igt@kms_flip@absolute-wf_vblank.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl6/igt@kms_flip@absolute-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([fdo#105363])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-hsw:          [PASS][25] -> [INCOMPLETE][26] ([fdo#103540])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-hsw7/igt@kms_flip@flip-vs-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-hsw2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
    - shard-iclb:         [PASS][27] -> [FAIL][28] ([fdo#103167]) +5 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [PASS][29] -> [DMESG-WARN][30] ([fdo#108566]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl6/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][31] -> [SKIP][32] ([fdo#109441]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [DMESG-WARN][33] ([fdo#108566]) -> [PASS][34] +4 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl6/igt@gem_ctx_isolation@bcs0-s3.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl4/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-iclb:         [SKIP][35] ([fdo#109276] / [fdo#112080]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb3/igt@gem_ctx_isolation@vcs1-s3.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb1/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][37] ([fdo#110854]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb3/igt@gem_exec_balancer@smoke.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_nop@basic-series:
    - {shard-tglb}:       [INCOMPLETE][39] ([fdo#111747]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb5/igt@gem_exec_nop@basic-series.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb7/igt@gem_exec_nop@basic-series.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][41] ([fdo#109276]) -> [PASS][42] +18 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb8/igt@gem_exec_schedule@independent-bsd2.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][43] ([fdo#112146]) -> [PASS][44] +6 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd2:
    - {shard-tglb}:       [INCOMPLETE][45] ([fdo#111677]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb7/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-snb:          [FAIL][47] ([fdo#112037]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb6/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-snb:          [DMESG-WARN][49] ([fdo#111870]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-hsw:          [DMESG-WARN][51] ([fdo#111870]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [FAIL][53] ([fdo#103375]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl6/igt@gem_workarounds@suspend-resume-fd.html

  * {igt@i915_pm_dc@dc6-psr}:
    - shard-iclb:         [FAIL][55] ([fdo#110548]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb7/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_busy@basic-flip-a:
    - shard-apl:          [INCOMPLETE][57] ([fdo#103927]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl2/igt@kms_busy@basic-flip-a.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl7/igt@kms_busy@basic-flip-a.html

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - shard-snb:          [SKIP][59] ([fdo#109271]) -> [PASS][60] +5 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb2/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb7/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html

  * igt@kms_flip@absolute-wf_vblank:
    - {shard-tglb}:       [INCOMPLETE][61] ([fdo#112031]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb3/igt@kms_flip@absolute-wf_vblank.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb1/igt@kms_flip@absolute-wf_vblank.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [FAIL][63] ([fdo#103167]) -> [PASS][64] +4 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - {shard-tglb}:       [FAIL][65] ([fdo#103167]) -> [PASS][66] +4 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb4/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff:
    - shard-skl:          [FAIL][67] ([fdo#103167]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-render:
    - {shard-tglb}:       [INCOMPLETE][69] -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb5/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [DMESG-WARN][71] ([fdo#108566]) -> [PASS][72] +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - {shard-tglb}:       [INCOMPLETE][73] ([fdo#111832] / [fdo#111850]) -> [PASS][74] +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][75] ([fdo#108145]) -> [PASS][76] +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][77] ([fdo#108145] / [fdo#110403]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-x:
    - shard-iclb:         [FAIL][79] ([fdo#103166]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-x.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-x.html

  * igt@perf_pmu@busy-accuracy-98-vcs1:
    - shard-iclb:         [SKIP][81] ([fdo#112080]) -> [PASS][82] +12 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb8/igt@perf_pmu@busy-accuracy-98-vcs1.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@perf_pmu@busy-accuracy-98-vcs1.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-isolation-bsd2:
    - shard-iclb:         [SKIP][83] ([fdo#109276]) -> [FAIL][84] ([fdo#111330])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb5/igt@gem_mocs_settings@mocs-isolation-bsd2.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb1/igt@gem_mocs_settings@mocs-isolation-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 112000 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 112000 
  [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111609]: https://bugs.freedesktop.org/show_bug.cgi?id=111609
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111781]: https://bugs.freedesktop.org/show_bug.cgi?id=111781
  [fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884
  [fdo#112031]: https://bugs.freedesktop.org/show_bug.cgi?id=112031
  [fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037
  [fdo#112068 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112068 
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7208 -> Patchwork_15045

  CI-20190529: 20190529
  CI_DRM_7208: 0e6cec76a950de7c4284f588846616027080ec3d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5248: 81e55f1f97d73e48f00caa7e4fb98295023c5afa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15045: 5a85b5a48a60eca3deee049cfa34597569b22498 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
URL   : https://patchwork.freedesktop.org/series/68705/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7208_full -> Patchwork_15045_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15045_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vcs1-dirty-switch:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb2/igt@gem_ctx_isolation@vcs1-dirty-switch.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb5/igt@gem_ctx_isolation@vcs1-dirty-switch.html

  * igt@gem_ctx_switch@vcs1-heavy-queue:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#112080]) +8 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb4/igt@gem_ctx_switch@vcs1-heavy-queue.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb8/igt@gem_ctx_switch@vcs1-heavy-queue.html

  * igt@gem_exec_async@concurrent-writes-bsd:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#112146]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb8/igt@gem_exec_async@concurrent-writes-bsd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@gem_exec_async@concurrent-writes-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#109276]) +11 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-hsw:          [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-hsw7/igt@gem_userptr_blits@dmabuf-unsync.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-hsw1/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-snb:          [PASS][11] -> [DMESG-WARN][12] ([fdo#111870]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-kbl:          [PASS][13] -> [INCOMPLETE][14] ([fdo#103665])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl1/igt@i915_suspend@fence-restore-tiled2untiled.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl2/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +5 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#102670])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-glk:          [PASS][19] -> [FAIL][20] ([fdo#111609])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-glk8/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-glk6/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip@absolute-wf_vblank:
    - shard-apl:          [PASS][21] -> [INCOMPLETE][22] ([fdo#103927]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl3/igt@kms_flip@absolute-wf_vblank.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl6/igt@kms_flip@absolute-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([fdo#105363])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-hsw:          [PASS][25] -> [INCOMPLETE][26] ([fdo#103540])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-hsw7/igt@kms_flip@flip-vs-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-hsw2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
    - shard-iclb:         [PASS][27] -> [FAIL][28] ([fdo#103167]) +5 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [PASS][29] -> [DMESG-WARN][30] ([fdo#108566]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl6/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][31] -> [SKIP][32] ([fdo#109441]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [DMESG-WARN][33] ([fdo#108566]) -> [PASS][34] +4 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl6/igt@gem_ctx_isolation@bcs0-s3.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl4/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-iclb:         [SKIP][35] ([fdo#109276] / [fdo#112080]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb3/igt@gem_ctx_isolation@vcs1-s3.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb1/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][37] ([fdo#110854]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb3/igt@gem_exec_balancer@smoke.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_nop@basic-series:
    - {shard-tglb}:       [INCOMPLETE][39] ([fdo#111747]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb5/igt@gem_exec_nop@basic-series.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb7/igt@gem_exec_nop@basic-series.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][41] ([fdo#109276]) -> [PASS][42] +18 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb8/igt@gem_exec_schedule@independent-bsd2.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][43] ([fdo#112146]) -> [PASS][44] +6 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd2:
    - {shard-tglb}:       [INCOMPLETE][45] ([fdo#111677]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb7/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-snb:          [FAIL][47] ([fdo#112037]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb6/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-snb:          [DMESG-WARN][49] ([fdo#111870]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-hsw:          [DMESG-WARN][51] ([fdo#111870]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [FAIL][53] ([fdo#103375]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl6/igt@gem_workarounds@suspend-resume-fd.html

  * {igt@i915_pm_dc@dc6-psr}:
    - shard-iclb:         [FAIL][55] ([fdo#110548]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb7/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_busy@basic-flip-a:
    - shard-apl:          [INCOMPLETE][57] ([fdo#103927]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-apl2/igt@kms_busy@basic-flip-a.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-apl7/igt@kms_busy@basic-flip-a.html

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - shard-snb:          [SKIP][59] ([fdo#109271]) -> [PASS][60] +5 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-snb2/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-snb7/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html

  * igt@kms_flip@absolute-wf_vblank:
    - {shard-tglb}:       [INCOMPLETE][61] ([fdo#112031]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb3/igt@kms_flip@absolute-wf_vblank.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb1/igt@kms_flip@absolute-wf_vblank.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [FAIL][63] ([fdo#103167]) -> [PASS][64] +4 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - {shard-tglb}:       [FAIL][65] ([fdo#103167]) -> [PASS][66] +4 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb4/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff:
    - shard-skl:          [FAIL][67] ([fdo#103167]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-render:
    - {shard-tglb}:       [INCOMPLETE][69] -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb5/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [DMESG-WARN][71] ([fdo#108566]) -> [PASS][72] +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - {shard-tglb}:       [INCOMPLETE][73] ([fdo#111832] / [fdo#111850]) -> [PASS][74] +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-tglb1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][75] ([fdo#108145]) -> [PASS][76] +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][77] ([fdo#108145] / [fdo#110403]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-x:
    - shard-iclb:         [FAIL][79] ([fdo#103166]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-x.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-x.html

  * igt@perf_pmu@busy-accuracy-98-vcs1:
    - shard-iclb:         [SKIP][81] ([fdo#112080]) -> [PASS][82] +12 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb8/igt@perf_pmu@busy-accuracy-98-vcs1.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb2/igt@perf_pmu@busy-accuracy-98-vcs1.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-isolation-bsd2:
    - shard-iclb:         [SKIP][83] ([fdo#109276]) -> [FAIL][84] ([fdo#111330])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7208/shard-iclb5/igt@gem_mocs_settings@mocs-isolation-bsd2.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/shard-iclb1/igt@gem_mocs_settings@mocs-isolation-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 112000 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 112000 
  [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111609]: https://bugs.freedesktop.org/show_bug.cgi?id=111609
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111781]: https://bugs.freedesktop.org/show_bug.cgi?id=111781
  [fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884
  [fdo#112031]: https://bugs.freedesktop.org/show_bug.cgi?id=112031
  [fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037
  [fdo#112068 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112068 
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7208 -> Patchwork_15045

  CI-20190529: 20190529
  CI_DRM_7208: 0e6cec76a950de7c4284f588846616027080ec3d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5248: 81e55f1f97d73e48f00caa7e4fb98295023c5afa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15045: 5a85b5a48a60eca3deee049cfa34597569b22498 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15045/index.html
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