From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 00/15] drm/i915: Clean up the DDI clock routing mess
Date: Mon, 1 Feb 2021 20:33:28 +0200 [thread overview]
Message-ID: <20210201183343.15292-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The DDI clock routing code has turned into proper spaghetti.
Attempt to clean it up by introducing some new vfuncs.
Ville Syrjälä (15):
drm/i915: Extract icl_dpclka_cfgcr0_reg()
drm/i915: Extract icl_dpclka_cfgcr0_clk_sel*()
drm/i915: Introduce .{enable,disable}_clock() encoder vfuncs
drm/i915: Extract hsw_ddi_{enable,disable}_clock()
drm/i915: Extract skl_ddi_{enable,disable}_clock()
drm/i195: Extract cnl_ddi_{enable,disable}_clock()
drm/i915: Convert DG1 over to .{enable,disable}_clock()
drm/i915: Extract icl+ .{enable,disable}_clock() vfuncs
drm/i915: Use intel_de_rmw() for DDI clock routing
drm/i915: Sprinkle a few missing locks around shared DDI clock
registers
drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable()
drm/i915: Extract _cnl_ddi_{enable,disable}_clock()
drm/i915: Split alds/rkl from icl_ddi_combo_{enable,disable}_clock()
drm/i915: Use .disable_clock() for pll sanitation
drm/i915: Relocate icl_sanitize_encoder_pll_mapping()
drivers/gpu/drm/i915/display/icl_dsi.c | 1 +
drivers/gpu/drm/i915/display/intel_ddi.c | 536 ++++++++++--------
.../drm/i915/display/intel_display_types.h | 6 +
3 files changed, 295 insertions(+), 248 deletions(-)
--
2.26.2
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next reply other threads:[~2021-02-01 18:33 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 18:33 Ville Syrjala [this message]
2021-02-01 18:33 ` [Intel-gfx] [PATCH 01/15] drm/i915: Extract icl_dpclka_cfgcr0_reg() Ville Syrjala
2021-02-01 18:55 ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 02/15] drm/i915: Extract icl_dpclka_cfgcr0_clk_sel*() Ville Syrjala
2021-02-01 18:59 ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 03/15] drm/i915: Introduce .{enable, disable}_clock() encoder vfuncs Ville Syrjala
2021-02-01 19:04 ` Lucas De Marchi
2021-02-01 19:09 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 04/15] drm/i915: Extract hsw_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 19:07 ` Lucas De Marchi
2021-02-01 19:16 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 05/15] drm/i915: Extract skl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 06/15] drm/i195: Extract cnl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 07/15] drm/i915: Convert DG1 over to .{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 08/15] drm/i915: Extract icl+ .{enable, disable}_clock() vfuncs Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 09/15] drm/i915: Use intel_de_rmw() for DDI clock routing Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 10/15] drm/i915: Sprinkle a few missing locks around shared DDI clock registers Ville Syrjala
2021-02-01 19:15 ` Lucas De Marchi
2021-02-01 19:21 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 11/15] drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable() Ville Syrjala
2021-02-01 19:15 ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 12/15] drm/i915: Extract _cnl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 13/15] drm/i915: Split alds/rkl from icl_ddi_combo_{enable, disable}_clock() Ville Syrjala
2021-02-01 19:22 ` Lucas De Marchi
2021-02-01 19:31 ` Ville Syrjälä
2021-02-01 19:38 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 14/15] drm/i915: Use .disable_clock() for pll sanitation Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 15/15] drm/i915: Relocate icl_sanitize_encoder_pll_mapping() Ville Syrjala
2021-02-01 19:28 ` [Intel-gfx] [PATCH 00/15] drm/i915: Clean up the DDI clock routing mess Lucas De Marchi
2021-02-01 19:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-02-01 19:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-01 20:12 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-02-01 20:34 ` Ville Syrjälä
2021-02-01 21:08 ` Vudum, Lakshminarayana
2021-02-02 6:05 ` Nautiyal, Ankit K
2021-02-01 21:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-02 2:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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