From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: "Vudum, Lakshminarayana" <lakshminarayana.vudum@intel.com>
Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the DDI clock routing mess
Date: Tue, 2 Feb 2021 11:35:37 +0530 [thread overview]
Message-ID: <eddedcd6-0f67-f15d-b941-e58e9150590b@intel.com> (raw)
In-Reply-To: <YBhl02N9b8V3fMmo@intel.com>
On 2/2/2021 2:04 AM, Ville Syrjälä wrote:
> On Mon, Feb 01, 2021 at 08:12:11PM -0000, Patchwork wrote:
>> == Series Details ==
>>
>> Series: drm/i915: Clean up the DDI clock routing mess
>> URL : https://patchwork.freedesktop.org/series/86544/
>> State : failure
>>
>> == Summary ==
>>
>> CI Bug Log - changes from CI_DRM_9713 -> Patchwork_19556
>> ====================================================
>>
>> Summary
>> -------
>>
>> **FAILURE**
>>
>> Serious unknown changes coming with Patchwork_19556 absolutely need to be
>> verified manually.
>>
>> If you think the reported changes have nothing to do with the changes
>> introduced in Patchwork_19556, please notify your bug team to allow them
>> to document this new failure mode, which will reduce false positives in CI.
>>
>> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/index.html
>>
>> Possible new issues
>> -------------------
>>
>> Here are the unknown changes that may have been introduced in Patchwork_19556:
>>
>> ### IGT changes ###
>>
>> #### Possible regressions ####
>>
>> * igt@kms_chamelium@common-hpd-after-suspend:
>> - fi-icl-u2: [PASS][1] -> [DMESG-WARN][2]
>> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9713/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
>> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
> <3> [153.691774] i915 0000:00:02.0: [drm] *ERROR* Failed to read DPCD register 0x92
>
> Seems to be
> https://gitlab.freedesktop.org/drm/intel/-/issues/2868
> except not yet tracked for icl.
>
> That register seems to be related to the HDMI 2.1 PCON stuff.
Yes you are right. I seemed to have missed a check for reading this only
for DPCD rev>=1.4.
I'll be sending patch to fix this to intel-gfx.
I have already sent a patch to intel-trybot to verify this.
https://patchwork.freedesktop.org/patch/418137/?series=86551&rev=1
Thanks & Regards,
Ankit
>
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next prev parent reply other threads:[~2021-02-02 6:05 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 18:33 [Intel-gfx] [PATCH 00/15] drm/i915: Clean up the DDI clock routing mess Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 01/15] drm/i915: Extract icl_dpclka_cfgcr0_reg() Ville Syrjala
2021-02-01 18:55 ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 02/15] drm/i915: Extract icl_dpclka_cfgcr0_clk_sel*() Ville Syrjala
2021-02-01 18:59 ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 03/15] drm/i915: Introduce .{enable, disable}_clock() encoder vfuncs Ville Syrjala
2021-02-01 19:04 ` Lucas De Marchi
2021-02-01 19:09 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 04/15] drm/i915: Extract hsw_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 19:07 ` Lucas De Marchi
2021-02-01 19:16 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 05/15] drm/i915: Extract skl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 06/15] drm/i195: Extract cnl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 07/15] drm/i915: Convert DG1 over to .{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 08/15] drm/i915: Extract icl+ .{enable, disable}_clock() vfuncs Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 09/15] drm/i915: Use intel_de_rmw() for DDI clock routing Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 10/15] drm/i915: Sprinkle a few missing locks around shared DDI clock registers Ville Syrjala
2021-02-01 19:15 ` Lucas De Marchi
2021-02-01 19:21 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 11/15] drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable() Ville Syrjala
2021-02-01 19:15 ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 12/15] drm/i915: Extract _cnl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 13/15] drm/i915: Split alds/rkl from icl_ddi_combo_{enable, disable}_clock() Ville Syrjala
2021-02-01 19:22 ` Lucas De Marchi
2021-02-01 19:31 ` Ville Syrjälä
2021-02-01 19:38 ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 14/15] drm/i915: Use .disable_clock() for pll sanitation Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 15/15] drm/i915: Relocate icl_sanitize_encoder_pll_mapping() Ville Syrjala
2021-02-01 19:28 ` [Intel-gfx] [PATCH 00/15] drm/i915: Clean up the DDI clock routing mess Lucas De Marchi
2021-02-01 19:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-02-01 19:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-01 20:12 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-02-01 20:34 ` Ville Syrjälä
2021-02-01 21:08 ` Vudum, Lakshminarayana
2021-02-02 6:05 ` Nautiyal, Ankit K [this message]
2021-02-01 21:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-02 2:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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