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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Takashi Iwai <tiwai@suse.de>
Subject: [Intel-gfx] [PATCH 10/22] drm/i915/audio: Make sure we write the whole ELD buffer
Date: Tue, 11 Oct 2022 19:59:59 +0300	[thread overview]
Message-ID: <20221011170011.17198-11-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20221011170011.17198-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we only write as many dwords into the hardware
ELD buffers as drm_eld_size() tells us. That could mean the
remainder of the hardware buffer is left with whatever
stale garbage it had before, which doesn't seem entirely
great. Let's zero out the remainder of the buffer in case
the provided ELD doesn't fill it fully.

We can also sanity check out idea of the hardware ELD buffer's
size by making sure the address wrapped back to zero once
we wrote the entire buffer.

Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Cc: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Cc: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_audio.c | 34 ++++++++++++++++------
 1 file changed, 25 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index abca5f23673a..d2f9c4c29061 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -333,19 +333,24 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder,
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	struct drm_connector *connector = conn_state->connector;
 	const u8 *eld = connector->eld;
+	int eld_buffer_size, len, i;
 	u32 tmp;
-	int len, i;
 
 	tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
 	tmp &= ~(G4X_ELD_VALID | G4X_ELD_ADDRESS_MASK);
 	intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
 
-	len = g4x_eld_buffer_size(i915);
-	len = min(drm_eld_size(eld) / 4, len);
+	eld_buffer_size = g4x_eld_buffer_size(i915);
+	len = min(drm_eld_size(eld) / 4, eld_buffer_size);
 
 	for (i = 0; i < len; i++)
 		intel_de_write(i915, G4X_HDMIW_HDMIEDID,
 			       *((const u32 *)eld + i));
+	for (; i < eld_buffer_size; i++)
+		intel_de_write(i915, G4X_HDMIW_HDMIEDID, 0);
+
+	drm_WARN_ON(&i915->drm,
+		    (intel_de_read(i915, G4X_AUD_CNTL_ST) & G4X_ELD_ADDRESS_MASK) != 0);
 
 	tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
 	tmp |= G4X_ELD_VALID;
@@ -608,8 +613,8 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
 	struct drm_connector *connector = conn_state->connector;
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	const u8 *eld = connector->eld;
+	int eld_buffer_size, len, i;
 	u32 tmp;
-	int len, i;
 
 	mutex_lock(&i915->display.audio.mutex);
 
@@ -635,12 +640,18 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
 	tmp &= ~IBX_ELD_ADDRESS_MASK;
 	intel_de_write(i915, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder), tmp);
 
-	len = hsw_eld_buffer_size(i915, cpu_transcoder);
-	len = min(drm_eld_size(eld) / 4, len);
+	eld_buffer_size = hsw_eld_buffer_size(i915, cpu_transcoder);
+	len = min(drm_eld_size(eld) / 4, eld_buffer_size);
 
 	for (i = 0; i < len; i++)
 		intel_de_write(i915, HSW_AUD_EDID_DATA(cpu_transcoder),
 			       *((const u32 *)eld + i));
+	for (; i < eld_buffer_size; i++)
+		intel_de_write(i915, HSW_AUD_EDID_DATA(cpu_transcoder), 0);
+
+	drm_WARN_ON(&i915->drm,
+		    (intel_de_read(i915, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder)) &
+		     IBX_ELD_ADDRESS_MASK) != 0);
 
 	/* ELD valid */
 	tmp = intel_de_read(i915, HSW_AUD_PIN_ELD_CP_VLD);
@@ -738,8 +749,8 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder,
 	enum pipe pipe = crtc->pipe;
 	enum port port = encoder->port;
 	const u8 *eld = connector->eld;
+	int eld_buffer_size, len, i;
 	struct ilk_audio_regs regs;
-	int len, i;
 	u32 tmp;
 
 	if (drm_WARN_ON(&i915->drm, port == PORT_A))
@@ -766,12 +777,17 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder,
 	tmp &= ~IBX_ELD_ADDRESS_MASK;
 	intel_de_write(i915, regs.aud_cntl_st, tmp);
 
-	len = ilk_eld_buffer_size(i915, pipe);
-	len = min(drm_eld_size(eld) / 4, len);
+	eld_buffer_size = ilk_eld_buffer_size(i915, pipe);
+	len = min(drm_eld_size(eld) / 4, eld_buffer_size);
 
 	for (i = 0; i < len; i++)
 		intel_de_write(i915, regs.hdmiw_hdmiedid,
 			       *((const u32 *)eld + i));
+	for (; i < eld_buffer_size; i++)
+		intel_de_write(i915, regs.hdmiw_hdmiedid, 0);
+
+	drm_WARN_ON(&i915->drm,
+		    (intel_de_read(i915, regs.aud_cntl_st) & IBX_ELD_ADDRESS_MASK) != 0);
 
 	/* ELD valid */
 	tmp = intel_de_read(i915, regs.aud_cntrl_st2);
-- 
2.35.1


  parent reply	other threads:[~2022-10-11 17:01 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-11 16:59 [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Ville Syrjala
2022-10-11 16:59 ` [Intel-gfx] [PATCH 01/22] drm/i915/audio: s/dev_priv/i915/ Ville Syrjala
2022-10-12 14:35   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 02/22] drm/i915/audio: Nuke leftover ROUNDING_FACTOR Ville Syrjala
2022-10-12 14:36   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 03/22] drm/i915/audio: Remove CL/BLC audio stuff Ville Syrjala
2022-10-12 14:36   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 04/22] drm/i915/audio: Exract struct ilk_audio_regs Ville Syrjala
2022-10-12 14:36   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 05/22] drm/i915/audio: Use REG_BIT() & co Ville Syrjala
2022-10-12 14:37   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 06/22] drm/i915/audio: Unify register bit naming Ville Syrjala
2022-10-12 14:37   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 07/22] drm/i915/audio: Protect singleton register with a lock Ville Syrjala
2022-10-12 14:38   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 08/22] drm/i915/audio: Nuke intel_eld_uptodate() Ville Syrjala
2022-10-12 14:40   ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 09/22] drm/i915/audio: Read ELD buffer size from hardware Ville Syrjala
2022-10-12 14:41   ` Jani Nikula
2022-10-12 14:46     ` Jani Nikula
2022-10-11 16:59 ` Ville Syrjala [this message]
2022-10-12 14:28   ` [Intel-gfx] [PATCH 10/22] drm/i915/audio: Make sure we write the whole ELD buffer Jani Nikula
2022-10-12 15:03     ` Ville Syrjälä
2022-10-12 16:06       ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 11/22] drm/i915/audio: Use u32* for ELD Ville Syrjala
2022-10-12 14:42   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 12/22] drm/i915/audio: Use intel_de_rmw() for most audio registers Ville Syrjala
2022-10-12 14:33   ` Jani Nikula
2022-10-12 15:05     ` Ville Syrjälä
2022-10-11 17:00 ` [Intel-gfx] [PATCH 13/22] drm/i915/audio: Split "ELD valid" vs. audio PD on hsw+ Ville Syrjala
2022-10-12 15:01   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 14/22] drm/i915/audio: Do the vblank waits Ville Syrjala
2022-10-12 15:01   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 15/22] drm/i915/audio: Precompute the ELD Ville Syrjala
2022-10-12 15:11   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 16/22] drm/i915/audio: Hardware ELD readout Ville Syrjala
2022-10-12 15:19   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 17/22] drm/i915/sdvo: Extract intel_sdvo_has_audio() Ville Syrjala
2022-10-12 15:15   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 18/22] drm/i915/sdvo: Precompute the ELD Ville Syrjala
2022-10-12 15:16   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 19/22] drm/i915/sdvo: Do ELD hardware readout Ville Syrjala
2022-10-12 15:22   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 20/22] drm/i915/audio: Hook up ELD into the state checker Ville Syrjala
2022-10-12 15:25   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 21/22] drm/i915/audio: Include ELD in the state dump Ville Syrjala
2022-10-12 15:26   ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 22/22] hax: drm/i915/audio: Make HSW hardware ELD buffer sort of work Ville Syrjala
2022-10-12 10:49   ` [Intel-gfx] [PATCH v2 22/22] drm/i915/audio: Resume HSW/BDW HDA controller around ELD access Ville Syrjala
2022-10-12 11:08     ` Ville Syrjälä
2022-10-12 11:42     ` Kai Vehmanen
2022-10-12 13:53       ` Kai Vehmanen
2022-10-12 14:24     ` Ville Syrjälä
2022-10-19 18:06       ` Ville Syrjälä
2022-10-14 10:51     ` Kai Vehmanen
2022-10-19 18:43       ` Ville Syrjälä
2022-10-11 17:39 ` [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Jani Nikula
2022-10-11 20:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-10-11 20:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-11 21:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-12 12:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: ELD precompute and readout (rev2) Patchwork
2022-10-12 12:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-12 12:58 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-14  9:03 ` [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Borah, Chaitanya Kumar
2022-10-14  9:13   ` Jani Nikula

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