[Intel-gfx] [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port

[Intel-gfx] [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port

[Anshuman Gupta]

hdcp_port_data is specific to a port on which HDCP
encryption is getting enabled, so encapsulate it to
intel_digital_port.
This will be required to enable HDCP 2.2 stream encryption.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  2 +
 .../drm/i915/display/intel_display_types.h    |  5 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c     | 56 +++++++++++--------
 3 files changed, 39 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index fbeffdfd1a0d..a46ba4e6a835 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4746,6 +4746,8 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
 	intel_dp_encoder_flush_work(encoder);
 
 	drm_encoder_cleanup(encoder);
+	if (dig_port)
+		kfree(dig_port->port_data.streams);
 	kfree(dig_port);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 59b8fc21e3e8..749c3a7e0b45 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -402,7 +402,6 @@ struct intel_hdcp {
 	 * content can flow only through a link protected by HDCP2.2.
 	 */
 	u8 content_type;
-	struct hdcp_port_data port_data;
 
 	bool is_paired;
 	bool is_repeater;
@@ -1446,10 +1445,12 @@ struct intel_digital_port {
 	enum phy_fia tc_phy_fia;
 	u8 tc_phy_fia_idx;
 
-	/* protects num_hdcp_streams reference count */
+	/* protects num_hdcp_streams reference count, port_data */
 	struct mutex hdcp_mutex;
 	/* the number of pipes using HDCP signalling out of this port */
 	unsigned int num_hdcp_streams;
+	/* HDCP port data need to pass to security f/w */
+	struct hdcp_port_data port_data;
 
 	void (*write_infoframe)(struct intel_encoder *encoder,
 				const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 10770bf0e85e..207fa17129ae 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -15,6 +15,7 @@
 #include <drm/drm_hdcp.h>
 #include <drm/i915_component.h>
 
+#include "i915_drv.h"
 #include "i915_reg.h"
 #include "intel_display_power.h"
 #include "intel_display_types.h"
@@ -1031,7 +1032,8 @@ static int
 hdcp2_prepare_ake_init(struct intel_connector *connector,
 		       struct hdcp2_ake_init *ake_data)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1060,7 +1062,8 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
 				struct hdcp2_ake_no_stored_km *ek_pub_km,
 				size_t *msg_sz)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1087,7 +1090,8 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
 static int hdcp2_verify_hprime(struct intel_connector *connector,
 			       struct hdcp2_ake_send_hprime *rx_hprime)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1112,7 +1116,8 @@ static int
 hdcp2_store_pairing_info(struct intel_connector *connector,
 			 struct hdcp2_ake_send_pairing_info *pairing_info)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1138,7 +1143,8 @@ static int
 hdcp2_prepare_lc_init(struct intel_connector *connector,
 		      struct hdcp2_lc_init *lc_init)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1164,7 +1170,8 @@ static int
 hdcp2_verify_lprime(struct intel_connector *connector,
 		    struct hdcp2_lc_send_lprime *rx_lprime)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1189,7 +1196,8 @@ hdcp2_verify_lprime(struct intel_connector *connector,
 static int hdcp2_prepare_skey(struct intel_connector *connector,
 			      struct hdcp2_ske_send_eks *ske_data)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1217,7 +1225,8 @@ hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector,
 								*rep_topology,
 				      struct hdcp2_rep_send_ack *rep_send_ack)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1245,7 +1254,8 @@ static int
 hdcp2_verify_mprime(struct intel_connector *connector,
 		    struct hdcp2_rep_stream_ready *stream_ready)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1268,7 +1278,8 @@ hdcp2_verify_mprime(struct intel_connector *connector,
 
 static int hdcp2_authenticate_port(struct intel_connector *connector)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1292,6 +1303,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector)
 
 static int hdcp2_close_mei_session(struct intel_connector *connector)
 {
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1305,7 +1317,7 @@ static int hdcp2_close_mei_session(struct intel_connector *connector)
 	}
 
 	ret = comp->ops->close_hdcp_session(comp->mei_dev,
-					     &connector->hdcp.port_data);
+					     &dig_port->port_data);
 	mutex_unlock(&dev_priv->hdcp_comp_mutex);
 
 	return ret;
@@ -1498,8 +1510,9 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector)
 	if (ret < 0)
 		goto out;
 
-	hdcp->port_data.seq_num_m = hdcp->seq_num_m;
-	hdcp->port_data.streams[0].stream_type = hdcp->content_type;
+	dig_port->port_data.seq_num_m = hdcp->seq_num_m;
+	dig_port->port_data.streams[0].stream_type = hdcp->content_type;
+
 	ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
 
 out:
@@ -1731,7 +1744,9 @@ hdcp2_propagate_stream_management_info(struct intel_connector *connector)
 
 static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 {
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret, i, tries = 3;
 
@@ -1745,8 +1760,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 					    ret);
 				break;
 			}
-			hdcp->port_data.streams[0].stream_type =
-							hdcp->content_type;
+			data->streams[0].stream_type = hdcp->content_type;
 			ret = hdcp2_authenticate_port(connector);
 			if (!ret)
 				break;
@@ -1989,8 +2003,8 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
 				     const struct intel_hdcp_shim *shim)
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct intel_hdcp *hdcp = &connector->hdcp;
-	struct hdcp_port_data *data = &hdcp->port_data;
 	enum port port = dig_port->base.port;
 
 	if (INTEL_GEN(dev_priv) < 12)
@@ -2012,16 +2026,15 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
 	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
 	data->protocol = (u8)shim->protocol;
 
-	data->k = 1;
 	if (!data->streams)
-		data->streams = kcalloc(data->k,
+		data->streams = kcalloc(INTEL_NUM_PIPES(dev_priv),
 					sizeof(struct hdcp2_streamid_type),
 					GFP_KERNEL);
 	if (!data->streams) {
 		drm_err(&dev_priv->drm, "Out of Memory\n");
 		return -ENOMEM;
 	}
-
+	/* For SST */
 	data->streams[0].stream_id = 0;
 	data->streams[0].stream_type = hdcp->content_type;
 
@@ -2100,7 +2113,7 @@ int intel_hdcp_init(struct intel_connector *connector,
 							 hdcp->hdcp2_supported);
 	if (ret) {
 		hdcp->hdcp2_supported = false;
-		kfree(hdcp->port_data.streams);
+		kfree(dig_port->port_data.streams);
 		return ret;
 	}
 
@@ -2140,7 +2153,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
 	}
 
 	if (INTEL_GEN(dev_priv) >= 12)
-		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+		dig_port->port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
 
 	/*
 	 * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
@@ -2307,7 +2320,6 @@ void intel_hdcp_cleanup(struct intel_connector *connector)
 	drm_WARN_ON(connector->base.dev, work_pending(&hdcp->prop_work));
 
 	mutex_lock(&hdcp->mutex);
-	kfree(hdcp->port_data.streams);
 	hdcp->shim = NULL;
 	mutex_unlock(&hdcp->mutex);
 }
-- 
2.26.2

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[Intel-gfx] [PATCH v3 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support

[Anshuman Gupta]

This is v3 version to test with IGT https://patchwork.freedesktop.org/series/82987/
This has some fix for Type1 content igt test.
It has been also tested manually with IGT above series.

[PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len
has an Ack from Tomas to merge it via drm-intel. 

[PATCH v3 11/16] drm/hdcp: Max MST content streams 
has an Ack from drm-misc maintainer to merge it via dm-intel.

Test-with: 20201023100709.5211-2-karthik.b.s@intel.com

Anshuman Gupta (16):
  drm/i915/hdcp: Update CP property in update_pipe
  drm/i915/hdcp: Get conn while content_type changed
  drm/i915/hotplug: Handle CP_IRQ for DP-MST
  drm/i915/hdcp: DP MST transcoder for link and stream
  drm/i915/hdcp: Move HDCP enc status timeout to header
  drm/i915/hdcp: HDCP stream encryption support
  drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support
  drm/i915/hdcp: Pass dig_port to intel_hdcp_init
  drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port
  misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len
  drm/hdcp: Max MST content streams
  drm/i915/hdcp: MST streams support in hdcp port_data
  drm/i915/hdcp: Pass connector to check_2_2_link
  drm/i915/hdcp: Add HDCP 2.2 stream register
  drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks
  drm/i915/hdcp: Enable HDCP 2.2 MST support

 drivers/gpu/drm/i915/display/intel_ddi.c      |  14 +-
 drivers/gpu/drm/i915/display/intel_ddi.h      |   6 +-
 .../drm/i915/display/intel_display_types.h    |  20 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  14 +-
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 168 +++++++++--
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  12 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c     | 285 ++++++++++++++----
 drivers/gpu/drm/i915/display/intel_hdcp.h     |   8 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  19 +-
 drivers/gpu/drm/i915/i915_reg.h               |  31 ++
 drivers/misc/mei/hdcp/mei_hdcp.c              |   3 +-
 include/drm/drm_hdcp.h                        |   8 +-
 12 files changed, 468 insertions(+), 120 deletions(-)

-- 
2.26.2

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[Intel-gfx] [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe

[Anshuman Gupta]

When crtc state need_modeset is true it is not necessary
it is going to be a real modeset, it can turns to be a
update_pipe instead of modeset.
This turns content protection property to be DESIRED and hdcp
update_pipe left with property to be in DESIRED state but
actually hdcp->value was ENABLED.
This caught with DP MST setup, when disabling HDCP on a connector
sets the crtc state need_modeset to true for all crtc driving
the other DP-MST topology connectors.

v2:
Fix WARN_ON(connector->base.registration_state == DRM_CONNECTOR_REGISTERED)

Fixes: 33f9a623bfc6 ("drm/i915/hdcp: Update CP as per the kernel internal state")
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index b2a4bbcfdcd2..0d9e8d3b5603 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2221,6 +2221,11 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
 		desired_and_not_enabled =
 			hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED;
 		mutex_unlock(&hdcp->mutex);
+
+		if (!desired_and_not_enabled && !content_protection_type_changed) {
+			drm_connector_get(&connector->base);
+			schedule_work(&hdcp->prop_work);
+		}
 	}
 
 	if (desired_and_not_enabled || content_protection_type_changed)
-- 
2.26.2

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[Intel-gfx] [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed

[Anshuman Gupta]

Get DRM connector reference count while scheduling a prop work
to avoid any possible destroy of DRM connector when it is in
DRM_CONNECTOR_REGISTERED state.

Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing connectors")
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 0d9e8d3b5603..42cf91cf4f20 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2210,6 +2210,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
 	if (content_protection_type_changed) {
 		mutex_lock(&hdcp->mutex);
 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+		drm_connector_get(&connector->base);
 		schedule_work(&hdcp->prop_work);
 		mutex_unlock(&hdcp->mutex);
 	}
-- 
2.26.2

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[Intel-gfx] [PATCH v3 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST

[Anshuman Gupta]

Handle CP_IRQ in DEVICE_SERVICE_IRQ_VECTOR_ESI0
It requires to call intel_hdcp_handle_cp_irq() in case
of CP_IRQ is triggered by a sink in DP-MST topology.

Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 818daab252f3..21c6c9828cd7 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5657,6 +5657,17 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
 			    "Could not write test response to sink\n");
 }
 
+static void
+intel_dp_mst_hpd_irq(struct intel_dp *intel_dp, u8 *esi, bool *handled)
+{
+		drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, handled);
+
+		if (esi[1] & DP_CP_IRQ) {
+			intel_hdcp_handle_cp_irq(intel_dp->attached_connector);
+			*handled = true;
+		}
+}
+
 /**
  * intel_dp_check_mst_status - service any pending MST interrupts, check link status
  * @intel_dp: Intel DP struct
@@ -5701,7 +5712,8 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
 
 		drm_dbg_kms(&i915->drm, "got esi %3ph\n", esi);
 
-		drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, &handled);
+		intel_dp_mst_hpd_irq(intel_dp, esi, &handled);
+
 		if (!handled)
 			break;
 
-- 
2.26.2

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[Intel-gfx] [PATCH v3 04/16] drm/i915/hdcp: DP MST transcoder for link and stream

[Anshuman Gupta]

Gen12 has H/W delta with respect to HDCP{1.x,2.x} display engine
instances lies in Transcoder instead of DDI as in Gen11.

This requires hdcp driver to use mst_master_transcoder for link
authentication and stream transcoder for stream encryption
separately.

This will be used for both HDCP 1.4 and HDCP 2.2 over DP MST
on Gen12.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c          |  2 +-
 .../gpu/drm/i915/display/intel_display_types.h    |  2 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c       |  2 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c         | 15 +++++++++++----
 drivers/gpu/drm/i915/display/intel_hdcp.h         |  2 +-
 5 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 09811be08cfe..bf8730267cfd 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4059,7 +4059,7 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
 	if (conn_state->content_protection ==
 	    DRM_MODE_CONTENT_PROTECTION_DESIRED)
 		intel_hdcp_enable(to_intel_connector(conn_state->connector),
-				  crtc_state->cpu_transcoder,
+				  crtc_state,
 				  (u8)conn_state->hdcp_content_type);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index f6f0626649e0..c47124a679b6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -432,6 +432,8 @@ struct intel_hdcp {
 	 * Hence caching the transcoder here.
 	 */
 	enum transcoder cpu_transcoder;
+	/* Only used for DP MST stream encryption */
+	enum transcoder stream_transcoder;
 };
 
 struct intel_connector {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index c8fcec4d0788..16865b200062 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -568,7 +568,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
 	if (conn_state->content_protection ==
 	    DRM_MODE_CONTENT_PROTECTION_DESIRED)
 		intel_hdcp_enable(to_intel_connector(conn_state->connector),
-				  pipe_config->cpu_transcoder,
+				  pipe_config,
 				  (u8)conn_state->hdcp_content_type);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 42cf91cf4f20..a9b652c6e742 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2095,7 +2095,7 @@ int intel_hdcp_init(struct intel_connector *connector,
 }
 
 int intel_hdcp_enable(struct intel_connector *connector,
-		      enum transcoder cpu_transcoder, u8 content_type)
+		      const struct intel_crtc_state *pipe_config, u8 content_type)
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
@@ -2111,10 +2111,17 @@ int intel_hdcp_enable(struct intel_connector *connector,
 	drm_WARN_ON(&dev_priv->drm,
 		    hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
 	hdcp->content_type = content_type;
-	hdcp->cpu_transcoder = cpu_transcoder;
+
+	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
+		hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
+		hdcp->stream_transcoder = pipe_config->cpu_transcoder;
+	} else {
+		hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
+		hdcp->stream_transcoder = INVALID_TRANSCODER;
+	}
 
 	if (INTEL_GEN(dev_priv) >= 12)
-		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(cpu_transcoder);
+		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
 
 	/*
 	 * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
@@ -2231,7 +2238,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
 
 	if (desired_and_not_enabled || content_protection_type_changed)
 		intel_hdcp_enable(connector,
-				  crtc_state->cpu_transcoder,
+				  crtc_state,
 				  (u8)conn_state->hdcp_content_type);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 1bbf5b67ed0a..bc51c1e9b481 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -25,7 +25,7 @@ void intel_hdcp_atomic_check(struct drm_connector *connector,
 int intel_hdcp_init(struct intel_connector *connector, enum port port,
 		    const struct intel_hdcp_shim *hdcp_shim);
 int intel_hdcp_enable(struct intel_connector *connector,
-		      enum transcoder cpu_transcoder, u8 content_type);
+		      const struct intel_crtc_state *pipe_config, u8 content_type);
 int intel_hdcp_disable(struct intel_connector *connector);
 void intel_hdcp_update_pipe(struct intel_atomic_state *state,
 			    struct intel_encoder *encoder,
-- 
2.26.2

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[Intel-gfx] [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header

[Anshuman Gupta]

DP MST stream encryption status requires time of a link frame
in order to change its status, but as there were some HDCP
encryption timeout observed earlier, it is safer to use
ENCRYPT_STATUS_CHANGE_TIMEOUT_MS timeout for stream status too,
it requires to move the macro to a header.
It will be used by both HDCP{1.x,2.x} stream status timeout.

Related: 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt
status change")
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 9 ++++-----
 drivers/gpu/drm/i915/display/intel_hdcp.h | 2 ++
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index a9b652c6e742..61252d4be3dd 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -23,7 +23,6 @@
 #include "intel_connector.h"
 
 #define KEY_LOAD_TRIES	5
-#define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
 #define HDCP2_LC_RETRY_CNT			3
 
 static
@@ -762,7 +761,7 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 	if (intel_de_wait_for_set(dev_priv,
 				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
 				  HDCP_STATUS_ENC,
-				  ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
+				  HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 		drm_err(&dev_priv->drm, "Timed out waiting for encryption\n");
 		return -ETIMEDOUT;
 	}
@@ -809,7 +808,7 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
 	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
 	if (intel_de_wait_for_clear(dev_priv,
 				    HDCP_STATUS(dev_priv, cpu_transcoder, port),
-				    ~0, ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
+				    ~0, HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 		drm_err(&dev_priv->drm,
 			"Failed to disable HDCP, timeout clearing status\n");
 		return -ETIMEDOUT;
@@ -1641,7 +1640,7 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
 				    HDCP2_STATUS(dev_priv, cpu_transcoder,
 						 port),
 				    LINK_ENCRYPTION_STATUS,
-				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
+				    HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
 
 	return ret;
 }
@@ -1665,7 +1664,7 @@ static int hdcp2_disable_encryption(struct intel_connector *connector)
 				      HDCP2_STATUS(dev_priv, cpu_transcoder,
 						   port),
 				      LINK_ENCRYPTION_STATUS,
-				      ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
+				      HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
 	if (ret == -ETIMEDOUT)
 		drm_dbg_kms(&dev_priv->drm, "Disable Encryption Timedout");
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index bc51c1e9b481..b912a3a0f5b8 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -8,6 +8,8 @@
 
 #include <linux/types.h>
 
+#define HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
+
 struct drm_connector;
 struct drm_connector_state;
 struct drm_i915_private;
-- 
2.26.2

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[Intel-gfx] [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support

[Anshuman Gupta]

Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit
in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP
encryption over DP MST Transport Link.

HDCP 1.4 stream encryption requires to validate the stream encryption
status in HDCP_STATUS_{TRANSCODER,PORT} register driving that link
in order to enable/disable the stream encryption.

Both of above requirement are same for all Gen with respect to
B.Spec Documentation.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 10 +--
 drivers/gpu/drm/i915/display/intel_ddi.h      |  6 +-
 .../drm/i915/display/intel_display_types.h    |  4 +
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ++++++++++++++++---
 drivers/gpu/drm/i915/display/intel_hdmi.c     | 14 ++--
 drivers/gpu/drm/i915/i915_reg.h               |  1 +
 6 files changed, 90 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index bf8730267cfd..fbeffdfd1a0d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
 	}
 }
 
-int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
-				     enum transcoder cpu_transcoder,
-				     bool enable)
+int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
+			       enum transcoder cpu_transcoder,
+			       bool enable, u32 hdcp_mask)
 {
 	struct drm_device *dev = intel_encoder->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
@@ -1965,9 +1965,9 @@ int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
 
 	tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
 	if (enable)
-		tmp |= TRANS_DDI_HDCP_SIGNALLING;
+		tmp |= hdcp_mask;
 	else
-		tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
+		tmp &= ~hdcp_mask;
 	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
 	intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
 	return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index dcc711cfe4fe..a4dd815c0000 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
 		      const struct intel_crtc_state *crtc_state);
 u32 ddi_signal_levels(struct intel_dp *intel_dp,
 		      const struct intel_crtc_state *crtc_state);
-int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
-				     enum transcoder cpu_transcoder,
-				     bool enable);
+int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
+			       enum transcoder cpu_transcoder,
+			       bool enable, u32 hdcp_mask);
 void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
 
 #endif /* __INTEL_DDI_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index c47124a679b6..59b8fc21e3e8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -339,6 +339,10 @@ struct intel_hdcp_shim {
 				 enum transcoder cpu_transcoder,
 				 bool enable);
 
+	/* Enable/Disable stream encryption on DP MST Transport Link */
+	int (*stream_encryption)(struct intel_digital_port *dig_port,
+				 bool enable);
+
 	/* Ensures the link is still protected */
 	bool (*check_link)(struct intel_digital_port *dig_port,
 			   struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 03424d20e9f7..652d4645f255 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -16,6 +16,30 @@
 #include "intel_dp.h"
 #include "intel_hdcp.h"
 
+static unsigned int transcoder_to_stream_enc_status(enum transcoder cpu_transcoder)
+{
+	u32 stream_enc_mask;
+
+	switch (cpu_transcoder) {
+	case TRANSCODER_A:
+		stream_enc_mask = HDCP_STATUS_STREAM_A_ENC;
+		break;
+	case TRANSCODER_B:
+		stream_enc_mask = HDCP_STATUS_STREAM_B_ENC;
+		break;
+	case TRANSCODER_C:
+		stream_enc_mask = HDCP_STATUS_STREAM_C_ENC;
+		break;
+	case TRANSCODER_D:
+		stream_enc_mask = HDCP_STATUS_STREAM_D_ENC;
+		break;
+	default:
+		stream_enc_mask = 0;
+	}
+
+	return stream_enc_mask;
+}
+
 static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)
 {
 	long ret;
@@ -622,24 +646,57 @@ static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
 };
 
 static int
-intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
-				    enum transcoder cpu_transcoder,
-				    bool enable)
+intel_dp_mst_toggle_select_hdcp_stream(struct intel_digital_port *dig_port,
+				       bool enable)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_dp *dp = &dig_port->dp;
+	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
 	int ret;
 
-	if (!enable)
-		usleep_range(6, 60); /* Bspec says >= 6us */
-
-	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base,
-					       cpu_transcoder, enable);
+	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base,
+					 hdcp->stream_transcoder, enable,
+					 TRANS_DDI_HDCP_SELECT);
 	if (ret)
-		drm_dbg_kms(&i915->drm, "%s HDCP signalling failed (%d)\n",
-			      enable ? "Enable" : "Disable", ret);
+		drm_err(&i915->drm, "%s Multistream HDCP select failed (%d)\n",
+			enable ? "Enable" : "Disable", ret);
 	return ret;
 }
 
+static int
+intel_dp_mst_hdcp_strem_encryption(struct intel_digital_port *dig_port,
+				   bool enable)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_dp *dp = &dig_port->dp;
+	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
+	enum port port = dig_port->base.port;
+	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
+	u32 stream_enc_status;
+	int ret;
+
+	ret = intel_dp_mst_toggle_select_hdcp_stream(dig_port, enable);
+	if (ret)
+		return ret;
+
+	stream_enc_status =  transcoder_to_stream_enc_status(hdcp->stream_transcoder);
+	if (!stream_enc_status)
+		return -EINVAL;
+
+	/* Wait for encryption confirmation */
+	if (intel_de_wait_for_register(i915,
+				       HDCP_STATUS(i915, cpu_transcoder, port),
+				       stream_enc_status,
+				       enable ? stream_enc_status : 0,
+				       HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
+		drm_err(&i915->drm, "Timed out waiting for stream encryption %s\n",
+			enable ? "enabled" : "disabled");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
 static
 bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
 				  struct intel_connector *connector)
@@ -673,7 +730,8 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
 	.read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
 	.read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
 	.read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
-	.toggle_signalling = intel_dp_mst_hdcp_toggle_signalling,
+	.toggle_signalling = intel_dp_hdcp_toggle_signalling,
+	.stream_encryption = intel_dp_mst_hdcp_strem_encryption,
 	.check_link = intel_dp_mst_hdcp_check_link,
 	.hdcp_capable = intel_dp_hdcp_capable,
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index f90838bc74fb..f58469226694 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1495,15 +1495,16 @@ static int kbl_repositioning_enc_en_signal(struct intel_connector *connector,
 		usleep_range(25, 50);
 	}
 
-	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
-					       false);
+	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base, cpu_transcoder,
+					 false, TRANS_DDI_HDCP_SIGNALLING);
 	if (ret) {
 		drm_err(&dev_priv->drm,
 			"Disable HDCP signalling failed (%d)\n", ret);
 		return ret;
 	}
-	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
-					       true);
+
+	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base, cpu_transcoder,
+					 true, TRANS_DDI_HDCP_SIGNALLING);
 	if (ret) {
 		drm_err(&dev_priv->drm,
 			"Enable HDCP signalling failed (%d)\n", ret);
@@ -1526,8 +1527,9 @@ int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
 	if (!enable)
 		usleep_range(6, 60); /* Bspec says >= 6us */
 
-	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
-					       enable);
+	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base,
+					 cpu_transcoder, enable,
+					 TRANS_DDI_HDCP_SIGNALLING);
 	if (ret) {
 		drm_err(&dev_priv->drm, "%s HDCP signalling failed (%d)\n",
 			enable ? "Enable" : "Disable", ret);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d4952c9875fb..86a9a5145e47 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9970,6 +9970,7 @@ enum skl_power_gate {
 #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
 #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)
 #define  TRANS_DDI_HDMI_SCRAMBLER_RESET_FREQ (1 << 6)
+#define  TRANS_DDI_HDCP_SELECT		REG_BIT(5)
 #define  TRANS_DDI_BFI_ENABLE		(1 << 4)
 #define  TRANS_DDI_HIGH_TMDS_CHAR_RATE	(1 << 4)
 #define  TRANS_DDI_HDMI_SCRAMBLING	(1 << 0)
-- 
2.26.2

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[Intel-gfx] [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support

[Anshuman Gupta]

Enable HDCP 1.4 over DP MST for Gen12.
This also enable the stream encryption support for
older generations, which was missing earlier.

v2:
- Added debug print for stream encryption.
- Disable the hdcp on port after disabling last stream
  encryption.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++---
 drivers/gpu/drm/i915/display/intel_hdcp.c   | 46 ++++++++++++++-------
 2 files changed, 35 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 16865b200062..f00e12fc83e8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -826,13 +826,9 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 	intel_attach_force_audio_property(connector);
 	intel_attach_broadcast_rgb_property(connector);
 
-
-	/* TODO: Figure out how to make HDCP work on GEN12+ */
-	if (INTEL_GEN(dev_priv) < 12) {
-		ret = intel_dp_init_hdcp(dig_port, intel_connector);
-		if (ret)
-			DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
-	}
+	ret = intel_dp_init_hdcp(dig_port, intel_connector);
+	if (ret)
+		drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n");
 
 	/*
 	 * Reuse the prop from the SST connector because we're
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 61252d4be3dd..46c9bd588db1 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -612,7 +612,12 @@ int intel_hdcp_auth_downstream(struct intel_connector *connector)
 	return ret;
 }
 
-/* Implements Part 1 of the HDCP authorization procedure */
+/*
+ * Implements Part 1 of the HDCP authorization procedure.
+ * Authentication Part 1 steps for Multi-stream DisplayPort.
+ * Step 1. Auth Part 1 sequence on the driving MST Trasport Link.
+ * Step 2. Enable encryption for each stream that requires encryption.
+ */
 static int intel_hdcp_auth(struct intel_connector *connector)
 {
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
@@ -766,10 +771,16 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 		return -ETIMEDOUT;
 	}
 
-	/*
-	 * XXX: If we have MST-connected devices, we need to enable encryption
-	 * on those as well.
-	 */
+	/* DP MST Auth Part 1 Step 2.a and Step 2.b */
+	if (shim->stream_encryption) {
+		ret = shim->stream_encryption(dig_port, true);
+		if (ret) {
+			drm_err(&dev_priv->drm, "Failed to enable HDCP 1.4 stream enc\n");
+			return ret;
+		}
+		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 tras %s stream encrypted\n",
+			    transcoder_name(hdcp->stream_transcoder));
+	}
 
 	if (repeater_present)
 		return intel_hdcp_auth_downstream(connector);
@@ -790,19 +801,26 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
 
 	drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
 		    connector->base.name, connector->base.base.id);
+	/*
+	 * Step 1: Deselect HDCP Multiplestream Bit.
+	 * Step 2: poll for stream encryption status to be disable.
+	 */
+	if (hdcp->shim->stream_encryption) {
+		ret = hdcp->shim->stream_encryption(dig_port, false);
+		if (ret) {
+			drm_err(&dev_priv->drm, "Failed to disable HDCP 1.4 stream enc\n");
+			return ret;
+		}
+		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 trans %s stream encryption disabled\n",
+			    transcoder_name(hdcp->stream_transcoder));
+	}
 
 	/*
-	 * If there are other connectors on this port using HDCP, don't disable
-	 * it. Instead, toggle the HDCP signalling off on that particular
-	 * connector/pipe and exit.
+	 * If there are other connectors on this port using HDCP, don't disable it.
+	 * Repeat steps 1-2 for each stream that no longer requires encryption.
 	 */
-	if (dig_port->num_hdcp_streams > 0) {
-		ret = hdcp->shim->toggle_signalling(dig_port,
-						    cpu_transcoder, false);
-		if (ret)
-			DRM_ERROR("Failed to disable HDCP signalling\n");
+	if (dig_port->num_hdcp_streams > 0)
 		return ret;
-	}
 
 	hdcp->hdcp_encrypted = false;
 	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
-- 
2.26.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v3 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init

[Anshuman Gupta]

Pass dig_port as an argument to intel_hdcp_init()
and intel_hdcp2_init().
This will be required for HDCP 2.2 stream encryption.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c |  4 ++--
 drivers/gpu/drm/i915/display/intel_hdcp.c    | 12 +++++++-----
 drivers/gpu/drm/i915/display/intel_hdcp.h    |  4 +++-
 drivers/gpu/drm/i915/display/intel_hdmi.c    |  2 +-
 4 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 652d4645f255..384e384cb9e2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -751,10 +751,10 @@ int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
 		return 0;
 
 	if (intel_connector->mst_port)
-		return intel_hdcp_init(intel_connector, port,
+		return intel_hdcp_init(intel_connector, dig_port,
 				       &intel_dp_mst_hdcp_shim);
 	else if (!intel_dp_is_edp(intel_dp))
-		return intel_hdcp_init(intel_connector, port,
+		return intel_hdcp_init(intel_connector, dig_port,
 				       &intel_dp_hdcp_shim);
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 46c9bd588db1..10770bf0e85e 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1985,12 +1985,13 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
 }
 
 static int initialize_hdcp_port_data(struct intel_connector *connector,
-				     enum port port,
+				     struct intel_digital_port *dig_port,
 				     const struct intel_hdcp_shim *shim)
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	struct hdcp_port_data *data = &hdcp->port_data;
+	enum port port = dig_port->base.port;
 
 	if (INTEL_GEN(dev_priv) < 12)
 		data->fw_ddi = intel_get_mei_fw_ddi_index(port);
@@ -2063,14 +2064,15 @@ void intel_hdcp_component_init(struct drm_i915_private *dev_priv)
 	}
 }
 
-static void intel_hdcp2_init(struct intel_connector *connector, enum port port,
+static void intel_hdcp2_init(struct intel_connector *connector,
+			     struct intel_digital_port *dig_port,
 			     const struct intel_hdcp_shim *shim)
 {
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret;
 
-	ret = initialize_hdcp_port_data(connector, port, shim);
+	ret = initialize_hdcp_port_data(connector, dig_port, shim);
 	if (ret) {
 		drm_dbg_kms(&i915->drm, "Mei hdcp data init failed\n");
 		return;
@@ -2080,7 +2082,7 @@ static void intel_hdcp2_init(struct intel_connector *connector, enum port port,
 }
 
 int intel_hdcp_init(struct intel_connector *connector,
-		    enum port port,
+		    struct intel_digital_port *dig_port,
 		    const struct intel_hdcp_shim *shim)
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
@@ -2091,7 +2093,7 @@ int intel_hdcp_init(struct intel_connector *connector,
 		return -EINVAL;
 
 	if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
-		intel_hdcp2_init(connector, port, shim);
+		intel_hdcp2_init(connector, dig_port, shim);
 
 	ret =
 	drm_connector_attach_content_protection_property(&connector->base,
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index b912a3a0f5b8..8f53b0c7fe5c 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -18,13 +18,15 @@ struct intel_connector;
 struct intel_crtc_state;
 struct intel_encoder;
 struct intel_hdcp_shim;
+struct intel_digital_port;
 enum port;
 enum transcoder;
 
 void intel_hdcp_atomic_check(struct drm_connector *connector,
 			     struct drm_connector_state *old_state,
 			     struct drm_connector_state *new_state);
-int intel_hdcp_init(struct intel_connector *connector, enum port port,
+int intel_hdcp_init(struct intel_connector *connector,
+		    struct intel_digital_port *dig_port,
 		    const struct intel_hdcp_shim *hdcp_shim);
 int intel_hdcp_enable(struct intel_connector *connector,
 		      const struct intel_crtc_state *pipe_config, u8 content_type);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index f58469226694..0788de04711b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3302,7 +3302,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
 	intel_hdmi->attached_connector = intel_connector;
 
 	if (is_hdcp_supported(dev_priv, port)) {
-		int ret = intel_hdcp_init(intel_connector, port,
+		int ret = intel_hdcp_init(intel_connector, dig_port,
 					  &intel_hdmi_hdcp_shim);
 		if (ret)
 			drm_dbg_kms(&dev_priv->drm,
-- 
2.26.2

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[Intel-gfx] [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port

[Anshuman Gupta]

hdcp_port_data is specific to a port on which HDCP
encryption is getting enabled, so encapsulate it to
intel_digital_port.
This will be required to enable HDCP 2.2 stream encryption.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  2 +
 .../drm/i915/display/intel_display_types.h    |  5 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c     | 56 +++++++++++--------
 3 files changed, 39 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index fbeffdfd1a0d..a46ba4e6a835 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4746,6 +4746,8 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
 	intel_dp_encoder_flush_work(encoder);
 
 	drm_encoder_cleanup(encoder);
+	if (dig_port)
+		kfree(dig_port->port_data.streams);
 	kfree(dig_port);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 59b8fc21e3e8..749c3a7e0b45 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -402,7 +402,6 @@ struct intel_hdcp {
 	 * content can flow only through a link protected by HDCP2.2.
 	 */
 	u8 content_type;
-	struct hdcp_port_data port_data;
 
 	bool is_paired;
 	bool is_repeater;
@@ -1446,10 +1445,12 @@ struct intel_digital_port {
 	enum phy_fia tc_phy_fia;
 	u8 tc_phy_fia_idx;
 
-	/* protects num_hdcp_streams reference count */
+	/* protects num_hdcp_streams reference count, port_data */
 	struct mutex hdcp_mutex;
 	/* the number of pipes using HDCP signalling out of this port */
 	unsigned int num_hdcp_streams;
+	/* HDCP port data need to pass to security f/w */
+	struct hdcp_port_data port_data;
 
 	void (*write_infoframe)(struct intel_encoder *encoder,
 				const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 10770bf0e85e..207fa17129ae 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -15,6 +15,7 @@
 #include <drm/drm_hdcp.h>
 #include <drm/i915_component.h>
 
+#include "i915_drv.h"
 #include "i915_reg.h"
 #include "intel_display_power.h"
 #include "intel_display_types.h"
@@ -1031,7 +1032,8 @@ static int
 hdcp2_prepare_ake_init(struct intel_connector *connector,
 		       struct hdcp2_ake_init *ake_data)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1060,7 +1062,8 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
 				struct hdcp2_ake_no_stored_km *ek_pub_km,
 				size_t *msg_sz)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1087,7 +1090,8 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
 static int hdcp2_verify_hprime(struct intel_connector *connector,
 			       struct hdcp2_ake_send_hprime *rx_hprime)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1112,7 +1116,8 @@ static int
 hdcp2_store_pairing_info(struct intel_connector *connector,
 			 struct hdcp2_ake_send_pairing_info *pairing_info)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1138,7 +1143,8 @@ static int
 hdcp2_prepare_lc_init(struct intel_connector *connector,
 		      struct hdcp2_lc_init *lc_init)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1164,7 +1170,8 @@ static int
 hdcp2_verify_lprime(struct intel_connector *connector,
 		    struct hdcp2_lc_send_lprime *rx_lprime)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1189,7 +1196,8 @@ hdcp2_verify_lprime(struct intel_connector *connector,
 static int hdcp2_prepare_skey(struct intel_connector *connector,
 			      struct hdcp2_ske_send_eks *ske_data)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1217,7 +1225,8 @@ hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector,
 								*rep_topology,
 				      struct hdcp2_rep_send_ack *rep_send_ack)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1245,7 +1254,8 @@ static int
 hdcp2_verify_mprime(struct intel_connector *connector,
 		    struct hdcp2_rep_stream_ready *stream_ready)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1268,7 +1278,8 @@ hdcp2_verify_mprime(struct intel_connector *connector,
 
 static int hdcp2_authenticate_port(struct intel_connector *connector)
 {
-	struct hdcp_port_data *data = &connector->hdcp.port_data;
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1292,6 +1303,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector)
 
 static int hdcp2_close_mei_session(struct intel_connector *connector)
 {
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct i915_hdcp_comp_master *comp;
 	int ret;
@@ -1305,7 +1317,7 @@ static int hdcp2_close_mei_session(struct intel_connector *connector)
 	}
 
 	ret = comp->ops->close_hdcp_session(comp->mei_dev,
-					     &connector->hdcp.port_data);
+					     &dig_port->port_data);
 	mutex_unlock(&dev_priv->hdcp_comp_mutex);
 
 	return ret;
@@ -1498,8 +1510,9 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector)
 	if (ret < 0)
 		goto out;
 
-	hdcp->port_data.seq_num_m = hdcp->seq_num_m;
-	hdcp->port_data.streams[0].stream_type = hdcp->content_type;
+	dig_port->port_data.seq_num_m = hdcp->seq_num_m;
+	dig_port->port_data.streams[0].stream_type = hdcp->content_type;
+
 	ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
 
 out:
@@ -1731,7 +1744,9 @@ hdcp2_propagate_stream_management_info(struct intel_connector *connector)
 
 static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 {
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret, i, tries = 3;
 
@@ -1745,8 +1760,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 					    ret);
 				break;
 			}
-			hdcp->port_data.streams[0].stream_type =
-							hdcp->content_type;
+			data->streams[0].stream_type = hdcp->content_type;
 			ret = hdcp2_authenticate_port(connector);
 			if (!ret)
 				break;
@@ -1989,8 +2003,8 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
 				     const struct intel_hdcp_shim *shim)
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct intel_hdcp *hdcp = &connector->hdcp;
-	struct hdcp_port_data *data = &hdcp->port_data;
 	enum port port = dig_port->base.port;
 
 	if (INTEL_GEN(dev_priv) < 12)
@@ -2012,16 +2026,15 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
 	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
 	data->protocol = (u8)shim->protocol;
 
-	data->k = 1;
 	if (!data->streams)
-		data->streams = kcalloc(data->k,
+		data->streams = kcalloc(INTEL_NUM_PIPES(dev_priv),
 					sizeof(struct hdcp2_streamid_type),
 					GFP_KERNEL);
 	if (!data->streams) {
 		drm_err(&dev_priv->drm, "Out of Memory\n");
 		return -ENOMEM;
 	}
-
+	/* For SST */
 	data->streams[0].stream_id = 0;
 	data->streams[0].stream_type = hdcp->content_type;
 
@@ -2100,7 +2113,7 @@ int intel_hdcp_init(struct intel_connector *connector,
 							 hdcp->hdcp2_supported);
 	if (ret) {
 		hdcp->hdcp2_supported = false;
-		kfree(hdcp->port_data.streams);
+		kfree(dig_port->port_data.streams);
 		return ret;
 	}
 
@@ -2140,7 +2153,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
 	}
 
 	if (INTEL_GEN(dev_priv) >= 12)
-		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+		dig_port->port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
 
 	/*
 	 * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
@@ -2307,7 +2320,6 @@ void intel_hdcp_cleanup(struct intel_connector *connector)
 	drm_WARN_ON(connector->base.dev, work_pending(&hdcp->prop_work));
 
 	mutex_lock(&hdcp->mutex);
-	kfree(hdcp->port_data.streams);
 	hdcp->shim = NULL;
 	mutex_unlock(&hdcp->mutex);
 }
-- 
2.26.2

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[Intel-gfx] [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len

[Anshuman Gupta]

Fix the size of WIRED_REPEATER_AUTH_STREAM_REQ cmd buffer size.
It is based upon the actual number of MST streams and size
of wired_cmd_repeater_auth_stream_req_in.
Excluding the size of hdcp_cmd_header.

v2:
hdcp_cmd_header size annotation nitpick. [Tomas]

Cc: Tomas Winkler <tomas.winkler@intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 9ae9669e46ea..3506a3534294 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -569,8 +569,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
 	verify_mprime_in->header.api_version = HDCP_API_VERSION;
 	verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
 	verify_mprime_in->header.status = ME_HDCP_STATUS_SUCCESS;
-	verify_mprime_in->header.buffer_len =
-			WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
+	verify_mprime_in->header.buffer_len = cmd_size  - sizeof(verify_mprime_in->header);
 
 	verify_mprime_in->port.integrated_port_type = data->port_type;
 	verify_mprime_in->port.physical_port = (u8)data->fw_ddi;
-- 
2.26.2

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[Intel-gfx] [PATCH v3 11/16] drm/hdcp: Max MST content streams

[Anshuman Gupta]

Let's define Maximum MST content streams up to four
generically which can be supported by modern display
controllers.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 include/drm/drm_hdcp.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index fe58dbb46962..ac22c246542a 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -101,11 +101,11 @@
 
 /* Following Macros take a byte at a time for bit(s) masking */
 /*
- * TODO: This has to be changed for DP MST, as multiple stream on
- * same port is possible.
- * For HDCP2.2 on HDMI and DP SST this value is always 1.
+ * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
+ * H/W MST streams capacity.
+ * This required to be moved out to platform specific header.
  */
-#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	1
+#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	4
 #define HDCP_2_2_TXCAP_MASK_LEN			2
 #define HDCP_2_2_RXCAPS_LEN			3
 #define HDCP_2_2_RX_REPEATER(x)			((x) & BIT(0))
-- 
2.26.2

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[Intel-gfx] [PATCH v3 12/16] drm/i915/hdcp: MST streams support in hdcp port_data

[Anshuman Gupta]

Add support for multiple mst stream in hdcp port data
which will be used by RepeaterAuthStreamManage msg and
HDCP 2.2 security f/w for m' validation.

v2:
Init the hdcp port data k for HDMI/DP SST strem.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |   4 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c     | 103 +++++++++++++++---
 2 files changed, 93 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 749c3a7e0b45..24e0067c2e7c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1445,10 +1445,12 @@ struct intel_digital_port {
 	enum phy_fia tc_phy_fia;
 	u8 tc_phy_fia_idx;
 
-	/* protects num_hdcp_streams reference count, port_data */
+	/* protects num_hdcp_streams reference count, port_data and port_auth */
 	struct mutex hdcp_mutex;
 	/* the number of pipes using HDCP signalling out of this port */
 	unsigned int num_hdcp_streams;
+	/* port HDCP auth status */
+	bool port_auth;
 	/* HDCP port data need to pass to security f/w */
 	struct hdcp_port_data port_data;
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 207fa17129ae..41c6892d959a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -26,6 +26,64 @@
 #define KEY_LOAD_TRIES	5
 #define HDCP2_LC_RETRY_CNT			3
 
+static int intel_conn_to_vcpi(struct intel_connector *connector)
+{
+	/* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */
+	return connector->port	? connector->port->vcpi.vcpi : 0;
+}
+
+static int
+intel_hdcp_required_content_stream(struct intel_digital_port *dig_port)
+{
+	struct drm_connector_list_iter conn_iter;
+	struct intel_digital_port *conn_dig_port;
+	struct intel_connector *connector;
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
+	bool enforce_type0 = false;
+	int k;
+
+	if (dig_port->port_auth)
+		return 0;
+
+	drm_connector_list_iter_begin(&i915->drm, &conn_iter);
+	for_each_intel_connector_iter(connector, &conn_iter) {
+		if (!intel_encoder_is_mst(intel_attached_encoder(connector)))
+			continue;
+
+		conn_dig_port = intel_attached_dig_port(connector);
+		if (conn_dig_port != dig_port)
+			continue;
+
+		if (connector->base.status == connector_status_disconnected)
+			continue;
+
+		if (!enforce_type0 && !intel_hdcp2_capable(connector))
+			enforce_type0 = true;
+
+		data->streams[data->k].stream_id = intel_conn_to_vcpi(connector);
+		data->k++;
+
+		/* if there is only one active stream */
+		if (dig_port->dp.active_mst_links <= 1)
+			break;
+	}
+	drm_connector_list_iter_end(&conn_iter);
+
+	if (drm_WARN_ON(&i915->drm, data->k > INTEL_NUM_PIPES(i915) || data->k == 0))
+		return -EINVAL;
+
+	/*
+	 * Apply common protection level across all streams in DP MST Topology.
+	 * Use highest supported content type for all streams in DP MST Topology.
+	 */
+	for (k = 0; k < data->k; k++)
+		data->streams[k].stream_type =
+			enforce_type0 ? DRM_MODE_HDCP_CONTENT_TYPE0 : DRM_MODE_HDCP_CONTENT_TYPE1;
+
+	return 0;
+}
+
 static
 bool intel_hdcp_is_ksv_valid(u8 *ksv)
 {
@@ -1296,6 +1354,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector)
 	if (ret < 0)
 		drm_dbg_kms(&dev_priv->drm, "Enable hdcp auth failed. %d\n",
 			    ret);
+
 	mutex_unlock(&dev_priv->hdcp_comp_mutex);
 
 	return ret;
@@ -1477,13 +1536,14 @@ static
 int _hdcp2_propagate_stream_management_info(struct intel_connector *connector)
 {
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	union {
 		struct hdcp2_rep_stream_manage stream_manage;
 		struct hdcp2_rep_stream_ready stream_ready;
 	} msgs;
 	const struct intel_hdcp_shim *shim = hdcp->shim;
-	int ret;
+	int ret, streams_size_delta, i;
 
 	if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX)
 		return -ERANGE;
@@ -1493,15 +1553,18 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector)
 	drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp->seq_num_m);
 
 	/* K no of streams is fixed as 1. Stored as big-endian. */
-	msgs.stream_manage.k = cpu_to_be16(1);
+	msgs.stream_manage.k = cpu_to_be16(data->k);
 
-	/* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */
-	msgs.stream_manage.streams[0].stream_id = 0;
-	msgs.stream_manage.streams[0].stream_type = hdcp->content_type;
+	for (i = 0; i < data->k; i++) {
+		msgs.stream_manage.streams[i].stream_id = data->streams[i].stream_id;
+		msgs.stream_manage.streams[i].stream_type = data->streams[i].stream_type;
+	}
 
+	streams_size_delta = HDCP_2_2_MAX_CONTENT_STREAMS_CNT *
+		sizeof(struct hdcp2_streamid_type) - data->k * sizeof(struct hdcp2_streamid_type);
 	/* Send it to Repeater */
 	ret = shim->write_2_2_msg(dig_port, &msgs.stream_manage,
-				  sizeof(msgs.stream_manage));
+				  sizeof(msgs.stream_manage) - streams_size_delta);
 	if (ret < 0)
 		goto out;
 
@@ -1510,8 +1573,7 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector)
 	if (ret < 0)
 		goto out;
 
-	dig_port->port_data.seq_num_m = hdcp->seq_num_m;
-	dig_port->port_data.streams[0].stream_type = hdcp->content_type;
+	data->seq_num_m = hdcp->seq_num_m;
 
 	ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
 
@@ -1672,6 +1734,7 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
 						 port),
 				    LINK_ENCRYPTION_STATUS,
 				    HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
+	dig_port->port_auth = true;
 
 	return ret;
 }
@@ -1746,11 +1809,9 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 {
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
-	struct hdcp_port_data *data = &dig_port->port_data;
-	struct intel_hdcp *hdcp = &connector->hdcp;
-	int ret, i, tries = 3;
+	int ret = 0, i, tries = 3;
 
-	for (i = 0; i < tries; i++) {
+	for (i = 0; i < tries && !dig_port->port_auth; i++) {
 		ret = hdcp2_authenticate_sink(connector);
 		if (!ret) {
 			ret = hdcp2_propagate_stream_management_info(connector);
@@ -1760,7 +1821,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 					    ret);
 				break;
 			}
-			data->streams[0].stream_type = hdcp->content_type;
+
 			ret = hdcp2_authenticate_port(connector);
 			if (!ret)
 				break;
@@ -1795,7 +1856,9 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 
 static int _intel_hdcp2_enable(struct intel_connector *connector)
 {
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret;
 
@@ -1803,6 +1866,16 @@ static int _intel_hdcp2_enable(struct intel_connector *connector)
 		    connector->base.name, connector->base.base.id,
 		    hdcp->content_type);
 
+	/* Stream which requires encryption */
+	if (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
+		data->k = 1;
+		data->streams[0].stream_type = hdcp->content_type;
+	} else {
+		ret = intel_hdcp_required_content_stream(dig_port);
+		if (ret)
+			return ret;
+	}
+
 	ret = hdcp2_authenticate_and_encrypt(connector);
 	if (ret) {
 		drm_dbg_kms(&i915->drm, "HDCP2 Type%d  Enabling Failed. (%d)\n",
@@ -1820,7 +1893,9 @@ static int _intel_hdcp2_enable(struct intel_connector *connector)
 
 static int _intel_hdcp2_disable(struct intel_connector *connector)
 {
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
 	int ret;
 
 	drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n",
@@ -1832,6 +1907,8 @@ static int _intel_hdcp2_disable(struct intel_connector *connector)
 		drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
 
 	connector->hdcp.hdcp2_encrypted = false;
+	dig_port->port_auth = false;
+	data->k = 0;
 
 	return ret;
 }
-- 
2.26.2

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[Intel-gfx] [PATCH v3 13/16] drm/i915/hdcp: Pass connector to check_2_2_link

[Anshuman Gupta]

This requires for HDCP 2.2 MST check link.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++-
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c       | 3 ++-
 drivers/gpu/drm/i915/display/intel_hdcp.c          | 2 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c          | 3 ++-
 4 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 24e0067c2e7c..dfb5be64e03a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -375,7 +375,8 @@ struct intel_hdcp_shim {
 				  bool is_repeater, u8 type);
 
 	/* HDCP2.2 Link Integrity Check */
-	int (*check_2_2_link)(struct intel_digital_port *dig_port);
+	int (*check_2_2_link)(struct intel_digital_port *dig_port,
+			      struct intel_connector *connector);
 };
 
 struct intel_hdcp {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 384e384cb9e2..a0c62e363c39 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -585,7 +585,8 @@ int intel_dp_hdcp2_config_stream_type(struct intel_digital_port *dig_port,
 }
 
 static
-int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port)
+int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port,
+			      struct intel_connector *connector)
 {
 	u8 rx_status;
 	int ret;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 41c6892d959a..9dd08e2636e9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1945,7 +1945,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 		goto out;
 	}
 
-	ret = hdcp->shim->check_2_2_link(dig_port);
+	ret = hdcp->shim->check_2_2_link(dig_port, connector);
 	if (ret == HDCP_LINK_PROTECTED) {
 		if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
 			intel_hdcp_update_value(connector,
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 0788de04711b..bd0d91101464 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1734,7 +1734,8 @@ int intel_hdmi_hdcp2_read_msg(struct intel_digital_port *dig_port,
 }
 
 static
-int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port)
+int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port,
+				struct intel_connector *connector)
 {
 	u8 rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN];
 	int ret;
-- 
2.26.2

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[Intel-gfx] [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register

[Anshuman Gupta]

Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS
and HDCP2_AUTH_STREAM register in i915_reg header.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 86a9a5145e47..cb6ec2c241f2 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9882,6 +9882,7 @@ enum skl_power_gate {
 					  _PORTD_HDCP2_BASE, \
 					  _PORTE_HDCP2_BASE, \
 					  _PORTF_HDCP2_BASE) + (x))
+
 #define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
 #define _TRANSA_HDCP2_AUTH		0x66498
 #define _TRANSB_HDCP2_AUTH		0x66598
@@ -9921,6 +9922,35 @@ enum skl_power_gate {
 					 TRANS_HDCP2_STATUS(trans) : \
 					 PORT_HDCP2_STATUS(port))
 
+#define PORT_HDCP2_STREAM_STATUS(port)		_PORT_HDCP2_BASE(port, 0xC0)
+#define _TRANSA_HDCP2_STREAM_STATUS		0x664C0
+#define _TRANSB_HDCP2_STREAM_STATUS		0x665C0
+#define TRANS_HDCP2_STREAM_STATUS(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP2_STREAM_STATUS, \
+						    _TRANSB_HDCP2_STREAM_STATUS)
+#define   STREAM_ENCRYPTION_STATUS	BIT(31)
+#define   STREAM_TYPE_STATUS		BIT(30)
+#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_STREAM_STATUS(trans) : \
+					 PORT_HDCP2_STREAM_STATUS(port))
+
+#define _PORTA_HDCP2_AUTH_STREAM		0x66F00
+#define _PORTB_HDCP2_AUTH_STREAM		0x66F04
+#define PORT_HDCP2_AUTH_STREAM(port)	_MMIO_PORT(port, \
+						   _PORTA_HDCP2_AUTH_STREAM, \
+						   _PORTB_HDCP2_AUTH_STREAM)
+#define _TRANSA_HDCP2_AUTH_STREAM		0x66F00
+#define _TRANSB_HDCP2_AUTH_STREAM		0x66F04
+#define TRANS_HDCP2_AUTH_STREAM(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP2_AUTH_STREAM, \
+						    _TRANSB_HDCP2_AUTH_STREAM)
+#define   AUTH_STREAM_TYPE		BIT(31)
+#define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_AUTH_STREAM(trans) : \
+					 PORT_HDCP2_AUTH_STREAM(port))
+
 /* Per-pipe DDI Function Control */
 #define _TRANS_DDI_FUNC_CTL_A		0x60400
 #define _TRANS_DDI_FUNC_CTL_B		0x61400
-- 
2.26.2

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[Intel-gfx] [PATCH v3 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks

[Anshuman Gupta]

Add support for HDCP 2.2 DP MST shim callback.
This adds existing DP HDCP shim callback for Link Authentication
and Encryption and HDCP 2.2 stream encryption
callback.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  4 +
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 81 +++++++++++++++++--
 2 files changed, 77 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index dfb5be64e03a..4cbb151ff3cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -374,6 +374,10 @@ struct intel_hdcp_shim {
 	int (*config_stream_type)(struct intel_digital_port *dig_port,
 				  bool is_repeater, u8 type);
 
+	/* Enable/Disable HDCP 2.2 stream encryption on DP MST Transport Link */
+	int (*stream_2_2_encryption)(struct intel_digital_port *dig_port,
+				     bool enable);
+
 	/* HDCP2.2 Link Integrity Check */
 	int (*check_2_2_link)(struct intel_digital_port *dig_port,
 			      struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index a0c62e363c39..d57ece74c300 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -698,18 +698,14 @@ intel_dp_mst_hdcp_strem_encryption(struct intel_digital_port *dig_port,
 	return 0;
 }
 
-static
-bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
-				  struct intel_connector *connector)
+static bool intel_dp_mst_get_qses_status(struct intel_digital_port *dig_port,
+					 struct intel_connector *connector)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	struct intel_dp *intel_dp = &dig_port->dp;
 	struct drm_dp_query_stream_enc_status_ack_reply reply;
+	struct intel_dp *intel_dp = &dig_port->dp;
 	int ret;
 
-	if (!intel_dp_hdcp_check_link(dig_port, connector))
-		return false;
-
 	ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr,
 						  connector->port, &reply);
 	if (ret) {
@@ -722,6 +718,70 @@ bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
 	return reply.auth_completed && reply.encryption_enabled;
 }
 
+static
+bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
+				  struct intel_connector *connector)
+{
+	if (!intel_dp_hdcp_check_link(dig_port, connector))
+		return false;
+
+	return intel_dp_mst_get_qses_status(dig_port, connector);
+}
+
+static int
+intel_dp_mst_hdcp2_strem_encryption(struct intel_digital_port *dig_port,
+				    bool enable)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct hdcp_port_data *data = &dig_port->port_data;
+	struct intel_dp *dp = &dig_port->dp;
+	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
+	enum port port = dig_port->base.port;
+	/* HDCP2.x register uses stream transcoder */
+	enum transcoder cpu_transcoder = hdcp->stream_transcoder;
+	int ret;
+
+	if (enable && !!(intel_de_read(i915, HDCP2_AUTH_STREAM(i915, cpu_transcoder, port)) &
+	    AUTH_STREAM_TYPE) != data->streams[0].stream_type) {
+		drm_err(&i915->drm, "Seurity f/w didn't set correct auth strem_type\n");
+	}
+
+	ret = intel_dp_mst_toggle_select_hdcp_stream(dig_port, enable);
+	if (ret)
+		return ret;
+
+	/* Wait for encryption confirmation */
+	if (intel_de_wait_for_register(i915,
+				       HDCP2_STREAM_STATUS(i915, cpu_transcoder, port),
+				       STREAM_ENCRYPTION_STATUS,
+				       enable ? STREAM_ENCRYPTION_STATUS : 0,
+				       HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
+		drm_err(&i915->drm, "Timed out waiting for stream encryption %s\n",
+			enable ? "enabled" : "disabled");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
+/*
+ * DP v2.0 I.3.3 ignore the stream signature L' is QSES reply msg reply.
+ * I.3.5 MST source device may use a QSES msg to query downstream status
+ * for a particular stream.
+ */
+static
+int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
+				  struct intel_connector *connector)
+{
+	int ret;
+
+	ret = intel_dp_hdcp2_check_link(dig_port, connector);
+	if (ret)
+		return ret;
+
+	return intel_dp_mst_get_qses_status(dig_port, connector) ? 0 : -EINVAL;
+}
+
 static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
 	.write_an_aksv = intel_dp_hdcp_write_an_aksv,
 	.read_bksv = intel_dp_hdcp_read_bksv,
@@ -735,7 +795,12 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
 	.stream_encryption = intel_dp_mst_hdcp_strem_encryption,
 	.check_link = intel_dp_mst_hdcp_check_link,
 	.hdcp_capable = intel_dp_hdcp_capable,
-
+	.write_2_2_msg = intel_dp_hdcp2_write_msg,
+	.read_2_2_msg = intel_dp_hdcp2_read_msg,
+	.config_stream_type = intel_dp_hdcp2_config_stream_type,
+	.stream_2_2_encryption = intel_dp_mst_hdcp2_strem_encryption,
+	.check_2_2_link = intel_dp_mst_hdcp2_check_link,
+	.hdcp_2_2_capable = intel_dp_hdcp2_capable,
 	.protocol = HDCP_PROTOCOL_DP,
 };
 
-- 
2.26.2

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[Intel-gfx] [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support

[Anshuman Gupta]

Enable HDCP 2.2 over DP MST.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++++++++++-
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 9dd08e2636e9..621c1a94c5ad 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1698,6 +1698,32 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector)
 	return ret;
 }
 
+static int hdcp2_enable_stream_encryption(struct intel_connector *connector)
+{
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_hdcp *hdcp = &connector->hdcp;
+	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
+	enum port port = dig_port->base.port;
+	int ret = 0;
+
+	if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+			    LINK_ENCRYPTION_STATUS)) {
+		drm_err(&dev_priv->drm, "HDCP 2.2 Link is not encrypted\n");
+		return -EPERM;
+	}
+
+	if (hdcp->shim->stream_2_2_encryption) {
+		ret = hdcp->shim->stream_2_2_encryption(dig_port, true);
+		if (ret) {
+			drm_err(&dev_priv->drm, "Failed to enable HDCP 2.2 stream enc\n");
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
 static int hdcp2_enable_encryption(struct intel_connector *connector)
 {
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
@@ -1836,7 +1862,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 			drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
 	}
 
-	if (!ret) {
+	if (!ret && !dig_port->port_auth) {
 		/*
 		 * Ensuring the required 200mSec min time interval between
 		 * Session Key Exchange and encryption.
@@ -1851,6 +1877,8 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 		}
 	}
 
+	ret = hdcp2_enable_stream_encryption(connector);
+
 	return ret;
 }
 
@@ -1896,11 +1924,23 @@ static int _intel_hdcp2_disable(struct intel_connector *connector)
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct hdcp_port_data *data = &dig_port->port_data;
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret;
 
 	drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n",
 		    connector->base.name, connector->base.base.id);
 
+	if (hdcp->shim->stream_2_2_encryption) {
+		ret = hdcp->shim->stream_2_2_encryption(dig_port, false);
+		if (ret) {
+			drm_err(&i915->drm, "Failed to disable HDCP 2.2 stream enc\n");
+			return ret;
+		}
+	}
+
+	if (dig_port->num_hdcp_streams > 0)
+		return ret;
+
 	ret = hdcp2_disable_encryption(connector);
 
 	if (hdcp2_deauthenticate_port(connector) < 0)
@@ -1924,6 +1964,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 	int ret = 0;
 
 	mutex_lock(&hdcp->mutex);
+	mutex_lock(&dig_port->hdcp_mutex);
 	cpu_transcoder = hdcp->cpu_transcoder;
 
 	/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
@@ -2001,6 +2042,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 	}
 
 out:
+	mutex_unlock(&dig_port->hdcp_mutex);
 	mutex_unlock(&hdcp->mutex);
 	return ret;
 }
@@ -2182,7 +2224,7 @@ int intel_hdcp_init(struct intel_connector *connector,
 	if (!shim)
 		return -EINVAL;
 
-	if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
+	if (is_hdcp2_supported(dev_priv))
 		intel_hdcp2_init(connector, dig_port, shim);
 
 	ret =
-- 
2.26.2

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support

[Patchwork]

== Series Details ==

Series: HDCP 2.2 and HDCP 1.4 Gen12 DP MST support
URL   : https://patchwork.freedesktop.org/series/82998/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
b0c6f0e5c7be drm/i915/hdcp: Update CP property in update_pipe
51a27b724b6c drm/i915/hdcp: Get conn while content_type changed
fc1bc88083a0 drm/i915/hotplug: Handle CP_IRQ for DP-MST
1fc201e2b66b drm/i915/hdcp: DP MST transcoder for link and stream
e4b4e110cdcd drm/i915/hdcp: Move HDCP enc status timeout to header
-:13: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt status change")'
#13: 
Related: 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt

total: 1 errors, 0 warnings, 0 checks, 47 lines checked
88024dee38f7 drm/i915/hdcp: HDCP stream encryption support
bf595ddebcec drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support
519c6bdb283c drm/i915/hdcp: Pass dig_port to intel_hdcp_init
1896b2311fc9 drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port
af971f8edf39 misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len
124707ce3db5 drm/hdcp: Max MST content streams
0e04b62f343b drm/i915/hdcp: MST streams support in hdcp port_data
0576d09dd14c drm/i915/hdcp: Pass connector to check_2_2_link
06d2aa038af2 drm/i915/hdcp: Add HDCP 2.2 stream register
ca8152f3267b drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks
260693b556b1 drm/i915/hdcp: Enable HDCP 2.2 MST support


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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support

[Patchwork]

== Series Details ==

Series: HDCP 2.2 and HDCP 1.4 Gen12 DP MST support
URL   : https://patchwork.freedesktop.org/series/82998/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:261:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/i915/gt/intel_reset.c:1312:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20:    expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46:    expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20:    expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46:    expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34:    expected unsigned int [usertype] *s
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/gvt/mmio.c:290:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1440:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1494:15: warning: memset with byte count of 16777216
+./include/linux/seqlock.h:752:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:778:16: warning: trying to copy expression type 31
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block


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[Intel-gfx] ✓ Fi.CI.BAT: success for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 8061 bytes --]

== Series Details ==

Series: HDCP 2.2 and HDCP 1.4 Gen12 DP MST support
URL   : https://patchwork.freedesktop.org/series/82998/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9191 -> Patchwork_18772
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18772:

### IGT changes ###

#### Possible regressions ####

  * {igt@kms_content_protectoin@dp-mst-lic-type-0} (NEW):
    - fi-tgl-u2:          NOTRUN -> [SKIP][1] +3 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-tgl-u2/igt@kms_content_protectoin@dp-mst-lic-type-0.html
    - fi-cml-s:           NOTRUN -> [SKIP][2] +3 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-cml-s/igt@kms_content_protectoin@dp-mst-lic-type-0.html
    - fi-cml-u2:          NOTRUN -> [SKIP][3] +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-cml-u2/igt@kms_content_protectoin@dp-mst-lic-type-0.html

  * {igt@kms_content_protectoin@dp-mst-lic-type-1} (NEW):
    - fi-icl-u2:          NOTRUN -> [SKIP][4] +3 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-icl-u2/igt@kms_content_protectoin@dp-mst-lic-type-1.html
    - fi-icl-y:           NOTRUN -> [SKIP][5] +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-icl-y/igt@kms_content_protectoin@dp-mst-lic-type-1.html

  * {igt@kms_content_protectoin@dp-mst-type-0} (NEW):
    - {fi-ehl-1}:         NOTRUN -> [SKIP][6] +3 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-ehl-1/igt@kms_content_protectoin@dp-mst-type-0.html

  
New tests
---------

  New tests have been introduced between CI_DRM_9191 and Patchwork_18772:

### New IGT tests (4) ###

  * igt@kms_content_protectoin@dp-mst-lic-type-0:
    - Statuses : 36 skip(s)
    - Exec time: [0.0] s

  * igt@kms_content_protectoin@dp-mst-lic-type-1:
    - Statuses : 36 skip(s)
    - Exec time: [0.0] s

  * igt@kms_content_protectoin@dp-mst-type-0:
    - Statuses : 36 skip(s)
    - Exec time: [0.0] s

  * igt@kms_content_protectoin@dp-mst-type-1:
    - Statuses : 36 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_18772 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload:
    - fi-byt-j1900:       [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-byt-j1900/igt@i915_module_load@reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-byt-j1900/igt@i915_module_load@reload.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - fi-icl-u2:          [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-apl-guc:         [INCOMPLETE][11] ([i915#1635]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-apl-guc/igt@gem_close_race@basic-threads.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-apl-guc/igt@gem_close_race@basic-threads.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-bsw-kefka:       [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_pm_rpm@module-reload:
    - fi-byt-j1900:       [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [DMESG-WARN][17] ([i915#165]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-kbl-7500u:       [DMESG-WARN][19] ([i915#2203]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - {fi-kbl-7560u}:     [DMESG-WARN][21] ([i915#1982]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - fi-icl-u2:          [DMESG-WARN][23] ([i915#1982]) -> [PASS][24] +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203


Participating hosts (46 -> 39)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_5823 -> IGTPW_5090
  * Linux: CI_DRM_9191 -> Patchwork_18772

  CI-20190529: 20190529
  CI_DRM_9191: 4b693bbb9b41fda404b5cd081bf5cd8dba240468 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_5090: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5090/index.html
  IGT_5823: 7dd2fe99bd9dde00456cc5abf7e5ef0c8d7d6118 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18772: 260693b556b19508a5a70090c061c2ed02da35c0 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

260693b556b1 drm/i915/hdcp: Enable HDCP 2.2 MST support
ca8152f3267b drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks
06d2aa038af2 drm/i915/hdcp: Add HDCP 2.2 stream register
0576d09dd14c drm/i915/hdcp: Pass connector to check_2_2_link
0e04b62f343b drm/i915/hdcp: MST streams support in hdcp port_data
124707ce3db5 drm/hdcp: Max MST content streams
af971f8edf39 misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len
1896b2311fc9 drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port
519c6bdb283c drm/i915/hdcp: Pass dig_port to intel_hdcp_init
bf595ddebcec drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support
88024dee38f7 drm/i915/hdcp: HDCP stream encryption support
e4b4e110cdcd drm/i915/hdcp: Move HDCP enc status timeout to header
1fc201e2b66b drm/i915/hdcp: DP MST transcoder for link and stream
fc1bc88083a0 drm/i915/hotplug: Handle CP_IRQ for DP-MST
51a27b724b6c drm/i915/hdcp: Get conn while content_type changed
b0c6f0e5c7be drm/i915/hdcp: Update CP property in update_pipe

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/index.html

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.IGT: failure for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 25543 bytes --]

== Series Details ==

Series: HDCP 2.2 and HDCP 1.4 Gen12 DP MST support
URL   : https://patchwork.freedesktop.org/series/82998/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9191_full -> Patchwork_18772_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_18772_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18772_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18772_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_parallel@engines@contexts:
    - shard-hsw:          [PASS][1] -> [FAIL][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-hsw4/igt@gem_exec_parallel@engines@contexts.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-hsw4/igt@gem_exec_parallel@engines@contexts.html

  * igt@gem_pipe_control_store_loop@fresh-buffer:
    - shard-snb:          [PASS][3] -> [FAIL][4] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-snb2/igt@gem_pipe_control_store_loop@fresh-buffer.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-snb4/igt@gem_pipe_control_store_loop@fresh-buffer.html

  * {igt@kms_content_protection@dp-mst-lic-type-1} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][5] +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-iclb6/igt@kms_content_protection@dp-mst-lic-type-1.html

  * {igt@kms_content_protection@dp-mst-type-0} (NEW):
    - shard-tglb:         NOTRUN -> [SKIP][6] +3 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-tglb5/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_vblank@pipe-b-query-forked:
    - shard-hsw:          [PASS][7] -> [INCOMPLETE][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-hsw1/igt@kms_vblank@pipe-b-query-forked.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-hsw7/igt@kms_vblank@pipe-b-query-forked.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@core_hotunplug@hotrebind}:
    - shard-hsw:          NOTRUN -> [WARN][9]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-hsw4/igt@core_hotunplug@hotrebind.html

  * {igt@gem_exec_parallel@engines@userptr}:
    - shard-hsw:          [PASS][10] -> [FAIL][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-hsw4/igt@gem_exec_parallel@engines@userptr.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-hsw4/igt@gem_exec_parallel@engines@userptr.html

  * {igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs}:
    - shard-skl:          [DMESG-FAIL][12] ([i915#1982]) -> [FAIL][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html

  
New tests
---------

  New tests have been introduced between CI_DRM_9191_full and Patchwork_18772_full:

### New IGT tests (4) ###

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - Statuses : 8 skip(s)
    - Exec time: [0.0] s

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - Statuses : 8 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_content_protection@dp-mst-type-0:
    - Statuses : 8 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_content_protection@dp-mst-type-1:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_18772_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@dirty-create@rcs0:
    - shard-hsw:          [PASS][14] -> [INCOMPLETE][15] ([i915#1888])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-hsw2/igt@gem_ctx_isolation@dirty-create@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-hsw4/igt@gem_ctx_isolation@dirty-create@rcs0.html

  * igt@gem_exec_fence@parallel@vecs0:
    - shard-glk:          [PASS][16] -> [DMESG-WARN][17] ([i915#118] / [i915#95])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-glk8/igt@gem_exec_fence@parallel@vecs0.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-glk2/igt@gem_exec_fence@parallel@vecs0.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [PASS][18] -> [SKIP][19] ([i915#2190])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-tglb7/igt@gem_huc_copy@huc-copy.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-tglb6/igt@gem_huc_copy@huc-copy.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-snb:          [PASS][20] -> [INCOMPLETE][21] ([i915#82])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-snb5/igt@gem_userptr_blits@unsync-unmap-cycles.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-snb7/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@gem_workarounds@suspend-resume:
    - shard-skl:          [PASS][22] -> [INCOMPLETE][23] ([i915#198]) +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl4/igt@gem_workarounds@suspend-resume.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl7/igt@gem_workarounds@suspend-resume.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][24] -> [DMESG-WARN][25] ([i915#1436] / [i915#716])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl2/igt@gen9_exec_parse@allowed-single.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl8/igt@gen9_exec_parse@allowed-single.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-skl:          [PASS][26] -> [SKIP][27] ([fdo#109271]) +15 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_edge_walk@pipe-b-256x256-left-edge:
    - shard-skl:          [PASS][28] -> [DMESG-WARN][29] ([i915#1982]) +33 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl6/igt@kms_cursor_edge_walk@pipe-b-256x256-left-edge.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl9/igt@kms_cursor_edge_walk@pipe-b-256x256-left-edge.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-glk:          [PASS][30] -> [FAIL][31] ([i915#72])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-glk1/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-glk1/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
    - shard-apl:          [PASS][32] -> [DMESG-WARN][33] ([i915#1635] / [i915#1982]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-apl8/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-apl1/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][34] -> [DMESG-WARN][35] ([i915#1982])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-glk7/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset@ab-hdmi-a1-hdmi-a2.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-glk8/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@flip-vs-suspend@a-dp1:
    - shard-kbl:          [PASS][36] -> [DMESG-WARN][37] ([i915#180])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-kbl4/igt@kms_flip@flip-vs-suspend@a-dp1.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-kbl6/igt@kms_flip@flip-vs-suspend@a-dp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
    - shard-skl:          [PASS][38] -> [FAIL][39] ([i915#2122]) +2 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render:
    - shard-skl:          [PASS][40] -> [DMESG-FAIL][41] ([i915#1982] / [i915#49])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-tglb:         [PASS][42] -> [DMESG-WARN][43] ([i915#1982]) +3 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-tglb8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-tglb8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-kbl:          [PASS][44] -> [INCOMPLETE][45] ([i915#155] / [i915#648])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][46] -> [FAIL][47] ([fdo#108145] / [i915#265])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [PASS][48] -> [SKIP][49] ([fdo#109441]) +2 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-iclb1/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][50] -> [FAIL][51] ([i915#1635] / [i915#31])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-apl1/igt@kms_setmode@basic.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-apl3/igt@kms_setmode@basic.html

  * igt@perf@oa-exponents:
    - shard-tglb:         [PASS][52] -> [SKIP][53] ([i915#1354])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-tglb5/igt@perf@oa-exponents.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-tglb3/igt@perf@oa-exponents.html
    - shard-glk:          [PASS][54] -> [SKIP][55] ([fdo#109271] / [i915#1354]) +1 similar issue
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-glk1/igt@perf@oa-exponents.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-glk5/igt@perf@oa-exponents.html
    - shard-apl:          [PASS][56] -> [SKIP][57] ([fdo#109271] / [i915#1354] / [i915#1635]) +1 similar issue
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-apl2/igt@perf@oa-exponents.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-apl3/igt@perf@oa-exponents.html

  * igt@perf@rc6-disable:
    - shard-iclb:         [PASS][58] -> [SKIP][59] ([i915#1354]) +1 similar issue
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-iclb6/igt@perf@rc6-disable.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-iclb3/igt@perf@rc6-disable.html
    - shard-kbl:          [PASS][60] -> [SKIP][61] ([fdo#109271] / [i915#1354]) +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-kbl1/igt@perf@rc6-disable.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-kbl2/igt@perf@rc6-disable.html
    - shard-tglb:         [PASS][62] -> [SKIP][63] ([fdo#111719] / [i915#1354])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-tglb1/igt@perf@rc6-disable.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-tglb3/igt@perf@rc6-disable.html

  
#### Possible fixes ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [SKIP][64] ([i915#658]) -> [PASS][65]
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-iclb7/igt@feature_discovery@psr2.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-iclb2/igt@feature_discovery@psr2.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-skl:          [INCOMPLETE][66] ([i915#198]) -> [PASS][67]
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl4/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl1/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_exec_reloc@basic-many-active@rcs0:
    - shard-apl:          [FAIL][68] ([i915#1635] / [i915#2389]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-apl3/igt@gem_exec_reloc@basic-many-active@rcs0.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-apl8/igt@gem_exec_reloc@basic-many-active@rcs0.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-skl:          [TIMEOUT][70] ([i915#2424]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl4/igt@gem_userptr_blits@sync-unmap-cycles.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl4/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-0:
    - shard-glk:          [DMESG-WARN][72] ([i915#1982]) -> [PASS][73] +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-glk3/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-glk6/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen:
    - shard-skl:          [FAIL][74] ([i915#54]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][76] ([i915#180]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [FAIL][78] ([i915#96]) -> [PASS][79]
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-hsw4/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_flip@flip-vs-suspend@c-hdmi-a1:
    - shard-hsw:          [INCOMPLETE][80] ([i915#2055]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-hsw1/igt@kms_flip@flip-vs-suspend@c-hdmi-a1.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-hsw6/igt@kms_flip@flip-vs-suspend@c-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt:
    - shard-snb:          [INCOMPLETE][82] ([i915#82]) -> [PASS][83]
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-snb5/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-snb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-kbl:          [DMESG-WARN][84] ([i915#1982]) -> [PASS][85] +1 similar issue
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-cpu:
    - shard-glk:          [FAIL][86] ([i915#49]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-glk9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-cpu.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-tglb:         [DMESG-WARN][88] ([i915#1982]) -> [PASS][89] +1 similar issue
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render:
    - shard-skl:          [FAIL][90] ([i915#49]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
    - shard-skl:          [DMESG-WARN][92] ([i915#1982]) -> [PASS][93] +31 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl4/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl4/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [FAIL][94] ([fdo#108145] / [i915#265]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [SKIP][96] ([fdo#109441]) -> [PASS][97] +2 similar issues
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-iclb4/igt@kms_psr@psr2_sprite_blt.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_vblank@pipe-a-wait-forked:
    - shard-skl:          [SKIP][98] ([fdo#109271]) -> [PASS][99] +1 similar issue
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl8/igt@kms_vblank@pipe-a-wait-forked.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl1/igt@kms_vblank@pipe-a-wait-forked.html

  
#### Warnings ####

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [FAIL][100] ([i915#1515]) -> [WARN][101] ([i915#1515])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-iclb5/igt@i915_pm_rc6_residency@rc6-idle.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@kms_content_protection@lic:
    - shard-apl:          [FAIL][102] ([fdo#110321] / [i915#1635]) -> [TIMEOUT][103] ([i915#1319] / [i915#1635])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-apl4/igt@kms_content_protection@lic.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-apl1/igt@kms_content_protection@lic.html

  * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size:
    - shard-skl:          [DMESG-WARN][104] ([i915#1982]) -> [SKIP][105] ([fdo#109271]) +1 similar issue
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl8/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl1/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
    - shard-skl:          [FAIL][106] ([fdo#108145] / [i915#265]) -> [DMESG-FAIL][107] ([fdo#108145] / [i915#1982])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
    - shard-skl:          [DMESG-FAIL][108] ([fdo#108145] / [i915#1982]) -> [FAIL][109] ([fdo#108145] / [i915#265])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9191/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
  [fdo#111719]: https://bugs.freedesktop.org/show_bug.cgi?id=111719
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1354]: https://gitlab.freedesktop.org/drm/intel/issues/1354
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1515]: https://gitlab.freedesktop.org/drm/intel/issues/1515
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2055]: https://gitlab.freedesktop.org/drm/intel/issues/2055
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
  [i915#2424]: https://gitlab.freedesktop.org/drm/intel/issues/2424
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#648]: https://gitlab.freedesktop.org/drm/intel/issues/648
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
  [i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * IGT: IGT_5823 -> IGTPW_5090
  * Linux: CI_DRM_9191 -> Patchwork_18772

  CI-20190529: 20190529
  CI_DRM_9191: 4b693bbb9b41fda404b5cd081bf5cd8dba240468 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_5090: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5090/index.html
  IGT_5823: 7dd2fe99bd9dde00456cc5abf7e5ef0c8d7d6118 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18772: 260693b556b19508a5a70090c061c2ed02da35c0 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18772/index.html

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Re: [Intel-gfx] [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe
> 
> When crtc state need_modeset is true it is not necessary it is going to be a real
> modeset, it can turns to be a update_pipe instead of modeset.

I believe you refer fastest here. May be make this a bit clear. 

> This turns content protection property to be DESIRED and hdcp update_pipe left
> with property to be in DESIRED state but actually hdcp->value was ENABLED.
> This caught with DP MST setup, when disabling HDCP on a connector sets the crtc
> state need_modeset to true for all crtc driving the other DP-MST topology
> connectors.

This is a bit ambiguous, you can mention it a bit more clearly. In case of DP MST, how this
affects would help make it clearer.

> 
> v2:
> Fix WARN_ON(connector->base.registration_state ==
> DRM_CONNECTOR_REGISTERED)
> 
> Fixes: 33f9a623bfc6 ("drm/i915/hdcp: Update CP as per the kernel internal
> state")
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index b2a4bbcfdcd2..0d9e8d3b5603 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -2221,6 +2221,11 @@ void intel_hdcp_update_pipe(struct
> intel_atomic_state *state,
>  		desired_and_not_enabled =
>  			hdcp->value !=
> DRM_MODE_CONTENT_PROTECTION_ENABLED;
>  		mutex_unlock(&hdcp->mutex);
>

Please add a comment explaining the rationale here as well.

> +		if (!desired_and_not_enabled &&
> !content_protection_type_changed) {
> +			drm_connector_get(&connector->base);

Where are we releasing this ref.

> +			schedule_work(&hdcp->prop_work);
> +		}
>  	}
> 
>  	if (desired_and_not_enabled || content_protection_type_changed)
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed
> 
> Get DRM connector reference count while scheduling a prop work to avoid any
> possible destroy of DRM connector when it is in DRM_CONNECTOR_REGISTERED
> state.
> 
> Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing
> connectors")
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 0d9e8d3b5603..42cf91cf4f20 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -2210,6 +2210,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state
> *state,
>  	if (content_protection_type_changed) {
>  		mutex_lock(&hdcp->mutex);
>  		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
> +		drm_connector_get(&connector->base);

Where are releasing this ref.

>  		schedule_work(&hdcp->prop_work);
>  		mutex_unlock(&hdcp->mutex);
>  	}
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed

[Anshuman Gupta]

On 2020-10-27 at 11:04:17 +0530, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> > Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> > <anshuman.gupta@intel.com>
> > Subject: [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed
> > 
> > Get DRM connector reference count while scheduling a prop work to avoid any
> > possible destroy of DRM connector when it is in DRM_CONNECTOR_REGISTERED
> > state.
> > 
> > Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing
> > connectors")
> > Cc: Sean Paul <seanpaul@chromium.org>
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_hdcp.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index 0d9e8d3b5603..42cf91cf4f20 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -2210,6 +2210,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state
> > *state,
> >  	if (content_protection_type_changed) {
> >  		mutex_lock(&hdcp->mutex);
> >  		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
> > +		drm_connector_get(&connector->base);
> 
> Where are releasing this ref.
Thanks Uma for review the releasing ref is present in prop work function.
intel_hdcp_prop_work().
As prop function releases the ref for connector somtimes it lead to destroy
the connector, if we schedule the prop work without taking any connector reference.

Thanks,
Anshuman Gupta.
> 
> >  		schedule_work(&hdcp->prop_work);
> >  		mutex_unlock(&hdcp->mutex);
> >  	}
> > --
> > 2.26.2
> 
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Re: [Intel-gfx] [PATCH v3 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Ville Syrjälä <ville.syrjala@linux.intel.com>
> Subject: [PATCH v3 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST
> 
> Handle CP_IRQ in DEVICE_SERVICE_IRQ_VECTOR_ESI0 It requires to call
> intel_hdcp_handle_cp_irq() in case of CP_IRQ is triggered by a sink in DP-MST
> topology.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 818daab252f3..21c6c9828cd7 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5657,6 +5657,17 @@ static void intel_dp_handle_test_request(struct
> intel_dp *intel_dp)
>  			    "Could not write test response to sink\n");  }
> 
> +static void
> +intel_dp_mst_hpd_irq(struct intel_dp *intel_dp, u8 *esi, bool *handled)
> +{
> +		drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, handled);
> +
> +		if (esi[1] & DP_CP_IRQ) {
> +			intel_hdcp_handle_cp_irq(intel_dp-
> >attached_connector);
> +			*handled = true;
> +		}
> +}
> +
>  /**
>   * intel_dp_check_mst_status - service any pending MST interrupts, check link
> status
>   * @intel_dp: Intel DP struct
> @@ -5701,7 +5712,8 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
> 
>  		drm_dbg_kms(&i915->drm, "got esi %3ph\n", esi);
> 
> -		drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, &handled);
> +		intel_dp_mst_hpd_irq(intel_dp, esi, &handled);
> +
>  		if (!handled)
>  			break;
> 
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 04/16] drm/i915/hdcp: DP MST transcoder for link and stream

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 04/16] drm/i915/hdcp: DP MST transcoder for link and stream
> 
> Gen12 has H/W delta with respect to HDCP{1.x,2.x} display engine instances lies
> in Transcoder instead of DDI as in Gen11.
> 
> This requires hdcp driver to use mst_master_transcoder for link authentication
> and stream transcoder for stream encryption separately.
> 
> This will be used for both HDCP 1.4 and HDCP 2.2 over DP MST on Gen12.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c          |  2 +-
>  .../gpu/drm/i915/display/intel_display_types.h    |  2 ++
>  drivers/gpu/drm/i915/display/intel_dp_mst.c       |  2 +-
>  drivers/gpu/drm/i915/display/intel_hdcp.c         | 15 +++++++++++----
>  drivers/gpu/drm/i915/display/intel_hdcp.h         |  2 +-
>  5 files changed, 16 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 09811be08cfe..bf8730267cfd 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4059,7 +4059,7 @@ static void intel_enable_ddi(struct intel_atomic_state
> *state,
>  	if (conn_state->content_protection ==
>  	    DRM_MODE_CONTENT_PROTECTION_DESIRED)
>  		intel_hdcp_enable(to_intel_connector(conn_state->connector),
> -				  crtc_state->cpu_transcoder,
> +				  crtc_state,
>  				  (u8)conn_state->hdcp_content_type);
>  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index f6f0626649e0..c47124a679b6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -432,6 +432,8 @@ struct intel_hdcp {
>  	 * Hence caching the transcoder here.
>  	 */
>  	enum transcoder cpu_transcoder;
> +	/* Only used for DP MST stream encryption */
> +	enum transcoder stream_transcoder;
>  };
> 
>  struct intel_connector {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index c8fcec4d0788..16865b200062 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -568,7 +568,7 @@ static void intel_mst_enable_dp(struct
> intel_atomic_state *state,
>  	if (conn_state->content_protection ==
>  	    DRM_MODE_CONTENT_PROTECTION_DESIRED)
>  		intel_hdcp_enable(to_intel_connector(conn_state->connector),
> -				  pipe_config->cpu_transcoder,
> +				  pipe_config,
>  				  (u8)conn_state->hdcp_content_type);
>  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 42cf91cf4f20..a9b652c6e742 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -2095,7 +2095,7 @@ int intel_hdcp_init(struct intel_connector *connector,
> }
> 
>  int intel_hdcp_enable(struct intel_connector *connector,
> -		      enum transcoder cpu_transcoder, u8 content_type)
> +		      const struct intel_crtc_state *pipe_config, u8 content_type)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> @@ -2111,10 +2111,17 @@ int intel_hdcp_enable(struct intel_connector
> *connector,
>  	drm_WARN_ON(&dev_priv->drm,
>  		    hdcp->value ==
> DRM_MODE_CONTENT_PROTECTION_ENABLED);
>  	hdcp->content_type = content_type;
> -	hdcp->cpu_transcoder = cpu_transcoder;
> +
> +	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
> +		hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
> +		hdcp->stream_transcoder = pipe_config->cpu_transcoder;
> +	} else {
> +		hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
> +		hdcp->stream_transcoder = INVALID_TRANSCODER;
> +	}
> 
>  	if (INTEL_GEN(dev_priv) >= 12)
> -		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(cpu_transcoder);
> +		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(hdcp-
> >cpu_transcoder);
> 
>  	/*
>  	 * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
> @@ -2231,7 +2238,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state
> *state,
> 
>  	if (desired_and_not_enabled || content_protection_type_changed)
>  		intel_hdcp_enable(connector,
> -				  crtc_state->cpu_transcoder,
> +				  crtc_state,
>  				  (u8)conn_state->hdcp_content_type);
>  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h
> b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index 1bbf5b67ed0a..bc51c1e9b481 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -25,7 +25,7 @@ void intel_hdcp_atomic_check(struct drm_connector
> *connector,  int intel_hdcp_init(struct intel_connector *connector, enum port
> port,
>  		    const struct intel_hdcp_shim *hdcp_shim);  int
> intel_hdcp_enable(struct intel_connector *connector,
> -		      enum transcoder cpu_transcoder, u8 content_type);
> +		      const struct intel_crtc_state *pipe_config, u8 content_type);
>  int intel_hdcp_disable(struct intel_connector *connector);  void
> intel_hdcp_update_pipe(struct intel_atomic_state *state,
>  			    struct intel_encoder *encoder,
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to
> header
> 
> DP MST stream encryption status requires time of a link frame in order to change
> its status, but as there were some HDCP encryption timeout observed earlier, it
> is safer to use ENCRYPT_STATUS_CHANGE_TIMEOUT_MS timeout for stream
> status too, it requires to move the macro to a header.
> It will be used by both HDCP{1.x,2.x} stream status timeout.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Related: 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt status change")
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 9 ++++-----
> drivers/gpu/drm/i915/display/intel_hdcp.h | 2 ++
>  2 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index a9b652c6e742..61252d4be3dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -23,7 +23,6 @@
>  #include "intel_connector.h"
> 
>  #define KEY_LOAD_TRIES	5
> -#define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
>  #define HDCP2_LC_RETRY_CNT			3
> 
>  static
> @@ -762,7 +761,7 @@ static int intel_hdcp_auth(struct intel_connector
> *connector)
>  	if (intel_de_wait_for_set(dev_priv,
>  				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
>  				  HDCP_STATUS_ENC,
> -				  ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>  		drm_err(&dev_priv->drm, "Timed out waiting for encryption\n");
>  		return -ETIMEDOUT;
>  	}
> @@ -809,7 +808,7 @@ static int _intel_hdcp_disable(struct intel_connector
> *connector)
>  	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
>  	if (intel_de_wait_for_clear(dev_priv,
>  				    HDCP_STATUS(dev_priv, cpu_transcoder, port),
> -				    ~0, ENCRYPT_STATUS_CHANGE_TIMEOUT_MS))
> {
> +				    ~0,
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>  		drm_err(&dev_priv->drm,
>  			"Failed to disable HDCP, timeout clearing status\n");
>  		return -ETIMEDOUT;
> @@ -1641,7 +1640,7 @@ static int hdcp2_enable_encryption(struct
> intel_connector *connector)
>  				    HDCP2_STATUS(dev_priv, cpu_transcoder,
>  						 port),
>  				    LINK_ENCRYPTION_STATUS,
> -				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> 
>  	return ret;
>  }
> @@ -1665,7 +1664,7 @@ static int hdcp2_disable_encryption(struct
> intel_connector *connector)
>  				      HDCP2_STATUS(dev_priv, cpu_transcoder,
>  						   port),
>  				      LINK_ENCRYPTION_STATUS,
> -				      ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
>  	if (ret == -ETIMEDOUT)
>  		drm_dbg_kms(&dev_priv->drm, "Disable Encryption Timedout");
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h
> b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index bc51c1e9b481..b912a3a0f5b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -8,6 +8,8 @@
> 
>  #include <linux/types.h>
> 
> +#define HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
> +
>  struct drm_connector;
>  struct drm_connector_state;
>  struct drm_i915_private;
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support
> 
> Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit in
> TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP encryption over
> DP MST Transport Link.
> 
> HDCP 1.4 stream encryption requires to validate the stream encryption status in
> HDCP_STATUS_{TRANSCODER,PORT} register driving that link in order to
> enable/disable the stream encryption.
> 
> Both of above requirement are same for all Gen with respect to B.Spec
> Documentation.
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 10 +--
>  drivers/gpu/drm/i915/display/intel_ddi.h      |  6 +-
>  .../drm/i915/display/intel_display_types.h    |  4 +
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ++++++++++++++++---
>  drivers/gpu/drm/i915/display/intel_hdmi.c     | 14 ++--
>  drivers/gpu/drm/i915/i915_reg.h               |  1 +
>  6 files changed, 90 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index bf8730267cfd..fbeffdfd1a0d 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct
> intel_crtc_state *crtc_state
>  	}
>  }
> 
> -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> -				     enum transcoder cpu_transcoder,
> -				     bool enable)
> +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> +			       enum transcoder cpu_transcoder,
> +			       bool enable, u32 hdcp_mask)
>  {
>  	struct drm_device *dev = intel_encoder->base.dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev); @@ -1965,9 +1965,9
> @@ int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> 
>  	tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
>  	if (enable)
> -		tmp |= TRANS_DDI_HDCP_SIGNALLING;
> +		tmp |= hdcp_mask;
>  	else
> -		tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
> +		tmp &= ~hdcp_mask;
>  	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
>  	intel_display_power_put(dev_priv, intel_encoder->power_domain,
> wakeref);
>  	return ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
> b/drivers/gpu/drm/i915/display/intel_ddi.h
> index dcc711cfe4fe..a4dd815c0000 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> @@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
>  		      const struct intel_crtc_state *crtc_state);
>  u32 ddi_signal_levels(struct intel_dp *intel_dp,
>  		      const struct intel_crtc_state *crtc_state); -int
> intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> -				     enum transcoder cpu_transcoder,
> -				     bool enable);
> +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> +			       enum transcoder cpu_transcoder,
> +			       bool enable, u32 hdcp_mask);
>  void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
> 
>  #endif /* __INTEL_DDI_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c47124a679b6..59b8fc21e3e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -339,6 +339,10 @@ struct intel_hdcp_shim {
>  				 enum transcoder cpu_transcoder,
>  				 bool enable);
> 
> +	/* Enable/Disable stream encryption on DP MST Transport Link */
> +	int (*stream_encryption)(struct intel_digital_port *dig_port,
> +				 bool enable);
> +
>  	/* Ensures the link is still protected */
>  	bool (*check_link)(struct intel_digital_port *dig_port,
>  			   struct intel_connector *connector); diff --git
> a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 03424d20e9f7..652d4645f255 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -16,6 +16,30 @@
>  #include "intel_dp.h"
>  #include "intel_hdcp.h"
> 
> +static unsigned int transcoder_to_stream_enc_status(enum transcoder
> +cpu_transcoder) {
> +	u32 stream_enc_mask;
> +
> +	switch (cpu_transcoder) {
> +	case TRANSCODER_A:
> +		stream_enc_mask = HDCP_STATUS_STREAM_A_ENC;
> +		break;
> +	case TRANSCODER_B:
> +		stream_enc_mask = HDCP_STATUS_STREAM_B_ENC;
> +		break;
> +	case TRANSCODER_C:
> +		stream_enc_mask = HDCP_STATUS_STREAM_C_ENC;
> +		break;
> +	case TRANSCODER_D:
> +		stream_enc_mask = HDCP_STATUS_STREAM_D_ENC;
> +		break;
> +	default:
> +		stream_enc_mask = 0;
> +	}
> +
> +	return stream_enc_mask;
> +}
> +
>  static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)
> {
>  	long ret;
> @@ -622,24 +646,57 @@ static const struct intel_hdcp_shim
> intel_dp_hdcp_shim = {  };
> 
>  static int
> -intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
> -				    enum transcoder cpu_transcoder,
> -				    bool enable)
> +intel_dp_mst_toggle_select_hdcp_stream(struct intel_digital_port *dig_port,
> +				       bool enable)

I feel ....toggle_hdcp_stream_select will look better.

>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_dp *dp = &dig_port->dp;
> +	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
>  	int ret;
> 
> -	if (!enable)
> -		usleep_range(6, 60); /* Bspec says >= 6us */

Should we not keep this delay.

> -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base,
> -					       cpu_transcoder, enable);
> +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base,
> +					 hdcp->stream_transcoder, enable,
> +					 TRANS_DDI_HDCP_SELECT);
>  	if (ret)
> -		drm_dbg_kms(&i915->drm, "%s HDCP signalling failed (%d)\n",
> -			      enable ? "Enable" : "Disable", ret);
> +		drm_err(&i915->drm, "%s Multistream HDCP select failed

This print doesn't sound good, refine it.

> (%d)\n",
> +			enable ? "Enable" : "Disable", ret);
>  	return ret;
>  }
> 
> +static int
> +intel_dp_mst_hdcp_strem_encryption(struct intel_digital_port *dig_port,
> +				   bool enable)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_dp *dp = &dig_port->dp;
> +	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
> +	enum port port = dig_port->base.port;
> +	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
> +	u32 stream_enc_status;
> +	int ret;
> +
> +	ret = intel_dp_mst_toggle_select_hdcp_stream(dig_port, enable);
> +	if (ret)
> +		return ret;
> +
> +	stream_enc_status =  transcoder_to_stream_enc_status(hdcp-
> >stream_transcoder);
> +	if (!stream_enc_status)
> +		return -EINVAL;
> +
> +	/* Wait for encryption confirmation */
> +	if (intel_de_wait_for_register(i915,
> +				       HDCP_STATUS(i915, cpu_transcoder, port),
> +				       stream_enc_status,
> +				       enable ? stream_enc_status : 0,
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
> +		drm_err(&i915->drm, "Timed out waiting for stream encryption
> %s\n",
> +			enable ? "enabled" : "disabled");
> +		return -ETIMEDOUT;
> +	}
> +
> +	return 0;
> +}
> +
>  static
>  bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
>  				  struct intel_connector *connector) @@ -673,7
> +730,8 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
>  	.read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
>  	.read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
>  	.read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
> -	.toggle_signalling = intel_dp_mst_hdcp_toggle_signalling,
> +	.toggle_signalling = intel_dp_hdcp_toggle_signalling,
> +	.stream_encryption = intel_dp_mst_hdcp_strem_encryption,

Typo in stream.

>  	.check_link = intel_dp_mst_hdcp_check_link,
>  	.hdcp_capable = intel_dp_hdcp_capable,
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index f90838bc74fb..f58469226694 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1495,15 +1495,16 @@ static int kbl_repositioning_enc_en_signal(struct
> intel_connector *connector,
>  		usleep_range(25, 50);
>  	}
> 
> -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
> -					       false);
> +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base, cpu_transcoder,
> +					 false, TRANS_DDI_HDCP_SIGNALLING);
>  	if (ret) {
>  		drm_err(&dev_priv->drm,
>  			"Disable HDCP signalling failed (%d)\n", ret);
>  		return ret;
>  	}
> -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
> -					       true);
> +
> +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base, cpu_transcoder,
> +					 true, TRANS_DDI_HDCP_SIGNALLING);
>  	if (ret) {
>  		drm_err(&dev_priv->drm,
>  			"Enable HDCP signalling failed (%d)\n", ret); @@ -1526,8
> +1527,9 @@ int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port
> *dig_port,
>  	if (!enable)
>  		usleep_range(6, 60); /* Bspec says >= 6us */
> 
> -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
> -					       enable);
> +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base,
> +					 cpu_transcoder, enable,
> +					 TRANS_DDI_HDCP_SIGNALLING);
>  	if (ret) {
>  		drm_err(&dev_priv->drm, "%s HDCP signalling failed (%d)\n",
>  			enable ? "Enable" : "Disable", ret); diff --git
> a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index
> d4952c9875fb..86a9a5145e47 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9970,6 +9970,7 @@ enum skl_power_gate {
>  #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
>  #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)  #define
> TRANS_DDI_HDMI_SCRAMBLER_RESET_FREQ (1 << 6)
> +#define  TRANS_DDI_HDCP_SELECT		REG_BIT(5)
>  #define  TRANS_DDI_BFI_ENABLE		(1 << 4)
>  #define  TRANS_DDI_HIGH_TMDS_CHAR_RATE	(1 << 4)
>  #define  TRANS_DDI_HDMI_SCRAMBLING	(1 << 0)
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST
> support
> 
> Enable HDCP 1.4 over DP MST for Gen12.
> This also enable the stream encryption support for older generations, which was
> missing earlier.
> 
> v2:
> - Added debug print for stream encryption.
> - Disable the hdcp on port after disabling last stream
>   encryption.

Don't see port disable here, Am I missing something.

> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++---
>  drivers/gpu/drm/i915/display/intel_hdcp.c   | 46 ++++++++++++++-------
>  2 files changed, 35 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 16865b200062..f00e12fc83e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -826,13 +826,9 @@ static struct drm_connector
> *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
>  	intel_attach_force_audio_property(connector);
>  	intel_attach_broadcast_rgb_property(connector);
> 
> -
> -	/* TODO: Figure out how to make HDCP work on GEN12+ */
> -	if (INTEL_GEN(dev_priv) < 12) {
> -		ret = intel_dp_init_hdcp(dig_port, intel_connector);
> -		if (ret)
> -			DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
> -	}
> +	ret = intel_dp_init_hdcp(dig_port, intel_connector);
> +	if (ret)
> +		drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n");
> 
>  	/*
>  	 * Reuse the prop from the SST connector because we're diff --git
> a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 61252d4be3dd..46c9bd588db1 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -612,7 +612,12 @@ int intel_hdcp_auth_downstream(struct intel_connector
> *connector)
>  	return ret;
>  }
> 
> -/* Implements Part 1 of the HDCP authorization procedure */
> +/*
> + * Implements Part 1 of the HDCP authorization procedure.
> + * Authentication Part 1 steps for Multi-stream DisplayPort.
> + * Step 1. Auth Part 1 sequence on the driving MST Trasport Link.
> + * Step 2. Enable encryption for each stream that requires encryption.
> + */
>  static int intel_hdcp_auth(struct intel_connector *connector)  {
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> @@ -766,10 +771,16 @@ static int intel_hdcp_auth(struct intel_connector
> *connector)
>  		return -ETIMEDOUT;
>  	}
> 
> -	/*
> -	 * XXX: If we have MST-connected devices, we need to enable encryption
> -	 * on those as well.
> -	 */
> +	/* DP MST Auth Part 1 Step 2.a and Step 2.b */
> +	if (shim->stream_encryption) {
> +		ret = shim->stream_encryption(dig_port, true);
> +		if (ret) {
> +			drm_err(&dev_priv->drm, "Failed to enable HDCP 1.4
> stream enc\n");
> +			return ret;
> +		}
> +		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 tras %s stream
> encrypted\n",
> +			    transcoder_name(hdcp->stream_transcoder));
> +	}
> 
>  	if (repeater_present)
>  		return intel_hdcp_auth_downstream(connector);
> @@ -790,19 +801,26 @@ static int _intel_hdcp_disable(struct intel_connector
> *connector)
> 
>  	drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
>  		    connector->base.name, connector->base.base.id);
> +	/*
> +	 * Step 1: Deselect HDCP Multiplestream Bit.
> +	 * Step 2: poll for stream encryption status to be disable.
> +	 */

The above comment should be inside the callback, doesn't add value here.

> +	if (hdcp->shim->stream_encryption) {
> +		ret = hdcp->shim->stream_encryption(dig_port, false);
> +		if (ret) {
> +			drm_err(&dev_priv->drm, "Failed to disable HDCP 1.4
> stream enc\n");
> +			return ret;
> +		}
> +		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 trans %s stream
> encryption disabled\n",
> +			    transcoder_name(hdcp->stream_transcoder));
> +	}
> 
>  	/*
> -	 * If there are other connectors on this port using HDCP, don't disable
> -	 * it. Instead, toggle the HDCP signalling off on that particular
> -	 * connector/pipe and exit.
> +	 * If there are other connectors on this port using HDCP, don't disable it.
> +	 * Repeat steps 1-2 for each stream that no longer requires encryption.
>  	 */
> -	if (dig_port->num_hdcp_streams > 0) {
> -		ret = hdcp->shim->toggle_signalling(dig_port,
> -						    cpu_transcoder, false);
> -		if (ret)
> -			DRM_ERROR("Failed to disable HDCP signalling\n");
> +	if (dig_port->num_hdcp_streams > 0)
>  		return ret;
> -	}
> 
>  	hdcp->hdcp_encrypted = false;
>  	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init
> 
> Pass dig_port as an argument to intel_hdcp_init() and intel_hdcp2_init().
> This will be required for HDCP 2.2 stream encryption.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c |  4 ++--
>  drivers/gpu/drm/i915/display/intel_hdcp.c    | 12 +++++++-----
>  drivers/gpu/drm/i915/display/intel_hdcp.h    |  4 +++-
>  drivers/gpu/drm/i915/display/intel_hdmi.c    |  2 +-
>  4 files changed, 13 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 652d4645f255..384e384cb9e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -751,10 +751,10 @@ int intel_dp_init_hdcp(struct intel_digital_port
> *dig_port,
>  		return 0;
> 
>  	if (intel_connector->mst_port)
> -		return intel_hdcp_init(intel_connector, port,
> +		return intel_hdcp_init(intel_connector, dig_port,
>  				       &intel_dp_mst_hdcp_shim);
>  	else if (!intel_dp_is_edp(intel_dp))
> -		return intel_hdcp_init(intel_connector, port,
> +		return intel_hdcp_init(intel_connector, dig_port,
>  				       &intel_dp_hdcp_shim);
> 
>  	return 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 46c9bd588db1..10770bf0e85e 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1985,12 +1985,13 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum
> transcoder cpu_transcoder)  }
> 
>  static int initialize_hdcp_port_data(struct intel_connector *connector,
> -				     enum port port,
> +				     struct intel_digital_port *dig_port,
>  				     const struct intel_hdcp_shim *shim)  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct intel_hdcp *hdcp = &connector->hdcp;
>  	struct hdcp_port_data *data = &hdcp->port_data;
> +	enum port port = dig_port->base.port;
> 
>  	if (INTEL_GEN(dev_priv) < 12)
>  		data->fw_ddi = intel_get_mei_fw_ddi_index(port); @@ -2063,14
> +2064,15 @@ void intel_hdcp_component_init(struct drm_i915_private
> *dev_priv)
>  	}
>  }
> 
> -static void intel_hdcp2_init(struct intel_connector *connector, enum port port,
> +static void intel_hdcp2_init(struct intel_connector *connector,
> +			     struct intel_digital_port *dig_port,
>  			     const struct intel_hdcp_shim *shim)  {
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct intel_hdcp *hdcp = &connector->hdcp;
>  	int ret;
> 
> -	ret = initialize_hdcp_port_data(connector, port, shim);
> +	ret = initialize_hdcp_port_data(connector, dig_port, shim);
>  	if (ret) {
>  		drm_dbg_kms(&i915->drm, "Mei hdcp data init failed\n");
>  		return;
> @@ -2080,7 +2082,7 @@ static void intel_hdcp2_init(struct intel_connector
> *connector, enum port port,  }
> 
>  int intel_hdcp_init(struct intel_connector *connector,
> -		    enum port port,
> +		    struct intel_digital_port *dig_port,
>  		    const struct intel_hdcp_shim *shim)  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev); @@ -
> 2091,7 +2093,7 @@ int intel_hdcp_init(struct intel_connector *connector,
>  		return -EINVAL;
> 
>  	if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
> -		intel_hdcp2_init(connector, port, shim);
> +		intel_hdcp2_init(connector, dig_port, shim);
> 
>  	ret =
>  	drm_connector_attach_content_protection_property(&connector->base,
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h
> b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index b912a3a0f5b8..8f53b0c7fe5c 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -18,13 +18,15 @@ struct intel_connector;  struct intel_crtc_state;  struct
> intel_encoder;  struct intel_hdcp_shim;
> +struct intel_digital_port;
>  enum port;
>  enum transcoder;
> 
>  void intel_hdcp_atomic_check(struct drm_connector *connector,
>  			     struct drm_connector_state *old_state,
>  			     struct drm_connector_state *new_state); -int
> intel_hdcp_init(struct intel_connector *connector, enum port port,
> +int intel_hdcp_init(struct intel_connector *connector,
> +		    struct intel_digital_port *dig_port,
>  		    const struct intel_hdcp_shim *hdcp_shim);  int
> intel_hdcp_enable(struct intel_connector *connector,
>  		      const struct intel_crtc_state *pipe_config, u8 content_type);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index f58469226694..0788de04711b 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -3302,7 +3302,7 @@ void intel_hdmi_init_connector(struct
> intel_digital_port *dig_port,
>  	intel_hdmi->attached_connector = intel_connector;
> 
>  	if (is_hdcp_supported(dev_priv, port)) {
> -		int ret = intel_hdcp_init(intel_connector, port,
> +		int ret = intel_hdcp_init(intel_connector, dig_port,
>  					  &intel_hdmi_hdcp_shim);
>  		if (ret)
>  			drm_dbg_kms(&dev_priv->drm,
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to
> dig_port
> 
> hdcp_port_data is specific to a port on which HDCP encryption is getting
> enabled, so encapsulate it to intel_digital_port.
> This will be required to enable HDCP 2.2 stream encryption.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      |  2 +
>  .../drm/i915/display/intel_display_types.h    |  5 +-
>  drivers/gpu/drm/i915/display/intel_hdcp.c     | 56 +++++++++++--------
>  3 files changed, 39 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index fbeffdfd1a0d..a46ba4e6a835 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4746,6 +4746,8 @@ static void intel_ddi_encoder_destroy(struct
> drm_encoder *encoder)
>  	intel_dp_encoder_flush_work(encoder);
> 
>  	drm_encoder_cleanup(encoder);
> +	if (dig_port)
> +		kfree(dig_port->port_data.streams);
>  	kfree(dig_port);
>  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 59b8fc21e3e8..749c3a7e0b45 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -402,7 +402,6 @@ struct intel_hdcp {
>  	 * content can flow only through a link protected by HDCP2.2.
>  	 */
>  	u8 content_type;
> -	struct hdcp_port_data port_data;
> 
>  	bool is_paired;
>  	bool is_repeater;
> @@ -1446,10 +1445,12 @@ struct intel_digital_port {
>  	enum phy_fia tc_phy_fia;
>  	u8 tc_phy_fia_idx;
> 
> -	/* protects num_hdcp_streams reference count */
> +	/* protects num_hdcp_streams reference count, port_data */
>  	struct mutex hdcp_mutex;
>  	/* the number of pipes using HDCP signalling out of this port */
>  	unsigned int num_hdcp_streams;
> +	/* HDCP port data need to pass to security f/w */
> +	struct hdcp_port_data port_data;
> 
>  	void (*write_infoframe)(struct intel_encoder *encoder,
>  				const struct intel_crtc_state *crtc_state, diff --git
> a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 10770bf0e85e..207fa17129ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -15,6 +15,7 @@
>  #include <drm/drm_hdcp.h>
>  #include <drm/i915_component.h>
> 
> +#include "i915_drv.h"
>  #include "i915_reg.h"
>  #include "intel_display_power.h"
>  #include "intel_display_types.h"
> @@ -1031,7 +1032,8 @@ static int
>  hdcp2_prepare_ake_init(struct intel_connector *connector,
>  		       struct hdcp2_ake_init *ake_data)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1060,7 +1062,8 @@ hdcp2_verify_rx_cert_prepare_km(struct
> intel_connector *connector,
>  				struct hdcp2_ake_no_stored_km *ek_pub_km,
>  				size_t *msg_sz)
>  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1087,7 +1090,8 @@ hdcp2_verify_rx_cert_prepare_km(struct
> intel_connector *connector,  static int hdcp2_verify_hprime(struct
> intel_connector *connector,
>  			       struct hdcp2_ake_send_hprime *rx_hprime)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1112,7 +1116,8 @@ static int
>  hdcp2_store_pairing_info(struct intel_connector *connector,
>  			 struct hdcp2_ake_send_pairing_info *pairing_info)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1138,7 +1143,8 @@ static int
>  hdcp2_prepare_lc_init(struct intel_connector *connector,
>  		      struct hdcp2_lc_init *lc_init)
>  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1164,7 +1170,8 @@ static int
>  hdcp2_verify_lprime(struct intel_connector *connector,
>  		    struct hdcp2_lc_send_lprime *rx_lprime)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1189,7 +1196,8 @@ hdcp2_verify_lprime(struct intel_connector
> *connector,  static int hdcp2_prepare_skey(struct intel_connector *connector,
>  			      struct hdcp2_ske_send_eks *ske_data)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1217,7 +1225,8 @@ hdcp2_verify_rep_topology_prepare_ack(struct
> intel_connector *connector,
>  								*rep_topology,
>  				      struct hdcp2_rep_send_ack *rep_send_ack)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1245,7 +1254,8 @@ static int
>  hdcp2_verify_mprime(struct intel_connector *connector,
>  		    struct hdcp2_rep_stream_ready *stream_ready)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1268,7 +1278,8 @@ hdcp2_verify_mprime(struct intel_connector
> *connector,
> 
>  static int hdcp2_authenticate_port(struct intel_connector *connector)  {
> -	struct hdcp_port_data *data = &connector->hdcp.port_data;
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1292,6 +1303,7 @@ static int hdcp2_authenticate_port(struct
> intel_connector *connector)
> 
>  static int hdcp2_close_mei_session(struct intel_connector *connector)  {
> +	struct intel_digital_port *dig_port =
> +intel_attached_dig_port(connector);
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct i915_hdcp_comp_master *comp;
>  	int ret;
> @@ -1305,7 +1317,7 @@ static int hdcp2_close_mei_session(struct
> intel_connector *connector)
>  	}
> 
>  	ret = comp->ops->close_hdcp_session(comp->mei_dev,
> -					     &connector->hdcp.port_data);
> +					     &dig_port->port_data);
>  	mutex_unlock(&dev_priv->hdcp_comp_mutex);
> 
>  	return ret;
> @@ -1498,8 +1510,9 @@ int
> _hdcp2_propagate_stream_management_info(struct intel_connector
> *connector)
>  	if (ret < 0)
>  		goto out;
> 
> -	hdcp->port_data.seq_num_m = hdcp->seq_num_m;
> -	hdcp->port_data.streams[0].stream_type = hdcp->content_type;
> +	dig_port->port_data.seq_num_m = hdcp->seq_num_m;
> +	dig_port->port_data.streams[0].stream_type = hdcp->content_type;
> +
>  	ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
> 
>  out:
> @@ -1731,7 +1744,9 @@ hdcp2_propagate_stream_management_info(struct
> intel_connector *connector)
> 
>  static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)  {
> +	struct intel_digital_port *dig_port =
> +intel_attached_dig_port(connector);
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct intel_hdcp *hdcp = &connector->hdcp;
>  	int ret, i, tries = 3;
> 
> @@ -1745,8 +1760,7 @@ static int hdcp2_authenticate_and_encrypt(struct
> intel_connector *connector)
>  					    ret);
>  				break;
>  			}
> -			hdcp->port_data.streams[0].stream_type =
> -							hdcp->content_type;
> +			data->streams[0].stream_type = hdcp->content_type;
>  			ret = hdcp2_authenticate_port(connector);
>  			if (!ret)
>  				break;
> @@ -1989,8 +2003,8 @@ static int initialize_hdcp_port_data(struct
> intel_connector *connector,
>  				     const struct intel_hdcp_shim *shim)  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct intel_hdcp *hdcp = &connector->hdcp;
> -	struct hdcp_port_data *data = &hdcp->port_data;
>  	enum port port = dig_port->base.port;
> 
>  	if (INTEL_GEN(dev_priv) < 12)
> @@ -2012,16 +2026,15 @@ static int initialize_hdcp_port_data(struct
> intel_connector *connector,
>  	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
>  	data->protocol = (u8)shim->protocol;
> 
> -	data->k = 1;
>  	if (!data->streams)
> -		data->streams = kcalloc(data->k,
> +		data->streams = kcalloc(INTEL_NUM_PIPES(dev_priv),
>  					sizeof(struct hdcp2_streamid_type),
>  					GFP_KERNEL);
>  	if (!data->streams) {
>  		drm_err(&dev_priv->drm, "Out of Memory\n");
>  		return -ENOMEM;
>  	}
> -
> +	/* For SST */
>  	data->streams[0].stream_id = 0;
>  	data->streams[0].stream_type = hdcp->content_type;
> 
> @@ -2100,7 +2113,7 @@ int intel_hdcp_init(struct intel_connector *connector,
>  							 hdcp-
> >hdcp2_supported);
>  	if (ret) {
>  		hdcp->hdcp2_supported = false;
> -		kfree(hdcp->port_data.streams);
> +		kfree(dig_port->port_data.streams);
>  		return ret;
>  	}
> 
> @@ -2140,7 +2153,7 @@ int intel_hdcp_enable(struct intel_connector
> *connector,
>  	}
> 
>  	if (INTEL_GEN(dev_priv) >= 12)
> -		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(hdcp-
> >cpu_transcoder);
> +		dig_port->port_data.fw_tc =
> +intel_get_mei_fw_tc(hdcp->cpu_transcoder);
> 
>  	/*
>  	 * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
> @@ -2307,7 +2320,6 @@ void intel_hdcp_cleanup(struct intel_connector
> *connector)
>  	drm_WARN_ON(connector->base.dev, work_pending(&hdcp-
> >prop_work));
> 
>  	mutex_lock(&hdcp->mutex);
> -	kfree(hdcp->port_data.streams);
>  	hdcp->shim = NULL;
>  	mutex_unlock(&hdcp->mutex);
>  }
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Winkler, Tomas <tomas.winkler@intel.com>
> Subject: [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer
> len
> 
> Fix the size of WIRED_REPEATER_AUTH_STREAM_REQ cmd buffer size.
> It is based upon the actual number of MST streams and size of
> wired_cmd_repeater_auth_stream_req_in.
> Excluding the size of hdcp_cmd_header.
> 
> v2:
> hdcp_cmd_header size annotation nitpick. [Tomas]

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Tomas Winkler <tomas.winkler@intel.com>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Tomas Winkler <tomas.winkler@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/misc/mei/hdcp/mei_hdcp.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c
> b/drivers/misc/mei/hdcp/mei_hdcp.c
> index 9ae9669e46ea..3506a3534294 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> @@ -569,8 +569,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
>  	verify_mprime_in->header.api_version = HDCP_API_VERSION;
>  	verify_mprime_in->header.command_id =
> WIRED_REPEATER_AUTH_STREAM_REQ;
>  	verify_mprime_in->header.status = ME_HDCP_STATUS_SUCCESS;
> -	verify_mprime_in->header.buffer_len =
> -
> 	WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
> +	verify_mprime_in->header.buffer_len = cmd_size  -
> +sizeof(verify_mprime_in->header);
> 
>  	verify_mprime_in->port.integrated_port_type = data->port_type;
>  	verify_mprime_in->port.physical_port = (u8)data->fw_ddi;
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len

[Winkler, Tomas]

> 
> 
> 
> > -----Original Message-----
> > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> > Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> > <anshuman.gupta@intel.com>; Winkler, Tomas <tomas.winkler@intel.com>
> > Subject: [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd
> > buffer len
> >
> > Fix the size of WIRED_REPEATER_AUTH_STREAM_REQ cmd buffer size.
> > It is based upon the actual number of MST streams and size of
> > wired_cmd_repeater_auth_stream_req_in.
> > Excluding the size of hdcp_cmd_header.
> >
> > v2:
> > hdcp_cmd_header size annotation nitpick. [Tomas]
> 
> Looks Good to me.
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Acked-by: Tomas Winkler <tomas.winkler@intel.com>

> 
> > Cc: Tomas Winkler <tomas.winkler@intel.com>
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Acked-by: Tomas Winkler <tomas.winkler@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/misc/mei/hdcp/mei_hdcp.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c
> > b/drivers/misc/mei/hdcp/mei_hdcp.c
> > index 9ae9669e46ea..3506a3534294 100644
> > --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> > +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> > @@ -569,8 +569,7 @@ static int mei_hdcp_verify_mprime(struct device
> *dev,
> >  	verify_mprime_in->header.api_version = HDCP_API_VERSION;
> >  	verify_mprime_in->header.command_id =
> > WIRED_REPEATER_AUTH_STREAM_REQ;
> >  	verify_mprime_in->header.status = ME_HDCP_STATUS_SUCCESS;
> > -	verify_mprime_in->header.buffer_len =
> > -
> > 	WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
> > +	verify_mprime_in->header.buffer_len = cmd_size  -
> > +sizeof(verify_mprime_in->header);
> >
> >  	verify_mprime_in->port.integrated_port_type = data->port_type;
> >  	verify_mprime_in->port.physical_port = (u8)data->fw_ddi;
> > --
> > 2.26.2

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Re: [Intel-gfx] [PATCH v3 11/16] drm/hdcp: Max MST content streams

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Maarten Lankhorst
> <maarten.lankhorst@linux.intel.com>
> Subject: [PATCH v3 11/16] drm/hdcp: Max MST content streams
> 
> Let's define Maximum MST content streams up to four generically which can be
> supported by modern display controllers.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  include/drm/drm_hdcp.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index
> fe58dbb46962..ac22c246542a 100644
> --- a/include/drm/drm_hdcp.h
> +++ b/include/drm/drm_hdcp.h
> @@ -101,11 +101,11 @@
> 
>  /* Following Macros take a byte at a time for bit(s) masking */
>  /*
> - * TODO: This has to be changed for DP MST, as multiple stream on
> - * same port is possible.
> - * For HDCP2.2 on HDMI and DP SST this value is always 1.
> + * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
> + * H/W MST streams capacity.
> + * This required to be moved out to platform specific header.
>   */
> -#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	1
> +#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	4
>  #define HDCP_2_2_TXCAP_MASK_LEN			2
>  #define HDCP_2_2_RXCAPS_LEN			3
>  #define HDCP_2_2_RX_REPEATER(x)			((x) & BIT(0))
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 12/16] drm/i915/hdcp: MST streams support in hdcp port_data

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 12/16] drm/i915/hdcp: MST streams support in hdcp
> port_data
> 
> Add support for multiple mst stream in hdcp port data which will be used by
> RepeaterAuthStreamManage msg and HDCP 2.2 security f/w for m' validation.
> 
> v2:
> Init the hdcp port data k for HDMI/DP SST strem.

Nit: Typo in stream.

> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  .../drm/i915/display/intel_display_types.h    |   4 +-
>  drivers/gpu/drm/i915/display/intel_hdcp.c     | 103 +++++++++++++++---
>  2 files changed, 93 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 749c3a7e0b45..24e0067c2e7c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1445,10 +1445,12 @@ struct intel_digital_port {
>  	enum phy_fia tc_phy_fia;
>  	u8 tc_phy_fia_idx;
> 
> -	/* protects num_hdcp_streams reference count, port_data */
> +	/* protects num_hdcp_streams reference count, port_data and
> port_auth
> +*/
>  	struct mutex hdcp_mutex;
>  	/* the number of pipes using HDCP signalling out of this port */
>  	unsigned int num_hdcp_streams;
> +	/* port HDCP auth status */
> +	bool port_auth;
>  	/* HDCP port data need to pass to security f/w */
>  	struct hdcp_port_data port_data;
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 207fa17129ae..41c6892d959a 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -26,6 +26,64 @@
>  #define KEY_LOAD_TRIES	5
>  #define HDCP2_LC_RETRY_CNT			3
> 
> +static int intel_conn_to_vcpi(struct intel_connector *connector) {
> +	/* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */
> +	return connector->port	? connector->port->vcpi.vcpi : 0;
> +}
> +
> +static int
> +intel_hdcp_required_content_stream(struct intel_digital_port *dig_port)
> +{
> +	struct drm_connector_list_iter conn_iter;
> +	struct intel_digital_port *conn_dig_port;
> +	struct intel_connector *connector;
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct hdcp_port_data *data = &dig_port->port_data;
> +	bool enforce_type0 = false;
> +	int k;
> +
> +	if (dig_port->port_auth)
> +		return 0;
> +
> +	drm_connector_list_iter_begin(&i915->drm, &conn_iter);
> +	for_each_intel_connector_iter(connector, &conn_iter) {
> +		if (!intel_encoder_is_mst(intel_attached_encoder(connector)))
> +			continue;
> +
> +		conn_dig_port = intel_attached_dig_port(connector);
> +		if (conn_dig_port != dig_port)
> +			continue;
> +
> +		if (connector->base.status == connector_status_disconnected)
> +			continue;
> +
> +		if (!enforce_type0 && !intel_hdcp2_capable(connector))
> +			enforce_type0 = true;
> +
> +		data->streams[data->k].stream_id =
> intel_conn_to_vcpi(connector);
> +		data->k++;
> +
> +		/* if there is only one active stream */
> +		if (dig_port->dp.active_mst_links <= 1)
> +			break;
> +	}
> +	drm_connector_list_iter_end(&conn_iter);
> +
> +	if (drm_WARN_ON(&i915->drm, data->k > INTEL_NUM_PIPES(i915) ||
> data->k == 0))
> +		return -EINVAL;
> +
> +	/*
> +	 * Apply common protection level across all streams in DP MST Topology.
> +	 * Use highest supported content type for all streams in DP MST
> Topology.
> +	 */
> +	for (k = 0; k < data->k; k++)
> +		data->streams[k].stream_type =
> +			enforce_type0 ? DRM_MODE_HDCP_CONTENT_TYPE0 :
> +DRM_MODE_HDCP_CONTENT_TYPE1;
> +
> +	return 0;
> +}
> +
>  static
>  bool intel_hdcp_is_ksv_valid(u8 *ksv)
>  {
> @@ -1296,6 +1354,7 @@ static int hdcp2_authenticate_port(struct
> intel_connector *connector)
>  	if (ret < 0)
>  		drm_dbg_kms(&dev_priv->drm, "Enable hdcp auth failed. %d\n",
>  			    ret);
> +

Unrelated change.

>  	mutex_unlock(&dev_priv->hdcp_comp_mutex);
> 
>  	return ret;
> @@ -1477,13 +1536,14 @@ static
>  int _hdcp2_propagate_stream_management_info(struct intel_connector
> *connector)  {
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct intel_hdcp *hdcp = &connector->hdcp;
>  	union {
>  		struct hdcp2_rep_stream_manage stream_manage;
>  		struct hdcp2_rep_stream_ready stream_ready;
>  	} msgs;
>  	const struct intel_hdcp_shim *shim = hdcp->shim;
> -	int ret;
> +	int ret, streams_size_delta, i;
> 
>  	if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX)
>  		return -ERANGE;
> @@ -1493,15 +1553,18 @@ int
> _hdcp2_propagate_stream_management_info(struct intel_connector
> *connector)
>  	drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp-
> >seq_num_m);
> 
>  	/* K no of streams is fixed as 1. Stored as big-endian. */

Drop this message.

> -	msgs.stream_manage.k = cpu_to_be16(1);
> +	msgs.stream_manage.k = cpu_to_be16(data->k);
> 
> -	/* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */
> -	msgs.stream_manage.streams[0].stream_id = 0;
> -	msgs.stream_manage.streams[0].stream_type = hdcp->content_type;
> +	for (i = 0; i < data->k; i++) {
> +		msgs.stream_manage.streams[i].stream_id = data-
> >streams[i].stream_id;
> +		msgs.stream_manage.streams[i].stream_type = data-
> >streams[i].stream_type;
> +	}
> 
> +	streams_size_delta = HDCP_2_2_MAX_CONTENT_STREAMS_CNT *
> +		sizeof(struct hdcp2_streamid_type) - data->k * sizeof(struct
> +hdcp2_streamid_type);

Just make it, 
(HDCP_2_2_MAX_CONTENT_STREAMS_CNT - data->k) * sizeof(struct hdcp2_streamid_type)

>  	/* Send it to Repeater */
>  	ret = shim->write_2_2_msg(dig_port, &msgs.stream_manage,
> -				  sizeof(msgs.stream_manage));
> +				  sizeof(msgs.stream_manage) -
> streams_size_delta);
>  	if (ret < 0)
>  		goto out;
> 
> @@ -1510,8 +1573,7 @@ int
> _hdcp2_propagate_stream_management_info(struct intel_connector
> *connector)
>  	if (ret < 0)
>  		goto out;
> 
> -	dig_port->port_data.seq_num_m = hdcp->seq_num_m;
> -	dig_port->port_data.streams[0].stream_type = hdcp->content_type;
> +	data->seq_num_m = hdcp->seq_num_m;
> 
>  	ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
> 
> @@ -1672,6 +1734,7 @@ static int hdcp2_enable_encryption(struct
> intel_connector *connector)
>  						 port),
>  				    LINK_ENCRYPTION_STATUS,
> 
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> +	dig_port->port_auth = true;
> 
>  	return ret;
>  }
> @@ -1746,11 +1809,9 @@ static int hdcp2_authenticate_and_encrypt(struct
> intel_connector *connector)  {
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
> -	struct hdcp_port_data *data = &dig_port->port_data;
> -	struct intel_hdcp *hdcp = &connector->hdcp;
> -	int ret, i, tries = 3;
> +	int ret = 0, i, tries = 3;
> 
> -	for (i = 0; i < tries; i++) {
> +	for (i = 0; i < tries && !dig_port->port_auth; i++) {
>  		ret = hdcp2_authenticate_sink(connector);
>  		if (!ret) {
>  			ret =
> hdcp2_propagate_stream_management_info(connector);
> @@ -1760,7 +1821,7 @@ static int hdcp2_authenticate_and_encrypt(struct
> intel_connector *connector)
>  					    ret);
>  				break;
>  			}
> -			data->streams[0].stream_type = hdcp->content_type;
> +
>  			ret = hdcp2_authenticate_port(connector);
>  			if (!ret)
>  				break;
> @@ -1795,7 +1856,9 @@ static int hdcp2_authenticate_and_encrypt(struct
> intel_connector *connector)
> 
>  static int _intel_hdcp2_enable(struct intel_connector *connector)  {
> +	struct intel_digital_port *dig_port =
> +intel_attached_dig_port(connector);
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	struct intel_hdcp *hdcp = &connector->hdcp;
>  	int ret;
> 
> @@ -1803,6 +1866,16 @@ static int _intel_hdcp2_enable(struct intel_connector
> *connector)
>  		    connector->base.name, connector->base.base.id,
>  		    hdcp->content_type);
> 
> +	/* Stream which requires encryption */
> +	if (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
> +		data->k = 1;
> +		data->streams[0].stream_type = hdcp->content_type;
> +	} else {
> +		ret = intel_hdcp_required_content_stream(dig_port);
> +		if (ret)
> +			return ret;
> +	}
> +
>  	ret = hdcp2_authenticate_and_encrypt(connector);
>  	if (ret) {
>  		drm_dbg_kms(&i915->drm, "HDCP2 Type%d  Enabling Failed.
> (%d)\n", @@ -1820,7 +1893,9 @@ static int _intel_hdcp2_enable(struct
> intel_connector *connector)
> 
>  static int _intel_hdcp2_disable(struct intel_connector *connector)  {
> +	struct intel_digital_port *dig_port =
> +intel_attached_dig_port(connector);
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +	struct hdcp_port_data *data = &dig_port->port_data;
>  	int ret;
> 
>  	drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n", @@ -
> 1832,6 +1907,8 @@ static int _intel_hdcp2_disable(struct intel_connector
> *connector)
>  		drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
> 
>  	connector->hdcp.hdcp2_encrypted = false;
> +	dig_port->port_auth = false;
> +	data->k = 0;
> 
>  	return ret;
>  }
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 13/16] drm/i915/hdcp: Pass connector to check_2_2_link

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 13/16] drm/i915/hdcp: Pass connector to check_2_2_link
> 
> This requires for HDCP 2.2 MST check link.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++-
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c       | 3 ++-
>  drivers/gpu/drm/i915/display/intel_hdcp.c          | 2 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.c          | 3 ++-
>  4 files changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 24e0067c2e7c..dfb5be64e03a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -375,7 +375,8 @@ struct intel_hdcp_shim {
>  				  bool is_repeater, u8 type);
> 
>  	/* HDCP2.2 Link Integrity Check */
> -	int (*check_2_2_link)(struct intel_digital_port *dig_port);
> +	int (*check_2_2_link)(struct intel_digital_port *dig_port,
> +			      struct intel_connector *connector);
>  };
> 
>  struct intel_hdcp {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 384e384cb9e2..a0c62e363c39 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -585,7 +585,8 @@ int intel_dp_hdcp2_config_stream_type(struct
> intel_digital_port *dig_port,  }
> 
>  static
> -int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port)
> +int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port,
> +			      struct intel_connector *connector)
>  {
>  	u8 rx_status;
>  	int ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 41c6892d959a..9dd08e2636e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1945,7 +1945,7 @@ static int intel_hdcp2_check_link(struct
> intel_connector *connector)
>  		goto out;
>  	}
> 
> -	ret = hdcp->shim->check_2_2_link(dig_port);
> +	ret = hdcp->shim->check_2_2_link(dig_port, connector);
>  	if (ret == HDCP_LINK_PROTECTED) {
>  		if (hdcp->value !=
> DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
>  			intel_hdcp_update_value(connector,
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 0788de04711b..bd0d91101464 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1734,7 +1734,8 @@ int intel_hdmi_hdcp2_read_msg(struct
> intel_digital_port *dig_port,  }
> 
>  static
> -int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port)
> +int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port,
> +				struct intel_connector *connector)
>  {
>  	u8 rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN];
>  	int ret;
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register
> 
> Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS
> and HDCP2_AUTH_STREAM register in i915_reg header.
> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 86a9a5145e47..cb6ec2c241f2 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9882,6 +9882,7 @@ enum skl_power_gate {
>  					  _PORTD_HDCP2_BASE, \
>  					  _PORTE_HDCP2_BASE, \
>  					  _PORTF_HDCP2_BASE) + (x))
> +
>  #define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
>  #define _TRANSA_HDCP2_AUTH		0x66498
>  #define _TRANSB_HDCP2_AUTH		0x66598
> @@ -9921,6 +9922,35 @@ enum skl_power_gate {
>  					 TRANS_HDCP2_STATUS(trans) : \
>  					 PORT_HDCP2_STATUS(port))
> 
> +#define PORT_HDCP2_STREAM_STATUS(port)		_PORT_HDCP2_BASE(port,
> 0xC0)
> +#define _TRANSA_HDCP2_STREAM_STATUS		0x664C0
> +#define _TRANSB_HDCP2_STREAM_STATUS		0x665C0
> +#define TRANS_HDCP2_STREAM_STATUS(trans)	_MMIO_TRANS(trans, \
> +
> _TRANSA_HDCP2_STREAM_STATUS, \
> +
> _TRANSB_HDCP2_STREAM_STATUS)
> +#define   STREAM_ENCRYPTION_STATUS	BIT(31)
> +#define   STREAM_TYPE_STATUS		BIT(30)
> +#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP2_STREAM_STATUS(trans) :
> \
> +					 PORT_HDCP2_STREAM_STATUS(port))
> +
> +#define _PORTA_HDCP2_AUTH_STREAM		0x66F00
> +#define _PORTB_HDCP2_AUTH_STREAM		0x66F04
> +#define PORT_HDCP2_AUTH_STREAM(port)	_MMIO_PORT(port, \
> +
> _PORTA_HDCP2_AUTH_STREAM, \
> +
> _PORTB_HDCP2_AUTH_STREAM)

Should it also not be defined as the other counterparts for pre Gen12.

> +#define _TRANSA_HDCP2_AUTH_STREAM		0x66F00
> +#define _TRANSB_HDCP2_AUTH_STREAM		0x66F04
> +#define TRANS_HDCP2_AUTH_STREAM(trans)	_MMIO_TRANS(trans, \
> +
> _TRANSA_HDCP2_AUTH_STREAM, \
> +
> _TRANSB_HDCP2_AUTH_STREAM)
> +#define   AUTH_STREAM_TYPE		BIT(31)
> +#define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP2_AUTH_STREAM(trans) : \
> +					 PORT_HDCP2_AUTH_STREAM(port))
> +
>  /* Per-pipe DDI Function Control */
>  #define _TRANS_DDI_FUNC_CTL_A		0x60400
>  #define _TRANS_DDI_FUNC_CTL_B		0x61400
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim
> callbacks
> 
> Add support for HDCP 2.2 DP MST shim callback.
> This adds existing DP HDCP shim callback for Link Authentication and Encryption
> and HDCP 2.2 stream encryption callback.
> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  .../drm/i915/display/intel_display_types.h    |  4 +
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 81 +++++++++++++++++--
>  2 files changed, 77 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index dfb5be64e03a..4cbb151ff3cf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -374,6 +374,10 @@ struct intel_hdcp_shim {
>  	int (*config_stream_type)(struct intel_digital_port *dig_port,
>  				  bool is_repeater, u8 type);
> 
> +	/* Enable/Disable HDCP 2.2 stream encryption on DP MST Transport Link
> */
> +	int (*stream_2_2_encryption)(struct intel_digital_port *dig_port,
> +				     bool enable);
> +
>  	/* HDCP2.2 Link Integrity Check */
>  	int (*check_2_2_link)(struct intel_digital_port *dig_port,
>  			      struct intel_connector *connector); diff --git
> a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index a0c62e363c39..d57ece74c300 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -698,18 +698,14 @@ intel_dp_mst_hdcp_strem_encryption(struct
> intel_digital_port *dig_port,
>  	return 0;
>  }
> 
> -static
> -bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
> -				  struct intel_connector *connector)
> +static bool intel_dp_mst_get_qses_status(struct intel_digital_port *dig_port,
> +					 struct intel_connector *connector)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	struct intel_dp *intel_dp = &dig_port->dp;
>  	struct drm_dp_query_stream_enc_status_ack_reply reply;
> +	struct intel_dp *intel_dp = &dig_port->dp;
>  	int ret;
> 
> -	if (!intel_dp_hdcp_check_link(dig_port, connector))
> -		return false;
> -
>  	ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr,
>  						  connector->port, &reply);
>  	if (ret) {
> @@ -722,6 +718,70 @@ bool intel_dp_mst_hdcp_check_link(struct
> intel_digital_port *dig_port,
>  	return reply.auth_completed && reply.encryption_enabled;  }
> 
> +static
> +bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
> +				  struct intel_connector *connector) {
> +	if (!intel_dp_hdcp_check_link(dig_port, connector))
> +		return false;
> +
> +	return intel_dp_mst_get_qses_status(dig_port, connector); }
> +
> +static int
> +intel_dp_mst_hdcp2_strem_encryption(struct intel_digital_port *dig_port,
> +				    bool enable)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct hdcp_port_data *data = &dig_port->port_data;
> +	struct intel_dp *dp = &dig_port->dp;
> +	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
> +	enum port port = dig_port->base.port;
> +	/* HDCP2.x register uses stream transcoder */
> +	enum transcoder cpu_transcoder = hdcp->stream_transcoder;
> +	int ret;
> +
> +	if (enable && !!(intel_de_read(i915, HDCP2_AUTH_STREAM(i915,
> cpu_transcoder, port)) &
> +	    AUTH_STREAM_TYPE) != data->streams[0].stream_type) {
> +		drm_err(&i915->drm, "Seurity f/w didn't set correct auth
> strem_type\n");.

Typo in stream. Also, Lets add a WARN here.

> +	}
> +
> +	ret = intel_dp_mst_toggle_select_hdcp_stream(dig_port, enable);
> +	if (ret)
> +		return ret;
> +
> +	/* Wait for encryption confirmation */
> +	if (intel_de_wait_for_register(i915,
> +				       HDCP2_STREAM_STATUS(i915,
> cpu_transcoder, port),
> +				       STREAM_ENCRYPTION_STATUS,
> +				       enable ? STREAM_ENCRYPTION_STATUS : 0,
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
> +		drm_err(&i915->drm, "Timed out waiting for stream encryption
> %s\n",
> +			enable ? "enabled" : "disabled");
> +		return -ETIMEDOUT;
> +	}
> +
> +	return 0;
> +}
> +
> +/*
> + * DP v2.0 I.3.3 ignore the stream signature L' is QSES reply msg reply.

s/is/in

> + * I.3.5 MST source device may use a QSES msg to query downstream
> +status
> + * for a particular stream.
> + */
> +static
> +int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
> +				  struct intel_connector *connector) {
> +	int ret;
> +
> +	ret = intel_dp_hdcp2_check_link(dig_port, connector);
> +	if (ret)
> +		return ret;
> +
> +	return intel_dp_mst_get_qses_status(dig_port, connector) ? 0 :
> +-EINVAL; }
> +
>  static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
>  	.write_an_aksv = intel_dp_hdcp_write_an_aksv,
>  	.read_bksv = intel_dp_hdcp_read_bksv,
> @@ -735,7 +795,12 @@ static const struct intel_hdcp_shim
> intel_dp_mst_hdcp_shim = {
>  	.stream_encryption = intel_dp_mst_hdcp_strem_encryption,
>  	.check_link = intel_dp_mst_hdcp_check_link,
>  	.hdcp_capable = intel_dp_hdcp_capable,
> -
> +	.write_2_2_msg = intel_dp_hdcp2_write_msg,
> +	.read_2_2_msg = intel_dp_hdcp2_read_msg,
> +	.config_stream_type = intel_dp_hdcp2_config_stream_type,
> +	.stream_2_2_encryption = intel_dp_mst_hdcp2_strem_encryption,

Typo in stream.

> +	.check_2_2_link = intel_dp_mst_hdcp2_check_link,
> +	.hdcp_2_2_capable = intel_dp_hdcp2_capable,
>  	.protocol = HDCP_PROTOCOL_DP,
>  };
> 
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support
> 
> Enable HDCP 2.2 over DP MST.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++++++++++-
>  1 file changed, 44 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 9dd08e2636e9..621c1a94c5ad 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1698,6 +1698,32 @@ static int hdcp2_authenticate_sink(struct
> intel_connector *connector)
>  	return ret;
>  }
> 
> +static int hdcp2_enable_stream_encryption(struct intel_connector
> +*connector) {
> +	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> +	struct intel_hdcp *hdcp = &connector->hdcp;
> +	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
> +	enum port port = dig_port->base.port;
> +	int ret = 0;
> +
> +	if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder,
> port)) &
> +			    LINK_ENCRYPTION_STATUS)) {
> +		drm_err(&dev_priv->drm, "HDCP 2.2 Link is not encrypted\n");
> +		return -EPERM;
> +	}
> +
> +	if (hdcp->shim->stream_2_2_encryption) {
> +		ret = hdcp->shim->stream_2_2_encryption(dig_port, true);
> +		if (ret) {
> +			drm_err(&dev_priv->drm, "Failed to enable HDCP 2.2
> stream enc\n");
> +			return ret;
> +		}
> +	}
> +
> +	return ret;
> +}
> +
>  static int hdcp2_enable_encryption(struct intel_connector *connector)  {
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> @@ -1836,7 +1862,7 @@ static int hdcp2_authenticate_and_encrypt(struct
> intel_connector *connector)
>  			drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
>  	}
> 
> -	if (!ret) {
> +	if (!ret && !dig_port->port_auth) {
>  		/*
>  		 * Ensuring the required 200mSec min time interval between
>  		 * Session Key Exchange and encryption.
> @@ -1851,6 +1877,8 @@ static int hdcp2_authenticate_and_encrypt(struct
> intel_connector *connector)
>  		}
>  	}
> 
> +	ret = hdcp2_enable_stream_encryption(connector);
> +
>  	return ret;
>  }
> 
> @@ -1896,11 +1924,23 @@ static int _intel_hdcp2_disable(struct
> intel_connector *connector)
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct hdcp_port_data *data = &dig_port->port_data;
> +	struct intel_hdcp *hdcp = &connector->hdcp;
>  	int ret;
> 
>  	drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n",
>  		    connector->base.name, connector->base.base.id);
> 
> +	if (hdcp->shim->stream_2_2_encryption) {
> +		ret = hdcp->shim->stream_2_2_encryption(dig_port, false);
> +		if (ret) {
> +			drm_err(&i915->drm, "Failed to disable HDCP 2.2 stream
> enc\n");
> +			return ret;
> +		}
> +	}
> +
> +	if (dig_port->num_hdcp_streams > 0)
> +		return ret;
> +
>  	ret = hdcp2_disable_encryption(connector);
> 
>  	if (hdcp2_deauthenticate_port(connector) < 0) @@ -1924,6 +1964,7 @@
> static int intel_hdcp2_check_link(struct intel_connector *connector)
>  	int ret = 0;
> 
>  	mutex_lock(&hdcp->mutex);
> +	mutex_lock(&dig_port->hdcp_mutex);
>  	cpu_transcoder = hdcp->cpu_transcoder;
> 
>  	/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */ @@ -
> 2001,6 +2042,7 @@ static int intel_hdcp2_check_link(struct intel_connector
> *connector)
>  	}
> 
>  out:
> +	mutex_unlock(&dig_port->hdcp_mutex);
>  	mutex_unlock(&hdcp->mutex);
>  	return ret;
>  }
> @@ -2182,7 +2224,7 @@ int intel_hdcp_init(struct intel_connector *connector,
>  	if (!shim)
>  		return -EINVAL;
> 
> -	if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
> +	if (is_hdcp2_supported(dev_priv))
>  		intel_hdcp2_init(connector, dig_port, shim);
> 
>  	ret =
> --
> 2.26.2

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Re: [Intel-gfx] [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support

[Anshuman Gupta]

On 2020-10-27 at 11:50:13 +0530, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> > Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> > <anshuman.gupta@intel.com>
> > Subject: [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support
> > 
> > Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit in
> > TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP encryption over
> > DP MST Transport Link.
> > 
> > HDCP 1.4 stream encryption requires to validate the stream encryption status in
> > HDCP_STATUS_{TRANSCODER,PORT} register driving that link in order to
> > enable/disable the stream encryption.
> > 
> > Both of above requirement are same for all Gen with respect to B.Spec
> > Documentation.
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c      | 10 +--
> >  drivers/gpu/drm/i915/display/intel_ddi.h      |  6 +-
> >  .../drm/i915/display/intel_display_types.h    |  4 +
> >  drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ++++++++++++++++---
> >  drivers/gpu/drm/i915/display/intel_hdmi.c     | 14 ++--
> >  drivers/gpu/drm/i915/i915_reg.h               |  1 +
> >  6 files changed, 90 insertions(+), 25 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index bf8730267cfd..fbeffdfd1a0d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct
> > intel_crtc_state *crtc_state
> >  	}
> >  }
> > 
> > -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> > -				     enum transcoder cpu_transcoder,
> > -				     bool enable)
> > +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> > +			       enum transcoder cpu_transcoder,
> > +			       bool enable, u32 hdcp_mask)
> >  {
> >  	struct drm_device *dev = intel_encoder->base.dev;
> >  	struct drm_i915_private *dev_priv = to_i915(dev); @@ -1965,9 +1965,9
> > @@ int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> > 
> >  	tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> >  	if (enable)
> > -		tmp |= TRANS_DDI_HDCP_SIGNALLING;
> > +		tmp |= hdcp_mask;
> >  	else
> > -		tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
> > +		tmp &= ~hdcp_mask;
> >  	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
> >  	intel_display_power_put(dev_priv, intel_encoder->power_domain,
> > wakeref);
> >  	return ret;
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
> > b/drivers/gpu/drm/i915/display/intel_ddi.h
> > index dcc711cfe4fe..a4dd815c0000 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> > @@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
> >  		      const struct intel_crtc_state *crtc_state);
> >  u32 ddi_signal_levels(struct intel_dp *intel_dp,
> >  		      const struct intel_crtc_state *crtc_state); -int
> > intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> > -				     enum transcoder cpu_transcoder,
> > -				     bool enable);
> > +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> > +			       enum transcoder cpu_transcoder,
> > +			       bool enable, u32 hdcp_mask);
> >  void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
> > 
> >  #endif /* __INTEL_DDI_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index c47124a679b6..59b8fc21e3e8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -339,6 +339,10 @@ struct intel_hdcp_shim {
> >  				 enum transcoder cpu_transcoder,
> >  				 bool enable);
> > 
> > +	/* Enable/Disable stream encryption on DP MST Transport Link */
> > +	int (*stream_encryption)(struct intel_digital_port *dig_port,
> > +				 bool enable);
> > +
> >  	/* Ensures the link is still protected */
> >  	bool (*check_link)(struct intel_digital_port *dig_port,
> >  			   struct intel_connector *connector); diff --git
> > a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > index 03424d20e9f7..652d4645f255 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > @@ -16,6 +16,30 @@
> >  #include "intel_dp.h"
> >  #include "intel_hdcp.h"
> > 
> > +static unsigned int transcoder_to_stream_enc_status(enum transcoder
> > +cpu_transcoder) {
> > +	u32 stream_enc_mask;
> > +
> > +	switch (cpu_transcoder) {
> > +	case TRANSCODER_A:
> > +		stream_enc_mask = HDCP_STATUS_STREAM_A_ENC;
> > +		break;
> > +	case TRANSCODER_B:
> > +		stream_enc_mask = HDCP_STATUS_STREAM_B_ENC;
> > +		break;
> > +	case TRANSCODER_C:
> > +		stream_enc_mask = HDCP_STATUS_STREAM_C_ENC;
> > +		break;
> > +	case TRANSCODER_D:
> > +		stream_enc_mask = HDCP_STATUS_STREAM_D_ENC;
> > +		break;
> > +	default:
> > +		stream_enc_mask = 0;
> > +	}
> > +
> > +	return stream_enc_mask;
> > +}
> > +
> >  static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)
> > {
> >  	long ret;
> > @@ -622,24 +646,57 @@ static const struct intel_hdcp_shim
> > intel_dp_hdcp_shim = {  };
> > 
> >  static int
> > -intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
> > -				    enum transcoder cpu_transcoder,
> > -				    bool enable)
> > +intel_dp_mst_toggle_select_hdcp_stream(struct intel_digital_port *dig_port,
> > +				       bool enable)
> 
> I feel ....toggle_hdcp_stream_select will look better.
> 
> >  {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +	struct intel_dp *dp = &dig_port->dp;
> > +	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
> >  	int ret;
> > 
> > -	if (!enable)
> > -		usleep_range(6, 60); /* Bspec says >= 6us */
> 
> Should we not keep this delay.
Thanks for comment.
As per B.Spec:49289 this delay only requires for HDMI/DVI panel while toggling HDCP signalling.
I will fix other comments on this patch.
Thanks,
Anshuman.
> 
> > -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base,
> > -					       cpu_transcoder, enable);
> > +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base,
> > +					 hdcp->stream_transcoder, enable,
> > +					 TRANS_DDI_HDCP_SELECT);
> >  	if (ret)
> > -		drm_dbg_kms(&i915->drm, "%s HDCP signalling failed (%d)\n",
> > -			      enable ? "Enable" : "Disable", ret);
> > +		drm_err(&i915->drm, "%s Multistream HDCP select failed
> 
> This print doesn't sound good, refine it.
> 
> > (%d)\n",
> > +			enable ? "Enable" : "Disable", ret);
> >  	return ret;
> >  }
> > 
> > +static int
> > +intel_dp_mst_hdcp_strem_encryption(struct intel_digital_port *dig_port,
> > +				   bool enable)
> > +{
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +	struct intel_dp *dp = &dig_port->dp;
> > +	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
> > +	enum port port = dig_port->base.port;
> > +	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
> > +	u32 stream_enc_status;
> > +	int ret;
> > +
> > +	ret = intel_dp_mst_toggle_select_hdcp_stream(dig_port, enable);
> > +	if (ret)
> > +		return ret;
> > +
> > +	stream_enc_status =  transcoder_to_stream_enc_status(hdcp-
> > >stream_transcoder);
> > +	if (!stream_enc_status)
> > +		return -EINVAL;
> > +
> > +	/* Wait for encryption confirmation */
> > +	if (intel_de_wait_for_register(i915,
> > +				       HDCP_STATUS(i915, cpu_transcoder, port),
> > +				       stream_enc_status,
> > +				       enable ? stream_enc_status : 0,
> > +
> > HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
> > +		drm_err(&i915->drm, "Timed out waiting for stream encryption
> > %s\n",
> > +			enable ? "enabled" : "disabled");
> > +		return -ETIMEDOUT;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> >  static
> >  bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
> >  				  struct intel_connector *connector) @@ -673,7
> > +730,8 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
> >  	.read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
> >  	.read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
> >  	.read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
> > -	.toggle_signalling = intel_dp_mst_hdcp_toggle_signalling,
> > +	.toggle_signalling = intel_dp_hdcp_toggle_signalling,
> > +	.stream_encryption = intel_dp_mst_hdcp_strem_encryption,
> 
> Typo in stream.
> 
> >  	.check_link = intel_dp_mst_hdcp_check_link,
> >  	.hdcp_capable = intel_dp_hdcp_capable,
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index f90838bc74fb..f58469226694 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -1495,15 +1495,16 @@ static int kbl_repositioning_enc_en_signal(struct
> > intel_connector *connector,
> >  		usleep_range(25, 50);
> >  	}
> > 
> > -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
> > -					       false);
> > +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base, cpu_transcoder,
> > +					 false, TRANS_DDI_HDCP_SIGNALLING);
> >  	if (ret) {
> >  		drm_err(&dev_priv->drm,
> >  			"Disable HDCP signalling failed (%d)\n", ret);
> >  		return ret;
> >  	}
> > -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
> > -					       true);
> > +
> > +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base, cpu_transcoder,
> > +					 true, TRANS_DDI_HDCP_SIGNALLING);
> >  	if (ret) {
> >  		drm_err(&dev_priv->drm,
> >  			"Enable HDCP signalling failed (%d)\n", ret); @@ -1526,8
> > +1527,9 @@ int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port
> > *dig_port,
> >  	if (!enable)
> >  		usleep_range(6, 60); /* Bspec says >= 6us */
> > 
> > -	ret = intel_ddi_toggle_hdcp_signalling(&dig_port->base, cpu_transcoder,
> > -					       enable);
> > +	ret = intel_ddi_toggle_hdcp_bits(&dig_port->base,
> > +					 cpu_transcoder, enable,
> > +					 TRANS_DDI_HDCP_SIGNALLING);
> >  	if (ret) {
> >  		drm_err(&dev_priv->drm, "%s HDCP signalling failed (%d)\n",
> >  			enable ? "Enable" : "Disable", ret); diff --git
> > a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index
> > d4952c9875fb..86a9a5145e47 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -9970,6 +9970,7 @@ enum skl_power_gate {
> >  #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
> >  #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)  #define
> > TRANS_DDI_HDMI_SCRAMBLER_RESET_FREQ (1 << 6)
> > +#define  TRANS_DDI_HDCP_SELECT		REG_BIT(5)
> >  #define  TRANS_DDI_BFI_ENABLE		(1 << 4)
> >  #define  TRANS_DDI_HIGH_TMDS_CHAR_RATE	(1 << 4)
> >  #define  TRANS_DDI_HDMI_SCRAMBLING	(1 << 0)
> > --
> > 2.26.2
> 
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Re: [Intel-gfx] [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe

[Anshuman Gupta]

On 2020-10-27 at 11:02:26 +0530, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> > Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> > <anshuman.gupta@intel.com>
> > Subject: [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe
> > 
> > When crtc state need_modeset is true it is not necessary it is going to be a real
> > modeset, it can turns to be a update_pipe instead of modeset.
> 
> I believe you refer fastest here. May be make this a bit clear. 
> 
> > This turns content protection property to be DESIRED and hdcp update_pipe left
> > with property to be in DESIRED state but actually hdcp->value was ENABLED.
> > This caught with DP MST setup, when disabling HDCP on a connector sets the crtc
> > state need_modeset to true for all crtc driving the other DP-MST topology
> > connectors.
> 
> This is a bit ambiguous, you can mention it a bit more clearly. In case of DP MST, how this
> affects would help make it clearer.
> 
> > 
> > v2:
> > Fix WARN_ON(connector->base.registration_state ==
> > DRM_CONNECTOR_REGISTERED)
> > 
> > Fixes: 33f9a623bfc6 ("drm/i915/hdcp: Update CP as per the kernel internal
> > state")
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_hdcp.c | 5 +++++
> >  1 file changed, 5 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index b2a4bbcfdcd2..0d9e8d3b5603 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -2221,6 +2221,11 @@ void intel_hdcp_update_pipe(struct
> > intel_atomic_state *state,
> >  		desired_and_not_enabled =
> >  			hdcp->value !=
> > DRM_MODE_CONTENT_PROTECTION_ENABLED;
> >  		mutex_unlock(&hdcp->mutex);
> >
> 
> Please add a comment explaining the rationale here as well.
Sure i will fix all above comment.
> 
> > +		if (!desired_and_not_enabled &&
> > !content_protection_type_changed) {
> > +			drm_connector_get(&connector->base);
> 
> Where are we releasing this ref.
prop worker function releases the connector reference.
Thanks,
Anshuman Gupta.
> 
> > +			schedule_work(&hdcp->prop_work);
> > +		}
> >  	}
> > 
> >  	if (desired_and_not_enabled || content_protection_type_changed)
> > --
> > 2.26.2
> 
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Re: [Intel-gfx] [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support

[Anshuman Gupta]

On 2020-10-27 at 11:59:14 +0530, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> > Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> > <anshuman.gupta@intel.com>
> > Subject: [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST
> > support
> > 
> > Enable HDCP 1.4 over DP MST for Gen12.
> > This also enable the stream encryption support for older generations, which was
> > missing earlier.
> > 
> > v2:
> > - Added debug print for stream encryption.
> > - Disable the hdcp on port after disabling last stream
> >   encryption.
> 
> Don't see port disable here, Am I missing something.
Do u mean disbaling HDCP for a port ?
That is being done when dig_port->num_hdcp_streams are zero,
then it disbale the HDCP for entire port.
My earlier version of this patch was missing below hunk
if (dig_port->num_hdcp_streams > 0)
	return ret;
I will fix the other cosmetics comment on this patch.
Thanks,
Anshuman Gupta.
> 
> > 
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++---
> >  drivers/gpu/drm/i915/display/intel_hdcp.c   | 46 ++++++++++++++-------
> >  2 files changed, 35 insertions(+), 21 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 16865b200062..f00e12fc83e8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -826,13 +826,9 @@ static struct drm_connector
> > *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
> >  	intel_attach_force_audio_property(connector);
> >  	intel_attach_broadcast_rgb_property(connector);
> > 
> > -
> > -	/* TODO: Figure out how to make HDCP work on GEN12+ */
> > -	if (INTEL_GEN(dev_priv) < 12) {
> > -		ret = intel_dp_init_hdcp(dig_port, intel_connector);
> > -		if (ret)
> > -			DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
> > -	}
> > +	ret = intel_dp_init_hdcp(dig_port, intel_connector);
> > +	if (ret)
> > +		drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n");
> > 
> >  	/*
> >  	 * Reuse the prop from the SST connector because we're diff --git
> > a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index 61252d4be3dd..46c9bd588db1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -612,7 +612,12 @@ int intel_hdcp_auth_downstream(struct intel_connector
> > *connector)
> >  	return ret;
> >  }
> > 
> > -/* Implements Part 1 of the HDCP authorization procedure */
> > +/*
> > + * Implements Part 1 of the HDCP authorization procedure.
> > + * Authentication Part 1 steps for Multi-stream DisplayPort.
> > + * Step 1. Auth Part 1 sequence on the driving MST Trasport Link.
> > + * Step 2. Enable encryption for each stream that requires encryption.
> > + */
> >  static int intel_hdcp_auth(struct intel_connector *connector)  {
> >  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> > @@ -766,10 +771,16 @@ static int intel_hdcp_auth(struct intel_connector
> > *connector)
> >  		return -ETIMEDOUT;
> >  	}
> > 
> > -	/*
> > -	 * XXX: If we have MST-connected devices, we need to enable encryption
> > -	 * on those as well.
> > -	 */
> > +	/* DP MST Auth Part 1 Step 2.a and Step 2.b */
> > +	if (shim->stream_encryption) {
> > +		ret = shim->stream_encryption(dig_port, true);
> > +		if (ret) {
> > +			drm_err(&dev_priv->drm, "Failed to enable HDCP 1.4
> > stream enc\n");
> > +			return ret;
> > +		}
> > +		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 tras %s stream
> > encrypted\n",
> > +			    transcoder_name(hdcp->stream_transcoder));
> > +	}
> > 
> >  	if (repeater_present)
> >  		return intel_hdcp_auth_downstream(connector);
> > @@ -790,19 +801,26 @@ static int _intel_hdcp_disable(struct intel_connector
> > *connector)
> > 
> >  	drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
> >  		    connector->base.name, connector->base.base.id);
> > +	/*
> > +	 * Step 1: Deselect HDCP Multiplestream Bit.
> > +	 * Step 2: poll for stream encryption status to be disable.
> > +	 */
> 
> The above comment should be inside the callback, doesn't add value here.
> 
> > +	if (hdcp->shim->stream_encryption) {
> > +		ret = hdcp->shim->stream_encryption(dig_port, false);
> > +		if (ret) {
> > +			drm_err(&dev_priv->drm, "Failed to disable HDCP 1.4
> > stream enc\n");
> > +			return ret;
> > +		}
> > +		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 trans %s stream
> > encryption disabled\n",
> > +			    transcoder_name(hdcp->stream_transcoder));
> > +	}
> > 
> >  	/*
> > -	 * If there are other connectors on this port using HDCP, don't disable
> > -	 * it. Instead, toggle the HDCP signalling off on that particular
> > -	 * connector/pipe and exit.
> > +	 * If there are other connectors on this port using HDCP, don't disable it.
> > +	 * Repeat steps 1-2 for each stream that no longer requires encryption.
> >  	 */
> > -	if (dig_port->num_hdcp_streams > 0) {
> > -		ret = hdcp->shim->toggle_signalling(dig_port,
> > -						    cpu_transcoder, false);
> > -		if (ret)
> > -			DRM_ERROR("Failed to disable HDCP signalling\n");
> > +	if (dig_port->num_hdcp_streams > 0)
> >  		return ret;
> > -	}
> > 
> >  	hdcp->hdcp_encrypted = false;
> >  	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
> > --
> > 2.26.2
> 
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Re: [Intel-gfx] [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register

[Anshuman Gupta]

On 2020-10-27 at 12:41:41 +0530, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> > Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> > <anshuman.gupta@intel.com>
> > Subject: [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register
> > 
> > Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS
> > and HDCP2_AUTH_STREAM register in i915_reg header.
> > 
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 30 ++++++++++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 86a9a5145e47..cb6ec2c241f2 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -9882,6 +9882,7 @@ enum skl_power_gate {
> >  					  _PORTD_HDCP2_BASE, \
> >  					  _PORTE_HDCP2_BASE, \
> >  					  _PORTF_HDCP2_BASE) + (x))
> > +
> >  #define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
> >  #define _TRANSA_HDCP2_AUTH		0x66498
> >  #define _TRANSB_HDCP2_AUTH		0x66598
> > @@ -9921,6 +9922,35 @@ enum skl_power_gate {
> >  					 TRANS_HDCP2_STATUS(trans) : \
> >  					 PORT_HDCP2_STATUS(port))
> > 
> > +#define PORT_HDCP2_STREAM_STATUS(port)		_PORT_HDCP2_BASE(port,
> > 0xC0)
> > +#define _TRANSA_HDCP2_STREAM_STATUS		0x664C0
> > +#define _TRANSB_HDCP2_STREAM_STATUS		0x665C0
> > +#define TRANS_HDCP2_STREAM_STATUS(trans)	_MMIO_TRANS(trans, \
> > +
> > _TRANSA_HDCP2_STREAM_STATUS, \
> > +
> > _TRANSB_HDCP2_STREAM_STATUS)
> > +#define   STREAM_ENCRYPTION_STATUS	BIT(31)
> > +#define   STREAM_TYPE_STATUS		BIT(30)
> > +#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
> > +					(INTEL_GEN(dev_priv) >= 12 ? \
> > +					 TRANS_HDCP2_STREAM_STATUS(trans) :
> > \
> > +					 PORT_HDCP2_STREAM_STATUS(port))
> > +
> > +#define _PORTA_HDCP2_AUTH_STREAM		0x66F00
> > +#define _PORTB_HDCP2_AUTH_STREAM		0x66F04
> > +#define PORT_HDCP2_AUTH_STREAM(port)	_MMIO_PORT(port, \
> > +
> > _PORTA_HDCP2_AUTH_STREAM, \
> > +
> > _PORTB_HDCP2_AUTH_STREAM)
> 
> Should it also not be defined as the other counterparts for pre Gen12.
It has already been defined with Gen12 and Pre Gen12 annotation below
HDCP2_AUTH_STREAM should TRANS_HDCP2_AUTH_STREAM for Gen12 and
PORT_HDCP2_AUTH_STREAM for pre Gen12.
Is it something else u find it is missing ?
Thanks,
Anshuman.
> 
> > +#define _TRANSA_HDCP2_AUTH_STREAM		0x66F00
> > +#define _TRANSB_HDCP2_AUTH_STREAM		0x66F04
> > +#define TRANS_HDCP2_AUTH_STREAM(trans)	_MMIO_TRANS(trans, \
> > +
> > _TRANSA_HDCP2_AUTH_STREAM, \
> > +
> > _TRANSB_HDCP2_AUTH_STREAM)
> > +#define   AUTH_STREAM_TYPE		BIT(31)
> > +#define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
> > +					(INTEL_GEN(dev_priv) >= 12 ? \
> > +					 TRANS_HDCP2_AUTH_STREAM(trans) : \
> > +					 PORT_HDCP2_AUTH_STREAM(port))
> > +
> >  /* Per-pipe DDI Function Control */
> >  #define _TRANS_DDI_FUNC_CTL_A		0x60400
> >  #define _TRANS_DDI_FUNC_CTL_B		0x61400
> > --
> > 2.26.2
> 
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Re: [Intel-gfx] [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register

[Shankar, Uma]

> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Tuesday, October 27, 2020 2:27 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C, Ramalingam
> <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>
> Subject: Re: [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register
> 
> On 2020-10-27 at 12:41:41 +0530, Shankar, Uma wrote:
> >
> >
> > > -----Original Message-----
> > > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > > Sent: Friday, October 23, 2020 5:51 PM
> > > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > > Ramalingam <ramalingam.c@intel.com>; Li, Juston
> > > <juston.li@intel.com>; Shankar, Uma <uma.shankar@intel.com>; Gupta,
> > > Anshuman <anshuman.gupta@intel.com>
> > > Subject: [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream
> > > register
> > >
> > > Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS and HDCP2_AUTH_STREAM
> > > register in i915_reg header.
> > >
> > > Cc: Ramalingam C <ramalingam.c@intel.com>
> > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/i915_reg.h | 30 ++++++++++++++++++++++++++++++
> > >  1 file changed, 30 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h index 86a9a5145e47..cb6ec2c241f2
> > > 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -9882,6 +9882,7 @@ enum skl_power_gate {
> > >  					  _PORTD_HDCP2_BASE, \
> > >  					  _PORTE_HDCP2_BASE, \
> > >  					  _PORTF_HDCP2_BASE) + (x))
> > > +
> > >  #define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
> > >  #define _TRANSA_HDCP2_AUTH		0x66498
> > >  #define _TRANSB_HDCP2_AUTH		0x66598
> > > @@ -9921,6 +9922,35 @@ enum skl_power_gate {
> > >  					 TRANS_HDCP2_STATUS(trans) : \
> > >  					 PORT_HDCP2_STATUS(port))
> > >
> > > +#define PORT_HDCP2_STREAM_STATUS(port)
> 	_PORT_HDCP2_BASE(port,
> > > 0xC0)
> > > +#define _TRANSA_HDCP2_STREAM_STATUS		0x664C0
> > > +#define _TRANSB_HDCP2_STREAM_STATUS		0x665C0
> > > +#define TRANS_HDCP2_STREAM_STATUS(trans)	_MMIO_TRANS(trans, \
> > > +
> > > _TRANSA_HDCP2_STREAM_STATUS, \
> > > +
> > > _TRANSB_HDCP2_STREAM_STATUS)
> > > +#define   STREAM_ENCRYPTION_STATUS	BIT(31)
> > > +#define   STREAM_TYPE_STATUS		BIT(30)
> > > +#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
> > > +					(INTEL_GEN(dev_priv) >= 12 ? \
> > > +					 TRANS_HDCP2_STREAM_STATUS(trans) :
> > > \
> > > +					 PORT_HDCP2_STREAM_STATUS(port))
> > > +
> > > +#define _PORTA_HDCP2_AUTH_STREAM		0x66F00
> > > +#define _PORTB_HDCP2_AUTH_STREAM		0x66F04
> > > +#define PORT_HDCP2_AUTH_STREAM(port)	_MMIO_PORT(port, \
> > > +
> > > _PORTA_HDCP2_AUTH_STREAM, \
> > > +
> > > _PORTB_HDCP2_AUTH_STREAM)
> >
> > Should it also not be defined as the other counterparts for pre Gen12.
> It has already been defined with Gen12 and Pre Gen12 annotation below
> HDCP2_AUTH_STREAM should TRANS_HDCP2_AUTH_STREAM for Gen12 and
> PORT_HDCP2_AUTH_STREAM for pre Gen12.
> Is it something else u find it is missing ?

I was checking the declarations similar to
#define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)

But as discussed offline, this set is placed at different register group then the rest of
HDCP regs. So this looks good.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Thanks,
> Anshuman.
> >
> > > +#define _TRANSA_HDCP2_AUTH_STREAM		0x66F00
> > > +#define _TRANSB_HDCP2_AUTH_STREAM		0x66F04
> > > +#define TRANS_HDCP2_AUTH_STREAM(trans)	_MMIO_TRANS(trans, \
> > > +
> > > _TRANSA_HDCP2_AUTH_STREAM, \
> > > +
> > > _TRANSB_HDCP2_AUTH_STREAM)
> > > +#define   AUTH_STREAM_TYPE		BIT(31)
> > > +#define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
> > > +					(INTEL_GEN(dev_priv) >= 12 ? \
> > > +					 TRANS_HDCP2_AUTH_STREAM(trans) : \
> > > +					 PORT_HDCP2_AUTH_STREAM(port))
> > > +
> > >  /* Per-pipe DDI Function Control */
> > >  #define _TRANS_DDI_FUNC_CTL_A		0x60400
> > >  #define _TRANS_DDI_FUNC_CTL_B		0x61400
> > > --
> > > 2.26.2
> >
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Re: [Intel-gfx] [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support

[Anshuman Gupta]

On 2020-10-27 at 11:59:14 +0530, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Anshuman Gupta <anshuman.gupta@intel.com>
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> > Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> > Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> > <anshuman.gupta@intel.com>
> > Subject: [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST
> > support
> > 
> > Enable HDCP 1.4 over DP MST for Gen12.
> > This also enable the stream encryption support for older generations, which was
> > missing earlier.
> > 
> > v2:
> > - Added debug print for stream encryption.
> > - Disable the hdcp on port after disabling last stream
> >   encryption.
> 
> Don't see port disable here, Am I missing something.
> 
> > 
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++---
> >  drivers/gpu/drm/i915/display/intel_hdcp.c   | 46 ++++++++++++++-------
> >  2 files changed, 35 insertions(+), 21 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 16865b200062..f00e12fc83e8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -826,13 +826,9 @@ static struct drm_connector
> > *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
> >  	intel_attach_force_audio_property(connector);
> >  	intel_attach_broadcast_rgb_property(connector);
> > 
> > -
> > -	/* TODO: Figure out how to make HDCP work on GEN12+ */
> > -	if (INTEL_GEN(dev_priv) < 12) {
> > -		ret = intel_dp_init_hdcp(dig_port, intel_connector);
> > -		if (ret)
> > -			DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
> > -	}
> > +	ret = intel_dp_init_hdcp(dig_port, intel_connector);
> > +	if (ret)
> > +		drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n");
> > 
> >  	/*
> >  	 * Reuse the prop from the SST connector because we're diff --git
> > a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index 61252d4be3dd..46c9bd588db1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -612,7 +612,12 @@ int intel_hdcp_auth_downstream(struct intel_connector
> > *connector)
> >  	return ret;
> >  }
> > 
> > -/* Implements Part 1 of the HDCP authorization procedure */
> > +/*
> > + * Implements Part 1 of the HDCP authorization procedure.
> > + * Authentication Part 1 steps for Multi-stream DisplayPort.
> > + * Step 1. Auth Part 1 sequence on the driving MST Trasport Link.
> > + * Step 2. Enable encryption for each stream that requires encryption.
> > + */
> >  static int intel_hdcp_auth(struct intel_connector *connector)  {
> >  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> > @@ -766,10 +771,16 @@ static int intel_hdcp_auth(struct intel_connector
> > *connector)
> >  		return -ETIMEDOUT;
> >  	}
> > 
> > -	/*
> > -	 * XXX: If we have MST-connected devices, we need to enable encryption
> > -	 * on those as well.
> > -	 */
> > +	/* DP MST Auth Part 1 Step 2.a and Step 2.b */
> > +	if (shim->stream_encryption) {
> > +		ret = shim->stream_encryption(dig_port, true);
> > +		if (ret) {
> > +			drm_err(&dev_priv->drm, "Failed to enable HDCP 1.4
> > stream enc\n");
> > +			return ret;
> > +		}
> > +		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 tras %s stream
> > encrypted\n",
> > +			    transcoder_name(hdcp->stream_transcoder));
> > +	}
> > 
> >  	if (repeater_present)
> >  		return intel_hdcp_auth_downstream(connector);
> > @@ -790,19 +801,26 @@ static int _intel_hdcp_disable(struct intel_connector
> > *connector)
> > 
> >  	drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
> >  		    connector->base.name, connector->base.base.id);
> > +	/*
> > +	 * Step 1: Deselect HDCP Multiplestream Bit.
> > +	 * Step 2: poll for stream encryption status to be disable.
> > +	 */
> 
> The above comment should be inside the callback, doesn't add value here.
stream_encryption call back is common for enable/disable stream encryption.
probbaly it would be better to nuke the above comment in case not adds value here.
Thanks,
Anshuman.
> 
> > +	if (hdcp->shim->stream_encryption) {
> > +		ret = hdcp->shim->stream_encryption(dig_port, false);
> > +		if (ret) {
> > +			drm_err(&dev_priv->drm, "Failed to disable HDCP 1.4
> > stream enc\n");
> > +			return ret;
> > +		}
> > +		drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 trans %s stream
> > encryption disabled\n",
> > +			    transcoder_name(hdcp->stream_transcoder));
> > +	}
> > 
> >  	/*
> > -	 * If there are other connectors on this port using HDCP, don't disable
> > -	 * it. Instead, toggle the HDCP signalling off on that particular
> > -	 * connector/pipe and exit.
> > +	 * If there are other connectors on this port using HDCP, don't disable it.
> > +	 * Repeat steps 1-2 for each stream that no longer requires encryption.
> >  	 */
> > -	if (dig_port->num_hdcp_streams > 0) {
> > -		ret = hdcp->shim->toggle_signalling(dig_port,
> > -						    cpu_transcoder, false);
> > -		if (ret)
> > -			DRM_ERROR("Failed to disable HDCP signalling\n");
> > +	if (dig_port->num_hdcp_streams > 0)
> >  		return ret;
> > -	}
> > 
> >  	hdcp->hdcp_encrypted = false;
> >  	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
> > --
> > 2.26.2
> 
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