From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 15/18] drm/i915/vrr: Add extra vblank delay to estimates
Date: Fri, 3 Jan 2025 17:43:22 +0530 [thread overview]
Message-ID: <c01ef3ed-a1ef-4233-a84f-38fd4dc23120@intel.com> (raw)
In-Reply-To: <20241210211007.5976-16-ville.syrjala@linux.intel.com>
On 12/11/2024 2:40 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On ICL/TGL the VRR hardware injects an extra scanline just after
> vactive. This essentically behaves the same as an extra line of
> vblank delay, except it only appears in this one specific spot.
>
> Considee our DSB interrupt signalling scheme:
typo: Consider
> 1. arm the update
> 2. wait for undelayed vblank (or rather safe window with VRR)
> 3. wait for enough usecs to get past the delayed vblank
> 4. signal interrupt to indicate that arming has latched
>
> If step 2 waits for end of vactive step 3 needs to account for
> the extra one scanline, or else we risk signalling the interrupt
> before the delayed vblank has actuall elapsed. So include the
> extra scanline in our vblank delay estimates.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 33 +++++++++++++++++++-----
> 1 file changed, 27 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index c08dd1e5cffc..98dd92316595 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -76,12 +76,33 @@ intel_vrr_check_modeset(struct intel_atomic_state *state)
> }
> }
>
> -int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state)
> +static int intel_vrr_real_vblank_delay(const struct intel_crtc_state *crtc_state)
> {
> return crtc_state->hw.adjusted_mode.crtc_vblank_start -
> crtc_state->hw.adjusted_mode.crtc_vdisplay;
> }
>
> +static int intel_vrr_extra_vblank_delay(struct intel_display *display)
> +{
> + /*
> + * On ICL/TGL VRR hardware inserts one extra scanline
> + * just after vactive, which pushes the vmin decision
> + * boundary ahead accordingly. We'll include the extra
> + * scanline in our vblank delay estimates to make sure
> + * that we never underestimate how long we have until
> + * the delayed vblank has passed.
> + */
> + return DISPLAY_VER(display) < 13 ? 1 : 0;
> +}
> +
> +int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> +
> + return intel_vrr_real_vblank_delay(crtc_state) +
> + intel_vrr_extra_vblank_delay(display);
> +}
> +
> static int intel_vrr_flipline_offset(struct intel_display *display)
> {
> /* ICL/TGL hardware imposes flipline>=vmin+1 */
> @@ -131,7 +152,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state)
> return intel_vrr_vmin_flipline(crtc_state);
> else
> return intel_vrr_vmin_flipline(crtc_state) +
> - intel_vrr_vblank_delay(crtc_state);
> + intel_vrr_real_vblank_delay(crtc_state);
> }
>
> int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
> @@ -142,7 +163,7 @@ int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
> return crtc_state->vrr.vmax;
> else
> return crtc_state->vrr.vmax +
> - intel_vrr_vblank_delay(crtc_state);
> + intel_vrr_real_vblank_delay(crtc_state);
> }
>
> int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
> @@ -310,9 +331,9 @@ void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
> * vmin/vmax/flipline also need to be adjusted by
> * the vblank delay to maintain correct vtotals.
> */
> - crtc_state->vrr.vmin -= intel_vrr_vblank_delay(crtc_state);
> - crtc_state->vrr.vmax -= intel_vrr_vblank_delay(crtc_state);
> - crtc_state->vrr.flipline -= intel_vrr_vblank_delay(crtc_state);
> + crtc_state->vrr.vmin -= intel_vrr_real_vblank_delay(crtc_state);
> + crtc_state->vrr.vmax -= intel_vrr_real_vblank_delay(crtc_state);
> + crtc_state->vrr.flipline -= intel_vrr_real_vblank_delay(crtc_state);
> }
> }
>
next prev parent reply other threads:[~2025-01-03 12:13 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-10 21:09 [PATCH 00/18] drm/i915: DSB+VRR Ville Syrjala
2024-12-10 21:09 ` [PATCH 01/18] drm/i915: Extract intel_crtc_vblank_delay() Ville Syrjala
2025-01-03 11:24 ` Nautiyal, Ankit K
2025-01-09 15:43 ` Ville Syrjälä
2025-01-10 5:09 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 02/18] drm/i915: Check vblank delay validity Ville Syrjala
2025-01-03 11:26 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 03/18] drm/i915: Fix include order Ville Syrjala
2025-01-03 11:27 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 04/18] drm/i915: Introduce intel_vrr_{vmin,vmax}_vtotal() Ville Syrjala
2025-01-03 11:28 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 05/18] drm/i915: Move framestart/etc. state dump to a better spot Ville Syrjala
2025-01-03 11:29 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 06/18] drm/i915: Include the vblank delay in the state dump Ville Syrjala
2025-01-03 11:30 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 07/18] drm/i915/vrr: Improve VRR " Ville Syrjala
2025-01-03 11:31 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 08/18] drm/i915: Include the scanline offset in the " Ville Syrjala
2025-01-03 11:32 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 09/18] drm/i915: Extract intel_mode_vblank_delay() Ville Syrjala
2025-01-03 11:34 ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 10/18] drm/i915: Consolidate intel_pre_commit_crtc_state() Ville Syrjala
2025-01-03 11:38 ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 11/18] drm/i915: Extract intel_crtc_active_timings() Ville Syrjala
2025-01-03 11:42 ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 12/18] drm/i915/vrr: Introduce intel_vrr_vblank_delay() Ville Syrjala
2025-01-03 11:48 ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 13/18] drm/i915/vrr: Drop the extra vmin adjustment for ADL+ Ville Syrjala
2025-01-03 11:56 ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 14/18] drm/i915/vrr: Fix vmin/vmax/flipline on TGL when using vblank delay Ville Syrjala
2025-01-03 12:03 ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 15/18] drm/i915/vrr: Add extra vblank delay to estimates Ville Syrjala
2025-01-03 12:13 ` Nautiyal, Ankit K [this message]
2024-12-10 21:10 ` [PATCH 16/18] drm/i915/vrr: Plumb the DSB into intel_vrr_send_push() Ville Syrjala
2025-01-03 12:14 ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 17/18] drm/i915/dsb: Add support for triggering VRR push with DSB Ville Syrjala
2025-01-03 12:17 ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 18/18] drm/i915/dsb: Allow DSB to perform commits when VRR is enabled Ville Syrjala
2025-01-03 12:18 ` Nautiyal, Ankit K
2024-12-10 22:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DSB+VRR Patchwork
2024-12-10 22:17 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-12-10 22:30 ` ✓ i915.CI.BAT: success " Patchwork
2024-12-10 23:49 ` ✗ i915.CI.Full: failure " Patchwork
2024-12-13 23:41 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DSB+VRR (rev2) Patchwork
2024-12-13 23:41 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-12-13 23:55 ` ✗ i915.CI.BAT: failure " Patchwork
2025-01-13 16:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DSB+VRR (rev3) Patchwork
2025-01-13 16:48 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-01-13 17:12 ` ✓ i915.CI.BAT: success " Patchwork
2025-01-15 4:05 ` ✗ i915.CI.Full: failure " Patchwork
2025-01-15 18:11 ` [PATCH 00/18] drm/i915: DSB+VRR Ville Syrjälä
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