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From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 13/18] drm/i915/vrr: Drop the extra vmin adjustment for ADL+
Date: Fri, 3 Jan 2025 17:26:23 +0530	[thread overview]
Message-ID: <e1109e92-ff5c-49d7-a8cf-ac4ab630969e@intel.com> (raw)
In-Reply-To: <20241210211007.5976-14-ville.syrjala@linux.intel.com>


On 12/11/2024 2:40 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Apparently on ICL/TGL need the annoying vmin adjustemnt. On
typo: adjustement
> ADL+ we can program flipling==vmin and the hardware actually
typo: flipline
> respects that properly.

I had tried to remove this earlier for ADL+, but was lost with +1 and -1 
(handling this offset) in different places, and failed miserably.

Thanks for this patch, its now quite clear.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_vrr.c | 39 ++++++++++++++++--------
>   1 file changed, 27 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index a0ddc288c1a3..15017254d250 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -82,6 +82,19 @@ int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state)
>   		crtc_state->hw.adjusted_mode.crtc_vdisplay;
>   }
>   
> +static int intel_vrr_flipline_offset(struct intel_display *display)
> +{
> +	/* ICL/TGL hardware imposes flipline>=vmin+1 */
> +	return DISPLAY_VER(display) < 13 ? 1 : 0;
> +}
> +
> +static int intel_vrr_vmin_flipline(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +
> +	return crtc_state->vrr.vmin + intel_vrr_flipline_offset(display);
> +}
> +
>   /*
>    * Without VRR registers get latched at:
>    *  vblank_start
> @@ -111,8 +124,8 @@ static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_stat
>   
>   int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state)
>   {
> -	/* Min vblank actually determined by flipline that is always >=vmin+1 */
> -	return crtc_state->vrr.vmin + 1;
> +	/* Min vblank actually determined by flipline */
> +	return intel_vrr_vmin_flipline(crtc_state);
>   }
>   
>   int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
> @@ -122,8 +135,8 @@ int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
>   
>   int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
>   {
> -	/* Min vblank actually determined by flipline that is always >=vmin+1 */
> -	return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state);
> +	/* Min vblank actually determined by flipline */
> +	return intel_vrr_vmin_flipline(crtc_state) - intel_vrr_vblank_exit_length(crtc_state);
>   }
>   
>   int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state)
> @@ -220,15 +233,17 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>   	if (vmin >= vmax)
>   		return;
>   
> -	/*
> -	 * flipline determines the min vblank length the hardware will
> -	 * generate, and flipline>=vmin+1, hence we reduce vmin by one
> -	 * to make sure we can get the actual min vblank length.
> -	 */
> -	crtc_state->vrr.vmin = vmin - 1;
> +	crtc_state->vrr.vmin = vmin;
>   	crtc_state->vrr.vmax = vmax;
>   
> -	crtc_state->vrr.flipline = crtc_state->vrr.vmin + 1;
> +	crtc_state->vrr.flipline = crtc_state->vrr.vmin;
> +
> +	/*
> +	 * flipline determines the min vblank length the hardware will
> +	 * generate, and on ICL/TGL flipline>=vmin+1, hence we reduce
> +	 * vmin by one to make sure we can get the actual min vblank length.
> +	 */
> +	crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
>   
>   	/*
>   	 * When panel is VRR capable and userspace has
> @@ -273,7 +288,7 @@ void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
>   
>   	if (DISPLAY_VER(display) >= 13) {
>   		crtc_state->vrr.guardband =
> -			crtc_state->vrr.vmin + 1 - adjusted_mode->crtc_vblank_start;
> +			crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start;
>   	} else {
>   		crtc_state->vrr.pipeline_full =
>   			min(255, crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start -

  reply	other threads:[~2025-01-03 11:56 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-10 21:09 [PATCH 00/18] drm/i915: DSB+VRR Ville Syrjala
2024-12-10 21:09 ` [PATCH 01/18] drm/i915: Extract intel_crtc_vblank_delay() Ville Syrjala
2025-01-03 11:24   ` Nautiyal, Ankit K
2025-01-09 15:43     ` Ville Syrjälä
2025-01-10  5:09       ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 02/18] drm/i915: Check vblank delay validity Ville Syrjala
2025-01-03 11:26   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 03/18] drm/i915: Fix include order Ville Syrjala
2025-01-03 11:27   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 04/18] drm/i915: Introduce intel_vrr_{vmin,vmax}_vtotal() Ville Syrjala
2025-01-03 11:28   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 05/18] drm/i915: Move framestart/etc. state dump to a better spot Ville Syrjala
2025-01-03 11:29   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 06/18] drm/i915: Include the vblank delay in the state dump Ville Syrjala
2025-01-03 11:30   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 07/18] drm/i915/vrr: Improve VRR " Ville Syrjala
2025-01-03 11:31   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 08/18] drm/i915: Include the scanline offset in the " Ville Syrjala
2025-01-03 11:32   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 09/18] drm/i915: Extract intel_mode_vblank_delay() Ville Syrjala
2025-01-03 11:34   ` Nautiyal, Ankit K
2024-12-10 21:09 ` [PATCH 10/18] drm/i915: Consolidate intel_pre_commit_crtc_state() Ville Syrjala
2025-01-03 11:38   ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 11/18] drm/i915: Extract intel_crtc_active_timings() Ville Syrjala
2025-01-03 11:42   ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 12/18] drm/i915/vrr: Introduce intel_vrr_vblank_delay() Ville Syrjala
2025-01-03 11:48   ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 13/18] drm/i915/vrr: Drop the extra vmin adjustment for ADL+ Ville Syrjala
2025-01-03 11:56   ` Nautiyal, Ankit K [this message]
2024-12-10 21:10 ` [PATCH 14/18] drm/i915/vrr: Fix vmin/vmax/flipline on TGL when using vblank delay Ville Syrjala
2025-01-03 12:03   ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 15/18] drm/i915/vrr: Add extra vblank delay to estimates Ville Syrjala
2025-01-03 12:13   ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 16/18] drm/i915/vrr: Plumb the DSB into intel_vrr_send_push() Ville Syrjala
2025-01-03 12:14   ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 17/18] drm/i915/dsb: Add support for triggering VRR push with DSB Ville Syrjala
2025-01-03 12:17   ` Nautiyal, Ankit K
2024-12-10 21:10 ` [PATCH 18/18] drm/i915/dsb: Allow DSB to perform commits when VRR is enabled Ville Syrjala
2025-01-03 12:18   ` Nautiyal, Ankit K
2024-12-10 22:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DSB+VRR Patchwork
2024-12-10 22:17 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-12-10 22:30 ` ✓ i915.CI.BAT: success " Patchwork
2024-12-10 23:49 ` ✗ i915.CI.Full: failure " Patchwork
2024-12-13 23:41 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DSB+VRR (rev2) Patchwork
2024-12-13 23:41 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-12-13 23:55 ` ✗ i915.CI.BAT: failure " Patchwork
2025-01-13 16:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DSB+VRR (rev3) Patchwork
2025-01-13 16:48 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-01-13 17:12 ` ✓ i915.CI.BAT: success " Patchwork
2025-01-15  4:05 ` ✗ i915.CI.Full: failure " Patchwork
2025-01-15 18:11 ` [PATCH 00/18] drm/i915: DSB+VRR Ville Syrjälä

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