Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-xe@lists.freedesktop.org, kernel-dev@igalia.com,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 01/12] drm/xe: Fix MOCS debugfs LNCF readout
Date: Fri, 28 Feb 2025 08:10:11 +0000	[thread overview]
Message-ID: <04d6b13c-ed8e-4df8-abf0-2b35c46a98cd@igalia.com> (raw)
In-Reply-To: <20250227232454.GK5109@mdroper-desk1.amr.corp.intel.com>


On 27/02/2025 23:24, Matt Roper wrote:
> On Fri, Feb 21, 2025 at 10:17:20AM +0000, Tvrtko Ursulin wrote:
>> With only XE_FW_GT taken LNCF registers read back as all zeroes, leading
>> to a wild goose chase trying to figure out why is register programming
>> incorrect.
>>
>> Fix it by grabbing XE_FORCEWAKE_ALL for affected platforms.
> 
> LNCF MOCS registers were only in the render power domain on the old
> Xe_LP platforms.  From Xe_HP onward they moved into the GT power domain
> (and then in Xe2 they were removed completely).

Should I add a platform check on top of HAS_LNCF_MOCS? Or just the 
platform check? Or use XE_FORCEWAKE_ALL always as Rodrigo commented?

Regards,

Tvrtko

>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>> ---
>>   drivers/gpu/drm/xe/xe_mocs.c | 4 +++-
>>   1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
>> index 54d199b5cfb2..31dade91a089 100644
>> --- a/drivers/gpu/drm/xe/xe_mocs.c
>> +++ b/drivers/gpu/drm/xe/xe_mocs.c
>> @@ -781,7 +781,9 @@ void xe_mocs_dump(struct xe_gt *gt, struct drm_printer *p)
>>   	flags = get_mocs_settings(xe, &table);
>>   
>>   	xe_pm_runtime_get_noresume(xe);
>> -	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>> +	fw_ref = xe_force_wake_get(gt_to_fw(gt),
>> +				   flags & HAS_LNCF_MOCS ?
>> +				   XE_FORCEWAKE_ALL : XE_FW_GT);
>>   	if (!fw_ref)
>>   		goto err_fw;
>>   
>> -- 
>> 2.48.0
>>
> 


  reply	other threads:[~2025-02-28  8:10 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-21 10:17 [PATCH 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 01/12] drm/xe: Fix MOCS debugfs LNCF readout Tvrtko Ursulin
2025-02-27 20:21   ` Rodrigo Vivi
2025-02-27 23:24   ` Matt Roper
2025-02-28  8:10     ` Tvrtko Ursulin [this message]
2025-02-21 10:17 ` [PATCH 02/12] drm/xe: Fix ring flush invalidation Tvrtko Ursulin
2025-02-27 23:46   ` Matt Roper
2025-02-28  9:08     ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 03/12] drm/xe: Pass flags directly to emit_flush_imm_ggtt Tvrtko Ursulin
2025-02-27 23:47   ` Matt Roper
2025-02-21 10:17 ` [PATCH 04/12] drm/xe: Add ring buffer handling for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 05/12] drm/xe: Use correct type width for alignment in fb pinning code Tvrtko Ursulin
2025-02-28 14:57   ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 06/12] drm/xe: Use fb cached min alignment Tvrtko Ursulin
2025-02-28 19:21   ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 07/12] drm/xe: Reduce DPT table alignment as in i915 Tvrtko Ursulin
2025-02-28 19:25   ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 08/12] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-02-28 19:27   ` Rodrigo Vivi
2025-03-04 14:23     ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 09/12] drm/xe: Handle DPT in system memory Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 10/12] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-02-28 19:34   ` Rodrigo Vivi
2025-03-04 14:21     ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 11/12] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 12/12] drm/xe/display: Expose AuxCCS frame buffer modifiers Tvrtko Ursulin
2025-02-28 19:32   ` Rodrigo Vivi
2025-02-21 10:25 ` ✓ CI.Patch_applied: success for AuxCCS handling and render compression modifiers (rev2) Patchwork
2025-02-21 10:25 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-21 10:27 ` ✓ CI.KUnit: success " Patchwork
2025-02-21 10:53 ` ✓ CI.Build: " Patchwork
2025-02-21 10:56 ` ✓ CI.Hooks: " Patchwork
2025-02-21 10:57 ` ✓ CI.checksparse: " Patchwork
2025-02-21 11:16 ` ✓ Xe.CI.BAT: " Patchwork
2025-02-22  0:13 ` ✗ Xe.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=04d6b13c-ed8e-4df8-abf0-2b35c46a98cd@igalia.com \
    --to=tvrtko.ursulin@igalia.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=kernel-dev@igalia.com \
    --cc=matthew.d.roper@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox