From: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
To: intel-xe@lists.freedesktop.org
Cc: kernel-dev@igalia.com, Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Subject: [PATCH 06/12] drm/xe: Use fb cached min alignment
Date: Fri, 21 Feb 2025 10:17:25 +0000 [thread overview]
Message-ID: <20250221101736.78986-7-tvrtko.ursulin@igalia.com> (raw)
In-Reply-To: <20250221101736.78986-1-tvrtko.ursulin@igalia.com>
Instead of just looking at the first plane use the fb cached overall
minimum alignment.
This aligns with how the i915 version of intel_plane_pin_fb works.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 3df51cd4a86b..496257a60009 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -416,12 +416,9 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
const struct intel_plane_state *old_plane_state)
{
struct drm_framebuffer *fb = new_plane_state->hw.fb;
- struct drm_gem_object *obj = intel_fb_bo(fb);
- struct xe_bo *bo = gem_to_xe_bo(obj);
- struct i915_vma *vma;
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
- unsigned int alignment = plane->min_alignment(plane, fb, 0);
+ struct xe_bo *bo = gem_to_xe_bo(intel_fb_bo(fb));
+ struct i915_vma *vma;
if (reuse_vma(new_plane_state, old_plane_state))
return 0;
@@ -429,8 +426,8 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
/* We reject creating !SCANOUT fb's, so this is weird.. */
drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_SCANOUT));
- vma = __xe_pin_fb_vma(intel_fb, &new_plane_state->view.gtt, alignment);
-
+ vma = __xe_pin_fb_vma(intel_fb, &new_plane_state->view.gtt,
+ intel_fb->min_alignment);
if (IS_ERR(vma))
return PTR_ERR(vma);
--
2.48.0
next prev parent reply other threads:[~2025-02-21 10:18 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-21 10:17 [PATCH 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 01/12] drm/xe: Fix MOCS debugfs LNCF readout Tvrtko Ursulin
2025-02-27 20:21 ` Rodrigo Vivi
2025-02-27 23:24 ` Matt Roper
2025-02-28 8:10 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 02/12] drm/xe: Fix ring flush invalidation Tvrtko Ursulin
2025-02-27 23:46 ` Matt Roper
2025-02-28 9:08 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 03/12] drm/xe: Pass flags directly to emit_flush_imm_ggtt Tvrtko Ursulin
2025-02-27 23:47 ` Matt Roper
2025-02-21 10:17 ` [PATCH 04/12] drm/xe: Add ring buffer handling for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 05/12] drm/xe: Use correct type width for alignment in fb pinning code Tvrtko Ursulin
2025-02-28 14:57 ` Rodrigo Vivi
2025-02-21 10:17 ` Tvrtko Ursulin [this message]
2025-02-28 19:21 ` [PATCH 06/12] drm/xe: Use fb cached min alignment Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 07/12] drm/xe: Reduce DPT table alignment as in i915 Tvrtko Ursulin
2025-02-28 19:25 ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 08/12] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-02-28 19:27 ` Rodrigo Vivi
2025-03-04 14:23 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 09/12] drm/xe: Handle DPT in system memory Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 10/12] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-02-28 19:34 ` Rodrigo Vivi
2025-03-04 14:21 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 11/12] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 12/12] drm/xe/display: Expose AuxCCS frame buffer modifiers Tvrtko Ursulin
2025-02-28 19:32 ` Rodrigo Vivi
2025-02-21 10:25 ` ✓ CI.Patch_applied: success for AuxCCS handling and render compression modifiers (rev2) Patchwork
2025-02-21 10:25 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-21 10:27 ` ✓ CI.KUnit: success " Patchwork
2025-02-21 10:53 ` ✓ CI.Build: " Patchwork
2025-02-21 10:56 ` ✓ CI.Hooks: " Patchwork
2025-02-21 10:57 ` ✓ CI.checksparse: " Patchwork
2025-02-21 11:16 ` ✓ Xe.CI.BAT: " Patchwork
2025-02-22 0:13 ` ✗ Xe.CI.Full: failure " Patchwork
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