From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: <intel-xe@lists.freedesktop.org>, <kernel-dev@igalia.com>
Subject: Re: [PATCH 01/12] drm/xe: Fix MOCS debugfs LNCF readout
Date: Thu, 27 Feb 2025 15:21:28 -0500 [thread overview]
Message-ID: <Z8DJSD3N7YneSHTc@intel.com> (raw)
In-Reply-To: <20250221101736.78986-2-tvrtko.ursulin@igalia.com>
On Fri, Feb 21, 2025 at 10:17:20AM +0000, Tvrtko Ursulin wrote:
> With only XE_FW_GT taken LNCF registers read back as all zeroes, leading
> to a wild goose chase trying to figure out why is register programming
> incorrect.
>
> Fix it by grabbing XE_FORCEWAKE_ALL for affected platforms.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> ---
> drivers/gpu/drm/xe/xe_mocs.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
> index 54d199b5cfb2..31dade91a089 100644
> --- a/drivers/gpu/drm/xe/xe_mocs.c
> +++ b/drivers/gpu/drm/xe/xe_mocs.c
> @@ -781,7 +781,9 @@ void xe_mocs_dump(struct xe_gt *gt, struct drm_printer *p)
> flags = get_mocs_settings(xe, &table);
>
> xe_pm_runtime_get_noresume(xe);
> - fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> + fw_ref = xe_force_wake_get(gt_to_fw(gt),
> + flags & HAS_LNCF_MOCS ?
> + XE_FORCEWAKE_ALL : XE_FW_GT);
we could perhaps just get forcewake_all for every case.
It shouldn't hurt badly on the dump. But well, if there's
already a condition that works, that's fine too..
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> if (!fw_ref)
> goto err_fw;
>
> --
> 2.48.0
>
next prev parent reply other threads:[~2025-02-27 20:21 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-21 10:17 [PATCH 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 01/12] drm/xe: Fix MOCS debugfs LNCF readout Tvrtko Ursulin
2025-02-27 20:21 ` Rodrigo Vivi [this message]
2025-02-27 23:24 ` Matt Roper
2025-02-28 8:10 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 02/12] drm/xe: Fix ring flush invalidation Tvrtko Ursulin
2025-02-27 23:46 ` Matt Roper
2025-02-28 9:08 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 03/12] drm/xe: Pass flags directly to emit_flush_imm_ggtt Tvrtko Ursulin
2025-02-27 23:47 ` Matt Roper
2025-02-21 10:17 ` [PATCH 04/12] drm/xe: Add ring buffer handling for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 05/12] drm/xe: Use correct type width for alignment in fb pinning code Tvrtko Ursulin
2025-02-28 14:57 ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 06/12] drm/xe: Use fb cached min alignment Tvrtko Ursulin
2025-02-28 19:21 ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 07/12] drm/xe: Reduce DPT table alignment as in i915 Tvrtko Ursulin
2025-02-28 19:25 ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 08/12] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-02-28 19:27 ` Rodrigo Vivi
2025-03-04 14:23 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 09/12] drm/xe: Handle DPT in system memory Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 10/12] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-02-28 19:34 ` Rodrigo Vivi
2025-03-04 14:21 ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 11/12] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 12/12] drm/xe/display: Expose AuxCCS frame buffer modifiers Tvrtko Ursulin
2025-02-28 19:32 ` Rodrigo Vivi
2025-02-21 10:25 ` ✓ CI.Patch_applied: success for AuxCCS handling and render compression modifiers (rev2) Patchwork
2025-02-21 10:25 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-21 10:27 ` ✓ CI.KUnit: success " Patchwork
2025-02-21 10:53 ` ✓ CI.Build: " Patchwork
2025-02-21 10:56 ` ✓ CI.Hooks: " Patchwork
2025-02-21 10:57 ` ✓ CI.checksparse: " Patchwork
2025-02-21 11:16 ` ✓ Xe.CI.BAT: " Patchwork
2025-02-22 0:13 ` ✗ Xe.CI.Full: failure " Patchwork
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