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From: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
To: intel-xe@lists.freedesktop.org
Cc: kernel-dev@igalia.com, Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Subject: [PATCH 09/12] drm/xe: Handle DPT in system memory
Date: Fri, 21 Feb 2025 10:17:28 +0000	[thread overview]
Message-ID: <20250221101736.78986-10-tvrtko.ursulin@igalia.com> (raw)
In-Reply-To: <20250221101736.78986-1-tvrtko.ursulin@igalia.com>

If DPT is allocated from system memory it will be created in the default
write-back cached mode. This means we need to flush it after populating
otherwise nothing works.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 8f559b19e8ab..a32f3603751a 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -3,6 +3,7 @@
  * Copyright © 2021 Intel Corporation
  */
 
+#include <drm/drm_cache.h>
 #include <drm/ttm/ttm_bo.h>
 
 #include "intel_display_types.h"
@@ -205,6 +206,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 
 	if (dpt->vmap.is_iomem)
 		ggtt_flush_writes(tile0->mem.ggtt);
+	else if (!xe_bo_is_vram(dpt) && !xe_bo_is_stolen(dpt))
+		drm_clflush_virt_range(dpt->vmap.vaddr, dpt_size);
 
 	vma->dpt = dpt;
 	vma->node = dpt->ggtt_node[tile0->id];
-- 
2.48.0


  parent reply	other threads:[~2025-02-21 10:17 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-21 10:17 [PATCH 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 01/12] drm/xe: Fix MOCS debugfs LNCF readout Tvrtko Ursulin
2025-02-27 20:21   ` Rodrigo Vivi
2025-02-27 23:24   ` Matt Roper
2025-02-28  8:10     ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 02/12] drm/xe: Fix ring flush invalidation Tvrtko Ursulin
2025-02-27 23:46   ` Matt Roper
2025-02-28  9:08     ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 03/12] drm/xe: Pass flags directly to emit_flush_imm_ggtt Tvrtko Ursulin
2025-02-27 23:47   ` Matt Roper
2025-02-21 10:17 ` [PATCH 04/12] drm/xe: Add ring buffer handling for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 05/12] drm/xe: Use correct type width for alignment in fb pinning code Tvrtko Ursulin
2025-02-28 14:57   ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 06/12] drm/xe: Use fb cached min alignment Tvrtko Ursulin
2025-02-28 19:21   ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 07/12] drm/xe: Reduce DPT table alignment as in i915 Tvrtko Ursulin
2025-02-28 19:25   ` Rodrigo Vivi
2025-02-21 10:17 ` [PATCH 08/12] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-02-28 19:27   ` Rodrigo Vivi
2025-03-04 14:23     ` Tvrtko Ursulin
2025-02-21 10:17 ` Tvrtko Ursulin [this message]
2025-02-21 10:17 ` [PATCH 10/12] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-02-28 19:34   ` Rodrigo Vivi
2025-03-04 14:21     ` Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 11/12] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-02-21 10:17 ` [PATCH 12/12] drm/xe/display: Expose AuxCCS frame buffer modifiers Tvrtko Ursulin
2025-02-28 19:32   ` Rodrigo Vivi
2025-02-21 10:25 ` ✓ CI.Patch_applied: success for AuxCCS handling and render compression modifiers (rev2) Patchwork
2025-02-21 10:25 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-21 10:27 ` ✓ CI.KUnit: success " Patchwork
2025-02-21 10:53 ` ✓ CI.Build: " Patchwork
2025-02-21 10:56 ` ✓ CI.Hooks: " Patchwork
2025-02-21 10:57 ` ✓ CI.checksparse: " Patchwork
2025-02-21 11:16 ` ✓ Xe.CI.BAT: " Patchwork
2025-02-22  0:13 ` ✗ Xe.CI.Full: failure " Patchwork

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