[PATCH v4 0/9] [ANDROID]: Add GPU work period support for Xe driver

[PATCH v4 0/9] [ANDROID]: Add GPU work period support for Xe driver

[Aakash Deep Sarkar]

This patch series implements the Android VSR requirement GPU work
period event for the Intel Xe driver.

|GpuWorkPeriodEvent| defines a non-overlapping, non-zero period
of time from |start_time_ns| (inclusive) until |end_time_ns|
(exclusive) for a given |uid|, and includes details of how much
work the GPU was performing for |uid| during the period. When
GPU work for a given |uid| runs on the GPU, the driver must track
one or more periods that cover the time where the work was running,
and emit events soon after.

Full requirement is defined in the following file:
https://cs.android.com/android/platform/superproject/main/+\
main:frameworks/native/services/gpuservice/gpuwork/bpfprogs/gpuWork.c;l=35

The requirement is implemented using a delayed worker thread per
user id instance to accumulate its runtime on the gpu and emit
the event. Each user id instance is tracked using an xe_user
structure and the runtime is updated every time the kworker is
executed for this uid. The delay period is hardcoded to 500 msecs.

The runtime on the gpu is collected for each xe file individually
inside the function xe_exec_queue_update_run_ticks and accumulated
into the corresponding xe_user active_duration_ns field. The HW
Context timestamp field in the GTT is used to derive the runtime
in clock ticks and then converted into nanosecs before updating the
active duration.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>

Aakash Deep Sarkar (9):
  drm/xe: Add a new xe_user structure
  drm/xe: Add xe_gt_clock_interval_to_ns function
  drm/xe: Add a trace point for GPU work period
  drm/xe: Modify xe_exec_queue_update_run_ticks
  drm/xe: Handle xe_user creation and removal
  drm/xe: Implement xe_work_period_worker
  drm/xe: Add a Kconfig option for GPU work period
  drm/xe: Handle xe_work_period destruction
  Hack patch: Do not merge

 drivers/gpu/drm/xe/Makefile          |   2 +
 drivers/gpu/drm/xe/xe_device.c       |  32 ++++
 drivers/gpu/drm/xe/xe_device_types.h |  19 +++
 drivers/gpu/drm/xe/xe_exec_queue.c   |   8 +
 drivers/gpu/drm/xe/xe_gt_clock.c     |  14 ++
 drivers/gpu/drm/xe/xe_gt_clock.h     |   1 +
 drivers/gpu/drm/xe/xe_pm.c           |   5 +
 drivers/gpu/drm/xe/xe_user.c         | 246 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_user.h         | 129 ++++++++++++++
 drivers/gpu/trace/Kconfig            |  12 ++
 include/trace/gpu_work_period.h      |  59 +++++++
 11 files changed, 527 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_user.c
 create mode 100644 drivers/gpu/drm/xe/xe_user.h
 create mode 100644 include/trace/gpu_work_period.h

-- 
2.49.0

[PATCH v4 1/9] drm/xe: Add a new xe_user structure

[Aakash Deep Sarkar]

For Android GPU work period event we need to track the runtime
on the GPU for each user id. This means we can have multiple
xe files opened by different processes/threads belonging to
the same user id. All these xe files need to be grouped together
so that one can easily identify these while calculating the
run time for the given user id.

Currently, the xe driver doesn't record the user id of the
calling process. Also, all the xe files created using open
call are clubbed together inside the xe device structure
with no way to distinguish between them based on the user id
of the calling process.

To remedy these limitations we are adding another layer of
indirection between xe device and xe file. xe device will
now have a list of xe users each with a given user id; and each
xe user will have a list of xe files each of which is created
by a process that is associated with this user id.

The lifetime of the xe user structure should be between when
a process with a new user id has opened the xe device; and when
the last xe file belonging to this user id is closed.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 drivers/gpu/drm/xe/Makefile  |  2 +
 drivers/gpu/drm/xe/xe_user.c | 59 ++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_user.h | 81 ++++++++++++++++++++++++++++++++++++
 3 files changed, 142 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_user.c
 create mode 100644 drivers/gpu/drm/xe/xe_user.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index d9c6cf0f189e..ff6b584f3293 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -333,6 +333,8 @@ ifeq ($(CONFIG_DEBUG_FS),y)
 
 	xe-$(CONFIG_PCI_IOV) += xe_gt_sriov_pf_debugfs.o
 
+	xe-y += xe_user.o
+
 	xe-$(CONFIG_DRM_XE_DISPLAY) += \
 		i915-display/intel_display_debugfs.o \
 		i915-display/intel_display_debugfs_params.o \
diff --git a/drivers/gpu/drm/xe/xe_user.c b/drivers/gpu/drm/xe/xe_user.c
new file mode 100644
index 000000000000..8c285a68115a
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_user.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <linux/slab.h>
+
+#include "xe_user.h"
+
+/**
+ * worker thread to emit gpu work period event for this xe user
+ * @work: work instance for this xe user
+ *
+ * Return: void
+ */
+static inline void work_period_worker(struct work_struct *work)
+{
+	//TODO: Implement this worker
+}
+
+/**
+ * xe_user_alloc() - Allocate xe user
+ * @void: No arg
+ *
+ * Allocate xe user struct to track activity on the gpu
+ * by the application. Call this API whenever a new app
+ * has opened xe device.
+ *
+ * Return: pointer to user struct or NULL if can't allocate
+ */
+struct xe_user *xe_user_alloc(void)
+{
+	struct xe_user *user;
+
+	user = kzalloc(sizeof(*user), GFP_KERNEL);
+	if (!user)
+		return NULL;
+
+	kref_init(&user->refcount);
+	mutex_init(&user->filelist_lock);
+	INIT_LIST_HEAD(&user->filelist);
+	//TODO: Add a hook into xe device
+	INIT_WORK(&user->work, work_period_worker);
+	return user;
+}
+
+/**
+ * __xe_user_free() - Free user struct
+ * @kref: The reference
+ *
+ * Return: void
+ */
+void __xe_user_free(struct kref *kref)
+{
+	struct xe_user *user =
+		container_of(kref, struct xe_user, refcount);
+
+	kfree(user);
+}
diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
new file mode 100644
index 000000000000..e52f66d3f3b0
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_user.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _XE_USER_H_
+#define _XE_USER_H_
+
+#include <linux/kref.h>
+#include <linux/list.h>
+#include <linux/workqueue.h>
+
+/**
+ * This is a per process/user id structure for a xe device
+ * client. It is allocated when a new process/app opens the
+ * xe device and destroyed when the last xe file belonging
+ * to this user id is destroyed.
+ */
+struct xe_user {
+	/**
+	 * @refcount: reference count
+	 */
+	struct kref refcount;
+
+	/**
+	 * @xe: pointer to the xe_device
+	 */
+	struct xe_device *xe;
+
+	/**
+	 * @filelist_lock: lock protecting the filelist
+	 */
+	struct mutex filelist_lock;
+
+	/**
+	 * @filelist: list of xe files belonging to this xe user
+	 */
+	struct list_head filelist;
+
+	/**
+	 * @work: work to emit the gpu work period event for this
+	 * xe user
+	 */
+	struct work_struct work;
+
+	/**
+	 * @uid: user id for this xe_user
+	 */
+	u32 uid;
+
+	/**
+	 * @active_duration_ns: sum total of xe_file.active_duration_ns
+	 * for all xe files belonging to this xe user
+	 */
+	u64 active_duration_ns;
+
+	/**
+	 * @last_timestamp_ns: timestamp in ns when we last emitted event
+	 * for this xe user
+	 */
+	u64 last_timestamp_ns;
+};
+
+struct xe_user *xe_user_alloc(void);
+
+static inline struct xe_user *
+xe_user_get(struct xe_user *user)
+{
+	kref_get(&user->refcount);
+	return user;
+}
+
+void __xe_user_free(struct kref *kref);
+
+static inline void xe_user_put(struct xe_user *user)
+{
+	kref_put(&user->refcount, __xe_user_free);
+}
+
+#endif // _XE_USER_H_
+
-- 
2.49.0

[PATCH v4 2/9] drm/xe: Add xe_gt_clock_interval_to_ns function

[Aakash Deep Sarkar]

The runtime of a user id in the GPU work period event are required
to be given in nanosec unit. Since we want to use the HW Context
timestamp register to derive the runtime for a context, we need
a way to convert from GT clock ticks to nano seconds.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_clock.c | 14 ++++++++++++++
 drivers/gpu/drm/xe/xe_gt_clock.h |  1 +
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt_clock.c b/drivers/gpu/drm/xe/xe_gt_clock.c
index 4f011d1573c6..17c1cc6bff5a 100644
--- a/drivers/gpu/drm/xe/xe_gt_clock.c
+++ b/drivers/gpu/drm/xe/xe_gt_clock.c
@@ -110,3 +110,17 @@ u64 xe_gt_clock_interval_to_ms(struct xe_gt *gt, u64 count)
 {
 	return div_u64_roundup(count * MSEC_PER_SEC, gt->info.reference_clock);
 }
+
+/**
+ * xe_gt_clock_interval_to_ns - Convert sampled GT clock ticks to nanosec
+ *
+ * @gt: the &xe_gt
+ * @count: count of GT clock ticks
+ *
+ * Returns: time in nanosec
+ */
+u64 xe_gt_clock_interval_to_ns(struct xe_gt *gt, u64 count)
+{
+	return div_u64_roundup(count * NSEC_PER_SEC, gt->info.reference_clock);
+}
+
diff --git a/drivers/gpu/drm/xe/xe_gt_clock.h b/drivers/gpu/drm/xe/xe_gt_clock.h
index 3adeb7baaca4..bd87971bce97 100644
--- a/drivers/gpu/drm/xe/xe_gt_clock.h
+++ b/drivers/gpu/drm/xe/xe_gt_clock.h
@@ -12,5 +12,6 @@ struct xe_gt;
 
 int xe_gt_clock_init(struct xe_gt *gt);
 u64 xe_gt_clock_interval_to_ms(struct xe_gt *gt, u64 count);
+u64 xe_gt_clock_interval_to_ns(struct xe_gt *gt, u64 count);
 
 #endif
-- 
2.49.0

[PATCH v4 3/9] drm/xe: Add a trace point for GPU work period

[Aakash Deep Sarkar]

The GPU work period event is required to have the following format:

Defines the structure of the kernel tracepoint:
/sys/kernel/tracing/events/power/gpu_work_period

A value that uniquely identifies the GPU within the system.
  uint32_t gpu_id;

The UID of the application (i.e. persistent, unique ID of the Android
app) that submitted work to the GPU.
  uint32_t uid;

The start time of the period in nanoseconds. The clock must be
CLOCK_MONOTONIC_RAW, as returned by the ktime_get_raw_ns(void) function.
  uint64_t start_time_ns;

The end time of the period in nanoseconds. The clock must be
CLOCK_MONOTONIC_RAW, as returned by the ktime_get_raw_ns(void) function.
  uint64_t end_time_ns;

The amount of time the GPU was running GPU work for |uid| during the
period, in nanoseconds, without double-counting parallel GPU work for the
same |uid|. For example, this might include the amount of time the GPU
spent performing shader work (vertex work, fragment work, etc.) for
|uid|.
  uint64_t total_active_duration_ns;

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 include/trace/gpu_work_period.h | 59 +++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 include/trace/gpu_work_period.h

diff --git a/include/trace/gpu_work_period.h b/include/trace/gpu_work_period.h
new file mode 100644
index 000000000000..e06467625705
--- /dev/null
+++ b/include/trace/gpu_work_period.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM power
+
+#if !defined(_TRACE_GPU_WORK_PERIOD_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_GPU_WORK_PERIOD_H
+
+#include <linux/tracepoint.h>
+
+TRACE_EVENT(gpu_work_period,
+
+	TP_PROTO(
+		u32 gpu_id,
+		u32 uid,
+		u64 start_time_ns,
+		u64 end_time_ns,
+		u64 total_active_duration_ns
+	),
+
+	TP_ARGS(gpu_id, uid, start_time_ns, end_time_ns, total_active_duration_ns),
+
+	TP_STRUCT__entry(
+		__field(u32, gpu_id)
+		__field(u32, uid)
+		__field(u64, start_time_ns)
+		__field(u64, end_time_ns)
+		__field(u64, total_active_duration_ns)
+	),
+
+	TP_fast_assign(
+		__entry->gpu_id = gpu_id;
+		__entry->uid = uid;
+		__entry->start_time_ns = start_time_ns;
+		__entry->end_time_ns = end_time_ns;
+		__entry->total_active_duration_ns = total_active_duration_ns;
+	),
+
+	TP_printk("gpu_id=%u uid=%u start_time_ns=%llu end_time_ns=%llu total_active_duration_ns=%llu",
+		__entry->gpu_id,
+		__entry->uid,
+		__entry->start_time_ns,
+		__entry->end_time_ns,
+		__entry->total_active_duration_ns)
+);
+
+#endif /* _TRACE_GPU_WORK_PERIOD_H */
+
+/* This part must be outside protection */
+
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE gpu_work_period
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+
+#include <trace/define_trace.h>
-- 
2.49.0

[PATCH v4 4/9] drm/xe: Modify xe_exec_queue_update_run_ticks

[Aakash Deep Sarkar]

For GPU work period event we need to record the run time of a
context on the GPU in nanosecs. In the present xe driver code,
we only record the run time in clock ticks and separately for
each engine class.

So, we are adding a uint64 variable |active_duration_ns| in
the xe file structure where we can record the cumulative
run time in ns of all the engines for this context. The
intent here is to add up the |active_duration_ns| in
all the xe files belonging to a given user id to derive
the run time for that user id.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h | 3 +++
 drivers/gpu/drm/xe/xe_exec_queue.c   | 7 +++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a6c361db11d9..e6ecfb3f7f38 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -678,6 +678,9 @@ struct xe_file {
 	/** @run_ticks: hw engine class run time in ticks for this drm client */
 	u64 run_ticks[XE_ENGINE_CLASS_MAX];
 
+	/** @active_duration_ns: total run time in ns for this xe file */
+	u64 active_duration_ns;
+
 	/** @client: drm client */
 	struct xe_drm_client *client;
 
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 37b2b93b73d6..6eb34c62c779 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -15,6 +15,7 @@
 #include "xe_dep_scheduler.h"
 #include "xe_device.h"
 #include "xe_gt.h"
+#include "xe_gt_clock.h"
 #include "xe_hw_engine_class_sysfs.h"
 #include "xe_hw_engine_group.h"
 #include "xe_hw_fence.h"
@@ -887,6 +888,8 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q)
 {
 	struct xe_device *xe = gt_to_xe(q->gt);
 	struct xe_lrc *lrc;
+	struct xe_gt *gt = q->gt;
+
 	u64 old_ts, new_ts;
 	int idx;
 
@@ -912,6 +915,10 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q)
 	new_ts = xe_lrc_update_timestamp(lrc, &old_ts);
 	q->xef->run_ticks[q->class] += (new_ts - old_ts) * q->width;
 
+	// Accumulate the runtime in nanosec for this queue into the xe file.
+	q->xef->active_duration_ns +=
+		xe_gt_clock_interval_to_ns(gt, (new_ts - old_ts));
+
 	drm_dev_exit(idx);
 }
 
-- 
2.49.0

[PATCH v4 5/9] drm/xe: Handle xe_user creation and removal

[Aakash Deep Sarkar]

We want our xe user structure to be created when a new
user id opens the xe device node and to be destroyed
when the final xe file with this uid is closed. In other
words the xe_user structure for a uid should remain in
scope as long as any process with this uid has an open
xe file descriptor.

To implement this we maintain an xarray of xe user
structures inside our xe device instance. Whenever a new
xe file is created via an open call, we check if the
calling process' uid is already present in our xarray.
If so, we increment the refcount for the associated
xe user and add this xe file to the list of xe files
belonging to this xe user. Otherwise, we allocate a
new xe user structure for this uid and initialize its
file list with this xe file.

Whenever an xe file is destroyed, we decrement the
refcount of the associated xe user. When the last
xe file in the xe user's file list is destroyed,
the xe user refcount should drop to zero and the
xe user should be cleaned up. During the cleanup path
we remove the xarray entry for this xe user in our
xe device and free up its memory.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c       | 23 +++++++++
 drivers/gpu/drm/xe/xe_device_types.h | 16 ++++++
 drivers/gpu/drm/xe/xe_user.c         | 76 +++++++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_user.h         | 12 ++++-
 4 files changed, 124 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 09f8a66c9728..837c23784388 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -65,6 +65,7 @@
 #include "xe_tile.h"
 #include "xe_ttm_stolen_mgr.h"
 #include "xe_ttm_sys_mgr.h"
+#include "xe_user.h"
 #include "xe_vm.h"
 #include "xe_vm_madvise.h"
 #include "xe_vram.h"
@@ -80,9 +81,13 @@ static int xe_file_open(struct drm_device *dev, struct drm_file *file)
 {
 	struct xe_device *xe = to_xe_device(dev);
 	struct xe_drm_client *client;
+	struct xe_user *user;
 	struct xe_file *xef;
 	int ret = -ENOMEM;
+	int uid = -EINVAL;
+	u32 idx;
 	struct task_struct *task = NULL;
+	const struct cred *cred = NULL;
 
 	xef = kzalloc(sizeof(*xef), GFP_KERNEL);
 	if (!xef)
@@ -107,8 +112,16 @@ static int xe_file_open(struct drm_device *dev, struct drm_file *file)
 	file->driver_priv = xef;
 	kref_init(&xef->refcount);
 
+	INIT_LIST_HEAD(&xef->user_link);
+
 	task = get_pid_task(rcu_access_pointer(file->pid), PIDTYPE_PID);
 	if (task) {
+		cred = get_task_cred(task);
+		if (cred) {
+			uid = (unsigned int) cred->euid.val;
+			xe_user_init(xe, xef, uid);
+			put_cred(cred);
+		}
 		xef->process_name = kstrdup(task->comm, GFP_KERNEL);
 		xef->pid = task->pid;
 		put_task_struct(task);
@@ -128,6 +141,12 @@ static void xe_file_destroy(struct kref *ref)
 
 	xe_drm_client_put(xef->client);
 	kfree(xef->process_name);
+
+	mutex_lock(&xef->user->filelist_lock);
+	list_del(&xef->user_link);
+	mutex_unlock(&xef->user->filelist_lock);
+
+	xe_user_put(xef->user);
 	kfree(xef);
 }
 
@@ -467,6 +486,10 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
 
 	xa_init_flags(&xe->usm.asid_to_vm, XA_FLAGS_ALLOC);
 
+	xa_init_flags(&xe->work_period.users, XA_FLAGS_ALLOC1);
+
+	mutex_init(&xe->work_period.lock);
+
 	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
 		/* Trigger a large asid and an early asid wrap. */
 		u32 asid;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index e6ecfb3f7f38..e42b15aa4449 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -608,6 +608,16 @@ struct xe_device {
 	atomic_t g2g_test_count;
 #endif
 
+	/**
+	 * @xe_work_period: Support for GPU work period tracepoint
+	 */
+	struct xe_work_period {
+		/** @users: list of users that have opened this xe device */
+		struct xarray users;
+		/** @lock: lock protecting this structure */
+		struct mutex lock;
+	} work_period;
+
 	/* private: */
 
 #if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
@@ -681,6 +691,12 @@ struct xe_file {
 	/** @active_duration_ns: total run time in ns for this xe file */
 	u64 active_duration_ns;
 
+	/** @user: pointer to struct xe_user associated with this xe file */
+	struct xe_user *user;
+
+	/** @user_link: link into xe_user::filelist */
+	struct list_head user_link;
+
 	/** @client: drm client */
 	struct xe_drm_client *client;
 
diff --git a/drivers/gpu/drm/xe/xe_user.c b/drivers/gpu/drm/xe/xe_user.c
index 8c285a68115a..846c6451140b 100644
--- a/drivers/gpu/drm/xe/xe_user.c
+++ b/drivers/gpu/drm/xe/xe_user.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/slab.h>
+#include <drm/drm_drv.h>
 
 #include "xe_user.h"
 
@@ -28,7 +29,7 @@ static inline void work_period_worker(struct work_struct *work)
  *
  * Return: pointer to user struct or NULL if can't allocate
  */
-struct xe_user *xe_user_alloc(void)
+static struct xe_user *xe_user_alloc(void)
 {
 	struct xe_user *user;
 
@@ -39,7 +40,6 @@ struct xe_user *xe_user_alloc(void)
 	kref_init(&user->refcount);
 	mutex_init(&user->filelist_lock);
 	INIT_LIST_HEAD(&user->filelist);
-	//TODO: Add a hook into xe device
 	INIT_WORK(&user->work, work_period_worker);
 	return user;
 }
@@ -54,6 +54,78 @@ void __xe_user_free(struct kref *kref)
 {
 	struct xe_user *user =
 		container_of(kref, struct xe_user, refcount);
+	struct xe_device *xe = user->xe;
+	void *lookup;
 
+	mutex_lock(&xe->work_period.lock);
+	lookup = xa_erase(&xe->work_period.users, user->id);
+	xe_assert(xe, lookup == user);
+	mutex_unlock(&xe->work_period.lock);
+
+	drm_dev_put(&user->xe->drm);
 	kfree(user);
 }
+
+static struct xe_user *xe_user_lookup(struct xe_device *xe, u32 uid)
+{
+	struct xe_user *user = NULL;
+	unsigned long i;
+
+	mutex_lock(&xe->work_period.lock);
+	xa_for_each(&xe->work_period.users, i, user) {
+		if (user->uid == uid) {
+			xe_user_get(user);
+			mutex_unlock(&xe->work_period.lock);
+			return user;
+		}
+	}
+	mutex_unlock(&xe->work_period.lock);
+
+	return NULL;
+}
+
+int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid)
+{
+	struct xe_user *user = NULL;
+	int ret;
+	u32 idx;
+	/*
+	 * Check if the calling process/uid has already been registered
+	 * with the xe device during a previous open call. If so then
+	 * take a reference to this xe user and add this xe file to the
+	 * filelist belonging to this xe user
+	 */
+	user = xe_user_lookup(xe, uid);
+	if (!user) {
+		/*
+		 * We couldn't find an existing xe user for the calling process.
+		 * Allocate a new struct xe_user and register it with this xe
+		 * device
+		 */
+		user = xe_user_alloc();
+		if (!user)
+			return -ENOMEM;
+
+
+		user->uid = uid;
+		user->last_timestamp_ns = ktime_get_raw_ns();
+		user->xe = xe;
+
+		mutex_lock(&xe->work_period.lock);
+		ret = xa_alloc(&xe->work_period.users, &idx, user, xa_limit_32b, GFP_KERNEL);
+		mutex_unlock(&xe->work_period.lock);
+
+		if (ret < 0)
+			return ret;
+
+		user->id = idx;
+		drm_dev_get(&xe->drm);
+	}
+
+	mutex_lock(&user->filelist_lock);
+	list_add(&xef->user_link, &user->filelist);
+	mutex_unlock(&user->filelist_lock);
+	xef->user = user;
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
index e52f66d3f3b0..b13130cc9492 100644
--- a/drivers/gpu/drm/xe/xe_user.h
+++ b/drivers/gpu/drm/xe/xe_user.h
@@ -8,8 +8,12 @@
 
 #include <linux/kref.h>
 #include <linux/list.h>
+#include <linux/mutex.h>
 #include <linux/workqueue.h>
 
+#include "xe_device.h"
+
+
 /**
  * This is a per process/user id structure for a xe device
  * client. It is allocated when a new process/app opens the
@@ -43,6 +47,11 @@ struct xe_user {
 	 */
 	struct work_struct work;
 
+	/**
+	 * @id: index of this user into the xe device users array
+	 */
+	u32 id;
+
 	/**
 	 * @uid: user id for this xe_user
 	 */
@@ -61,7 +70,8 @@ struct xe_user {
 	u64 last_timestamp_ns;
 };
 
-struct xe_user *xe_user_alloc(void);
+int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid);
+
 
 static inline struct xe_user *
 xe_user_get(struct xe_user *user)
-- 
2.49.0

[PATCH v4 6/9] drm/xe: Implement xe_work_period_worker

[Aakash Deep Sarkar]

The work of collecting the GPU run time for a given
xe_user and emitting its event, is done by the
xe_work_period_worker kworker. At the time of creation
of a new xe_user, we simultaneously start a delayed
kworker thread. The delay of execution is set to be
500 ms. After the completion of the work, the kworker
schedules itself for the next execution. This is done
as long as the reference to the xe_user pointer is
valid.

During each execution cycle the xe_work_period_worker
iterates over all the xe files in the xe_user::filelist
and accumulate their corresponding GPU runtime into the
xe_user::active_duration_ns; while also updating each of
the xe_file::active_duration_ns. The total runtime for
this uid in the current sampling period is the delta
between the previous xe_user::active_duration_ns and
the current xe_user::active_duration_ns.

We also record the current timestamp at the end of each
invocation to xe_work_period_worker function in the
xe_user::last_timestamp_ns. The sampling period for this
uid is the delta between the previous timestamp and the
current timestamp.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c |  13 ++--
 drivers/gpu/drm/xe/xe_pm.c     |   5 ++
 drivers/gpu/drm/xe/xe_user.c   | 127 +++++++++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_user.h   |  21 ++++--
 4 files changed, 149 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 837c23784388..5569a27abb09 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -81,11 +81,9 @@ static int xe_file_open(struct drm_device *dev, struct drm_file *file)
 {
 	struct xe_device *xe = to_xe_device(dev);
 	struct xe_drm_client *client;
-	struct xe_user *user;
 	struct xe_file *xef;
 	int ret = -ENOMEM;
 	int uid = -EINVAL;
-	u32 idx;
 	struct task_struct *task = NULL;
 	const struct cred *cred = NULL;
 
@@ -142,11 +140,12 @@ static void xe_file_destroy(struct kref *ref)
 	xe_drm_client_put(xef->client);
 	kfree(xef->process_name);
 
-	mutex_lock(&xef->user->filelist_lock);
-	list_del(&xef->user_link);
-	mutex_unlock(&xef->user->filelist_lock);
-
-	xe_user_put(xef->user);
+	if (xef->user) {
+		mutex_lock(&xef->user->lock);
+		list_del(&xef->user_link);
+		xe_user_put(xef->user);
+		mutex_unlock(&xef->user->lock);
+	}
 	kfree(xef);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index b7e3094f8acf..c7add2616189 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -26,6 +26,7 @@
 #include "xe_pxp.h"
 #include "xe_sriov_vf_ccs.h"
 #include "xe_trace.h"
+#include "xe_user.h"
 #include "xe_vm.h"
 #include "xe_wa.h"
 
@@ -598,6 +599,8 @@ int xe_pm_runtime_suspend(struct xe_device *xe)
 
 	xe_i2c_pm_suspend(xe);
 
+	xe_user_cancel_workers(xe);
+
 	xe_rpm_lockmap_release(xe);
 	xe_pm_write_callback_task(xe, NULL);
 	return 0;
@@ -650,6 +653,8 @@ int xe_pm_runtime_resume(struct xe_device *xe)
 
 	xe_i2c_pm_resume(xe, xe->d3cold.allowed);
 
+	xe_user_resume_workers(xe);
+
 	xe_irq_resume(xe);
 
 	for_each_gt(gt, xe, id)
diff --git a/drivers/gpu/drm/xe/xe_user.c b/drivers/gpu/drm/xe/xe_user.c
index 846c6451140b..19b28bcada0f 100644
--- a/drivers/gpu/drm/xe/xe_user.c
+++ b/drivers/gpu/drm/xe/xe_user.c
@@ -6,17 +6,95 @@
 #include <linux/slab.h>
 #include <drm/drm_drv.h>
 
+#include "xe_assert.h"
+#include "xe_device_types.h"
+#include "xe_exec_queue.h"
+#include "xe_pm.h"
 #include "xe_user.h"
 
+#define CREATE_TRACE_POINTS
+#include <trace/gpu_work_period.h>
+
+static inline void schedule_next_work(struct xe_device *xe, unsigned int id)
+{
+	struct xe_user *user;
+
+	mutex_lock(&xe->work_period.lock);
+	user = xa_load(&xe->work_period.users, id);
+	if (user && xe_user_get_unless_zero(user))
+		schedule_delayed_work(&user->delay_work,
+				msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL));
+	mutex_unlock(&xe->work_period.lock);
+}
 /**
  * worker thread to emit gpu work period event for this xe user
  * @work: work instance for this xe user
  *
  * Return: void
  */
-static inline void work_period_worker(struct work_struct *work)
+static void xe_work_period_worker(struct work_struct *work)
 {
-	//TODO: Implement this worker
+	struct xe_user *user = container_of(work, struct xe_user, delay_work.work);
+	struct xe_device *xe = user->xe;
+	struct xe_file *xef;
+	struct xe_exec_queue *q;
+
+	/*
+	 * The GPU work period event requires the following parameters
+	 *
+	 * gpuid:           GPU index in case the platform has more than one GPU
+	 * uid:             user id of the app
+	 * start_time:      start time for the sampling period in nanosecs
+	 * end_time:        end time for the sampling period in nanosecs
+	 * active_duration: Total runtime in nanosecs for this uid in
+	 *                  the current sampling period.
+	 */
+	u32 gpuid = 0, uid = user->uid, id = user->id;
+	u64 start_time, end_time, active_duration;
+	u64 last_active_duration, last_timestamp;
+	unsigned long i;
+
+	mutex_lock(&user->lock);
+
+	// Save the last recorded active duration and timestamp
+	last_active_duration = user->active_duration_ns;
+	last_timestamp = user->last_timestamp_ns;
+
+	if (xe_pm_runtime_get_if_active(xe)) {
+
+		list_for_each_entry(xef, &user->filelist, user_link) {
+
+			wait_var_event(&xef->exec_queue.pending_removal,
+			!atomic_read(&xef->exec_queue.pending_removal));
+
+			/* Accumulate all the exec queues from this file */
+			mutex_lock(&xef->exec_queue.lock);
+			xa_for_each(&xef->exec_queue.xa, i, q) {
+				xe_exec_queue_get(q);
+				mutex_unlock(&xef->exec_queue.lock);
+
+				xe_exec_queue_update_run_ticks(q);
+
+				mutex_lock(&xef->exec_queue.lock);
+				xe_exec_queue_put(q);
+			}
+			mutex_unlock(&xef->exec_queue.lock);
+			user->active_duration_ns += xef->active_duration_ns;
+		}
+
+		xe_pm_runtime_put(xe);
+
+		start_time = last_timestamp + 1;
+		end_time = ktime_get_raw_ns();
+		active_duration = user->active_duration_ns - last_active_duration;
+		trace_gpu_work_period(gpuid, uid, start_time, end_time, active_duration);
+		user->last_timestamp_ns = end_time;
+		xe_user_put(user);
+	}
+
+	mutex_unlock(&user->lock);
+
+	schedule_next_work(xe, id);
 }
 
 /**
@@ -38,9 +116,9 @@ static struct xe_user *xe_user_alloc(void)
 		return NULL;
 
 	kref_init(&user->refcount);
-	mutex_init(&user->filelist_lock);
+	mutex_init(&user->lock);
 	INIT_LIST_HEAD(&user->filelist);
-	INIT_WORK(&user->work, work_period_worker);
+	INIT_DELAYED_WORK(&user->delay_work, xe_work_period_worker);
 	return user;
 }
 
@@ -120,12 +198,49 @@ int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid)
 
 		user->id = idx;
 		drm_dev_get(&xe->drm);
+
+		xe_user_get(user);
+		if (!schedule_delayed_work(&user->delay_work,
+					msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL)))
+			xe_user_put(user);
 	}
 
-	mutex_lock(&user->filelist_lock);
+	mutex_lock(&user->lock);
 	list_add(&xef->user_link, &user->filelist);
-	mutex_unlock(&user->filelist_lock);
+	mutex_unlock(&user->lock);
 	xef->user = user;
 
 	return 0;
 }
+
+void xe_user_cancel_workers(struct xe_device *xe)
+{
+	struct xe_user *user = NULL;
+	unsigned long i = 0;
+
+	mutex_lock(&xe->work_period.lock);
+	xa_for_each(&xe->work_period.users, i, user) {
+		if (user && xe_user_get_unless_zero(user)) {
+			cancel_delayed_work_sync(&user->delay_work);
+			xe_user_put(user);
+		}
+	}
+	mutex_unlock(&xe->work_period.lock);
+}
+
+void xe_user_resume_workers(struct xe_device *xe)
+{
+	struct xe_user *user = NULL;
+	unsigned long i = 0;
+
+	mutex_lock(&xe->work_period.lock);
+	xa_for_each(&xe->work_period.users, i, user) {
+		if (user && xe_user_get_unless_zero(user)) {
+			if (!schedule_delayed_work(&user->delay_work,
+					msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL)))
+				xe_user_put(user);
+		}
+	}
+	mutex_unlock(&xe->work_period.lock);
+}
+
diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
index b13130cc9492..ded816be7334 100644
--- a/drivers/gpu/drm/xe/xe_user.h
+++ b/drivers/gpu/drm/xe/xe_user.h
@@ -11,9 +11,11 @@
 #include <linux/mutex.h>
 #include <linux/workqueue.h>
 
-#include "xe_device.h"
+#include "xe_device_types.h"
 
 
+#define XE_WORK_PERIOD_INTERVAL 500
+
 /**
  * This is a per process/user id structure for a xe device
  * client. It is allocated when a new process/app opens the
@@ -32,9 +34,9 @@ struct xe_user {
 	struct xe_device *xe;
 
 	/**
-	 * @filelist_lock: lock protecting the filelist
+	 * @filelist_lock: lock protecting this structure
 	 */
-	struct mutex filelist_lock;
+	struct mutex lock;
 
 	/**
 	 * @filelist: list of xe files belonging to this xe user
@@ -45,7 +47,7 @@ struct xe_user {
 	 * @work: work to emit the gpu work period event for this
 	 * xe user
 	 */
-	struct work_struct work;
+	struct delayed_work delay_work;
 
 	/**
 	 * @id: index of this user into the xe device users array
@@ -72,6 +74,17 @@ struct xe_user {
 
 int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid);
 
+void xe_user_cancel_workers(struct xe_device *xe);
+
+void xe_user_resume_workers(struct xe_device *xe);
+
+static inline struct xe_user *
+xe_user_get_unless_zero(struct xe_user *user)
+{
+	if (kref_get_unless_zero(&user->refcount))
+		return user;
+	return NULL;
+}
 
 static inline struct xe_user *
 xe_user_get(struct xe_user *user)
-- 
2.49.0

[PATCH v4 7/9] drm/xe: Add a Kconfig option for GPU work period

[Aakash Deep Sarkar]

Since this requirement is intended only for Android, there's
no reason to have it enabled by default in other distributions.
So, better to have it guarded by a Kconfig option.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 drivers/gpu/drm/xe/Makefile        |  2 +-
 drivers/gpu/drm/xe/xe_device.c     |  1 -
 drivers/gpu/drm/xe/xe_exec_queue.c |  5 +++--
 drivers/gpu/drm/xe/xe_user.h       | 27 ++++++++++++++++++++++++++-
 drivers/gpu/trace/Kconfig          | 12 ++++++++++++
 5 files changed, 42 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index ff6b584f3293..6fc23367bdfe 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -333,7 +333,7 @@ ifeq ($(CONFIG_DEBUG_FS),y)
 
 	xe-$(CONFIG_PCI_IOV) += xe_gt_sriov_pf_debugfs.o
 
-	xe-y += xe_user.o
+	xe-$(CONFIG_TRACE_GPU_WORK_PERIOD) += xe_user.o
 
 	xe-$(CONFIG_DRM_XE_DISPLAY) += \
 		i915-display/intel_display_debugfs.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 5569a27abb09..c34da72e5c9a 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -486,7 +486,6 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
 	xa_init_flags(&xe->usm.asid_to_vm, XA_FLAGS_ALLOC);
 
 	xa_init_flags(&xe->work_period.users, XA_FLAGS_ALLOC1);
-
 	mutex_init(&xe->work_period.lock);
 
 	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 6eb34c62c779..d5013d546348 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -915,9 +915,10 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q)
 	new_ts = xe_lrc_update_timestamp(lrc, &old_ts);
 	q->xef->run_ticks[q->class] += (new_ts - old_ts) * q->width;
 
-	// Accumulate the runtime in nanosec for this queue into the xe file.
+
+	// Accumulate the runtime in ns for this queue
 	q->xef->active_duration_ns +=
-		xe_gt_clock_interval_to_ns(gt, (new_ts - old_ts));
+			xe_gt_clock_interval_to_ns(gt, (new_ts - old_ts));
 
 	drm_dev_exit(idx);
 }
diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
index ded816be7334..e4b726f989a4 100644
--- a/drivers/gpu/drm/xe/xe_user.h
+++ b/drivers/gpu/drm/xe/xe_user.h
@@ -72,12 +72,38 @@ struct xe_user {
 	u64 last_timestamp_ns;
 };
 
+#if IS_ENABLED(CONFIG_TRACE_GPU_WORK_PERIOD)
+
 int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid);
 
 void xe_user_cancel_workers(struct xe_device *xe);
 
 void xe_user_resume_workers(struct xe_device *xe);
 
+void __xe_user_free(struct kref *kref);
+
+#else
+
+static inline
+int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid)
+{
+	return 0;
+}
+
+static inline void __xe_user_free(struct kref *kref)
+{
+}
+
+static inline void xe_user_cancel_workers(struct xe_device *xe)
+{
+}
+
+static inline void xe_user_resume_workers(struct xe_device *xe)
+{
+}
+
+#endif // CONFIG_TRACE_GPU_WORK_PERIOD
+
 static inline struct xe_user *
 xe_user_get_unless_zero(struct xe_user *user)
 {
@@ -93,7 +119,6 @@ xe_user_get(struct xe_user *user)
 	return user;
 }
 
-void __xe_user_free(struct kref *kref);
 
 static inline void xe_user_put(struct xe_user *user)
 {
diff --git a/drivers/gpu/trace/Kconfig b/drivers/gpu/trace/Kconfig
index cd3d19c4a201..34f2e08cf1be 100644
--- a/drivers/gpu/trace/Kconfig
+++ b/drivers/gpu/trace/Kconfig
@@ -11,3 +11,15 @@ config TRACE_GPU_MEM
 	  Tracepoint availability varies by GPU driver.
 
 	  If in doubt, say "N".
+
+config TRACE_GPU_WORK_PERIOD
+	bool "Enable GPU work period tracepoint"
+	default n
+	help
+	  Choose this option to enable tracepoint for tracking
+	  GPU usage based on the UID. Intended for performance
+	  profiling and required for Android.
+
+	  Tracepoint availability varies by GPU driver.
+
+	  If in doubt, say "N".
-- 
2.49.0

[PATCH v4 8/9] drm/xe: Handle xe_work_period destruction

[Aakash Deep Sarkar]

This adds the xe_work_period destruction procedure.
We iterate over all entries in the xe::work_period::users
xarray and cancel any pending delayed work. Then destroy
the xarray itself.

Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index c34da72e5c9a..e270f57a9750 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -419,6 +419,8 @@ static struct drm_driver driver = {
 static void xe_device_destroy(struct drm_device *dev, void *dummy)
 {
 	struct xe_device *xe = to_xe_device(dev);
+	struct xe_user *user = NULL;
+	unsigned long i;
 
 	xe_bo_dev_fini(&xe->bo_device);
 
@@ -434,6 +436,15 @@ static void xe_device_destroy(struct drm_device *dev, void *dummy)
 	if (xe->destroy_wq)
 		destroy_workqueue(xe->destroy_wq);
 
+
+	mutex_lock(&xe->work_period.lock);
+	xa_for_each(&xe->work_period.users, i, user) {
+		if (cancel_delayed_work_sync(&user->delay_work))
+			xe_user_put(user);
+	}
+	xa_destroy(&xe->work_period.users);
+	mutex_unlock(&xe->work_period.lock);
+
 	ttm_device_fini(&xe->ttm);
 }
 
-- 
2.49.0

[PATCH v4 9/9] Hack patch: Do not merge

[Aakash Deep Sarkar]

This patch is only added so that our files are built and tested
on the CI
---
 drivers/gpu/drm/xe/Makefile  | 2 +-
 drivers/gpu/drm/xe/xe_user.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 6fc23367bdfe..ff6b584f3293 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -333,7 +333,7 @@ ifeq ($(CONFIG_DEBUG_FS),y)
 
 	xe-$(CONFIG_PCI_IOV) += xe_gt_sriov_pf_debugfs.o
 
-	xe-$(CONFIG_TRACE_GPU_WORK_PERIOD) += xe_user.o
+	xe-y += xe_user.o
 
 	xe-$(CONFIG_DRM_XE_DISPLAY) += \
 		i915-display/intel_display_debugfs.o \
diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
index e4b726f989a4..ddc6c437a7ab 100644
--- a/drivers/gpu/drm/xe/xe_user.h
+++ b/drivers/gpu/drm/xe/xe_user.h
@@ -72,7 +72,7 @@ struct xe_user {
 	u64 last_timestamp_ns;
 };
 
-#if IS_ENABLED(CONFIG_TRACE_GPU_WORK_PERIOD)
+#if 1
 
 int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid);
 
-- 
2.49.0

Re: [PATCH v4 5/9] drm/xe: Handle xe_user creation and removal

[Jani Nikula]

On Fri, 26 Sep 2025, Aakash Deep Sarkar <aakash.deep.sarkar@intel.com> wrote:
> diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
> index e52f66d3f3b0..b13130cc9492 100644
> --- a/drivers/gpu/drm/xe/xe_user.h
> +++ b/drivers/gpu/drm/xe/xe_user.h
> @@ -8,8 +8,12 @@
>  
>  #include <linux/kref.h>
>  #include <linux/list.h>
> +#include <linux/mutex.h>
>  #include <linux/workqueue.h>
>  
> +#include "xe_device.h"

The changes in this patch don't require adding either of those
includes. Avoid including headers from headers if you can get away with
forward declarations.

BR,
Jani.

> +
> +
>  /**
>   * This is a per process/user id structure for a xe device
>   * client. It is allocated when a new process/app opens the
> @@ -43,6 +47,11 @@ struct xe_user {
>  	 */
>  	struct work_struct work;
>  
> +	/**
> +	 * @id: index of this user into the xe device users array
> +	 */
> +	u32 id;
> +
>  	/**
>  	 * @uid: user id for this xe_user
>  	 */
> @@ -61,7 +70,8 @@ struct xe_user {
>  	u64 last_timestamp_ns;
>  };
>  
> -struct xe_user *xe_user_alloc(void);
> +int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid);
> +
>  
>  static inline struct xe_user *
>  xe_user_get(struct xe_user *user)

-- 
Jani Nikula, Intel

Re: [PATCH v4 6/9] drm/xe: Implement xe_work_period_worker

[Jani Nikula]

On Fri, 26 Sep 2025, Aakash Deep Sarkar <aakash.deep.sarkar@intel.com> wrote:
> The work of collecting the GPU run time for a given
> xe_user and emitting its event, is done by the
> xe_work_period_worker kworker. At the time of creation
> of a new xe_user, we simultaneously start a delayed
> kworker thread. The delay of execution is set to be
> 500 ms. After the completion of the work, the kworker
> schedules itself for the next execution. This is done
> as long as the reference to the xe_user pointer is
> valid.
>
> During each execution cycle the xe_work_period_worker
> iterates over all the xe files in the xe_user::filelist
> and accumulate their corresponding GPU runtime into the
> xe_user::active_duration_ns; while also updating each of
> the xe_file::active_duration_ns. The total runtime for
> this uid in the current sampling period is the delta
> between the previous xe_user::active_duration_ns and
> the current xe_user::active_duration_ns.
>
> We also record the current timestamp at the end of each
> invocation to xe_work_period_worker function in the
> xe_user::last_timestamp_ns. The sampling period for this
> uid is the delta between the previous timestamp and the
> current timestamp.
>
> Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device.c |  13 ++--
>  drivers/gpu/drm/xe/xe_pm.c     |   5 ++
>  drivers/gpu/drm/xe/xe_user.c   | 127 +++++++++++++++++++++++++++++++--
>  drivers/gpu/drm/xe/xe_user.h   |  21 ++++--
>  4 files changed, 149 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 837c23784388..5569a27abb09 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -81,11 +81,9 @@ static int xe_file_open(struct drm_device *dev, struct drm_file *file)
>  {
>  	struct xe_device *xe = to_xe_device(dev);
>  	struct xe_drm_client *client;
> -	struct xe_user *user;
>  	struct xe_file *xef;
>  	int ret = -ENOMEM;
>  	int uid = -EINVAL;
> -	u32 idx;
>  	struct task_struct *task = NULL;
>  	const struct cred *cred = NULL;
>  
> @@ -142,11 +140,12 @@ static void xe_file_destroy(struct kref *ref)
>  	xe_drm_client_put(xef->client);
>  	kfree(xef->process_name);
>  
> -	mutex_lock(&xef->user->filelist_lock);
> -	list_del(&xef->user_link);
> -	mutex_unlock(&xef->user->filelist_lock);
> -
> -	xe_user_put(xef->user);
> +	if (xef->user) {
> +		mutex_lock(&xef->user->lock);
> +		list_del(&xef->user_link);
> +		xe_user_put(xef->user);
> +		mutex_unlock(&xef->user->lock);
> +	}
>  	kfree(xef);
>  }
>  
> diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
> index b7e3094f8acf..c7add2616189 100644
> --- a/drivers/gpu/drm/xe/xe_pm.c
> +++ b/drivers/gpu/drm/xe/xe_pm.c
> @@ -26,6 +26,7 @@
>  #include "xe_pxp.h"
>  #include "xe_sriov_vf_ccs.h"
>  #include "xe_trace.h"
> +#include "xe_user.h"
>  #include "xe_vm.h"
>  #include "xe_wa.h"
>  
> @@ -598,6 +599,8 @@ int xe_pm_runtime_suspend(struct xe_device *xe)
>  
>  	xe_i2c_pm_suspend(xe);
>  
> +	xe_user_cancel_workers(xe);
> +
>  	xe_rpm_lockmap_release(xe);
>  	xe_pm_write_callback_task(xe, NULL);
>  	return 0;
> @@ -650,6 +653,8 @@ int xe_pm_runtime_resume(struct xe_device *xe)
>  
>  	xe_i2c_pm_resume(xe, xe->d3cold.allowed);
>  
> +	xe_user_resume_workers(xe);
> +
>  	xe_irq_resume(xe);
>  
>  	for_each_gt(gt, xe, id)
> diff --git a/drivers/gpu/drm/xe/xe_user.c b/drivers/gpu/drm/xe/xe_user.c
> index 846c6451140b..19b28bcada0f 100644
> --- a/drivers/gpu/drm/xe/xe_user.c
> +++ b/drivers/gpu/drm/xe/xe_user.c
> @@ -6,17 +6,95 @@
>  #include <linux/slab.h>
>  #include <drm/drm_drv.h>
>  
> +#include "xe_assert.h"
> +#include "xe_device_types.h"
> +#include "xe_exec_queue.h"
> +#include "xe_pm.h"
>  #include "xe_user.h"
>  
> +#define CREATE_TRACE_POINTS
> +#include <trace/gpu_work_period.h>
> +
> +static inline void schedule_next_work(struct xe_device *xe, unsigned int id)
> +{
> +	struct xe_user *user;
> +
> +	mutex_lock(&xe->work_period.lock);
> +	user = xa_load(&xe->work_period.users, id);
> +	if (user && xe_user_get_unless_zero(user))
> +		schedule_delayed_work(&user->delay_work,
> +				msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL));
> +	mutex_unlock(&xe->work_period.lock);
> +}
>  /**
>   * worker thread to emit gpu work period event for this xe user
>   * @work: work instance for this xe user
>   *
>   * Return: void
>   */
> -static inline void work_period_worker(struct work_struct *work)
> +static void xe_work_period_worker(struct work_struct *work)
>  {
> -	//TODO: Implement this worker
> +	struct xe_user *user = container_of(work, struct xe_user, delay_work.work);
> +	struct xe_device *xe = user->xe;
> +	struct xe_file *xef;
> +	struct xe_exec_queue *q;
> +
> +	/*
> +	 * The GPU work period event requires the following parameters
> +	 *
> +	 * gpuid:           GPU index in case the platform has more than one GPU
> +	 * uid:             user id of the app
> +	 * start_time:      start time for the sampling period in nanosecs
> +	 * end_time:        end time for the sampling period in nanosecs
> +	 * active_duration: Total runtime in nanosecs for this uid in
> +	 *                  the current sampling period.
> +	 */
> +	u32 gpuid = 0, uid = user->uid, id = user->id;
> +	u64 start_time, end_time, active_duration;
> +	u64 last_active_duration, last_timestamp;
> +	unsigned long i;
> +
> +	mutex_lock(&user->lock);
> +
> +	// Save the last recorded active duration and timestamp
> +	last_active_duration = user->active_duration_ns;
> +	last_timestamp = user->last_timestamp_ns;
> +
> +	if (xe_pm_runtime_get_if_active(xe)) {
> +
> +		list_for_each_entry(xef, &user->filelist, user_link) {
> +
> +			wait_var_event(&xef->exec_queue.pending_removal,
> +			!atomic_read(&xef->exec_queue.pending_removal));
> +
> +			/* Accumulate all the exec queues from this file */
> +			mutex_lock(&xef->exec_queue.lock);
> +			xa_for_each(&xef->exec_queue.xa, i, q) {
> +				xe_exec_queue_get(q);
> +				mutex_unlock(&xef->exec_queue.lock);
> +
> +				xe_exec_queue_update_run_ticks(q);
> +
> +				mutex_lock(&xef->exec_queue.lock);
> +				xe_exec_queue_put(q);
> +			}
> +			mutex_unlock(&xef->exec_queue.lock);
> +			user->active_duration_ns += xef->active_duration_ns;
> +		}
> +
> +		xe_pm_runtime_put(xe);
> +
> +		start_time = last_timestamp + 1;
> +		end_time = ktime_get_raw_ns();
> +		active_duration = user->active_duration_ns - last_active_duration;
> +		trace_gpu_work_period(gpuid, uid, start_time, end_time, active_duration);
> +		user->last_timestamp_ns = end_time;
> +		xe_user_put(user);
> +	}
> +
> +	mutex_unlock(&user->lock);
> +
> +	schedule_next_work(xe, id);
>  }
>  
>  /**
> @@ -38,9 +116,9 @@ static struct xe_user *xe_user_alloc(void)
>  		return NULL;
>  
>  	kref_init(&user->refcount);
> -	mutex_init(&user->filelist_lock);
> +	mutex_init(&user->lock);
>  	INIT_LIST_HEAD(&user->filelist);
> -	INIT_WORK(&user->work, work_period_worker);
> +	INIT_DELAYED_WORK(&user->delay_work, xe_work_period_worker);
>  	return user;
>  }
>  
> @@ -120,12 +198,49 @@ int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid)
>  
>  		user->id = idx;
>  		drm_dev_get(&xe->drm);
> +
> +		xe_user_get(user);
> +		if (!schedule_delayed_work(&user->delay_work,
> +					msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL)))
> +			xe_user_put(user);
>  	}
>  
> -	mutex_lock(&user->filelist_lock);
> +	mutex_lock(&user->lock);
>  	list_add(&xef->user_link, &user->filelist);
> -	mutex_unlock(&user->filelist_lock);
> +	mutex_unlock(&user->lock);
>  	xef->user = user;
>  
>  	return 0;
>  }
> +
> +void xe_user_cancel_workers(struct xe_device *xe)
> +{
> +	struct xe_user *user = NULL;
> +	unsigned long i = 0;
> +
> +	mutex_lock(&xe->work_period.lock);
> +	xa_for_each(&xe->work_period.users, i, user) {
> +		if (user && xe_user_get_unless_zero(user)) {
> +			cancel_delayed_work_sync(&user->delay_work);
> +			xe_user_put(user);
> +		}
> +	}
> +	mutex_unlock(&xe->work_period.lock);
> +}
> +
> +void xe_user_resume_workers(struct xe_device *xe)
> +{
> +	struct xe_user *user = NULL;
> +	unsigned long i = 0;
> +
> +	mutex_lock(&xe->work_period.lock);
> +	xa_for_each(&xe->work_period.users, i, user) {
> +		if (user && xe_user_get_unless_zero(user)) {
> +			if (!schedule_delayed_work(&user->delay_work,
> +					msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL)))
> +				xe_user_put(user);
> +		}
> +	}
> +	mutex_unlock(&xe->work_period.lock);
> +}
> +
> diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
> index b13130cc9492..ded816be7334 100644
> --- a/drivers/gpu/drm/xe/xe_user.h
> +++ b/drivers/gpu/drm/xe/xe_user.h
> @@ -11,9 +11,11 @@
>  #include <linux/mutex.h>
>  #include <linux/workqueue.h>
>  
> -#include "xe_device.h"
> +#include "xe_device_types.h"

This shouldn't be needed, neither should.

>  
>  
> +#define XE_WORK_PERIOD_INTERVAL 500
> +
>  /**
>   * This is a per process/user id structure for a xe device
>   * client. It is allocated when a new process/app opens the
> @@ -32,9 +34,9 @@ struct xe_user {
>  	struct xe_device *xe;
>  
>  	/**
> -	 * @filelist_lock: lock protecting the filelist
> +	 * @filelist_lock: lock protecting this structure
>  	 */
> -	struct mutex filelist_lock;
> +	struct mutex lock;
>  
>  	/**
>  	 * @filelist: list of xe files belonging to this xe user
> @@ -45,7 +47,7 @@ struct xe_user {
>  	 * @work: work to emit the gpu work period event for this
>  	 * xe user
>  	 */
> -	struct work_struct work;
> +	struct delayed_work delay_work;
>  
>  	/**
>  	 * @id: index of this user into the xe device users array
> @@ -72,6 +74,17 @@ struct xe_user {
>  
>  int xe_user_init(struct xe_device *xe, struct xe_file *xef, unsigned int uid);
>  
> +void xe_user_cancel_workers(struct xe_device *xe);
> +
> +void xe_user_resume_workers(struct xe_device *xe);
> +
> +static inline struct xe_user *
> +xe_user_get_unless_zero(struct xe_user *user)
> +{
> +	if (kref_get_unless_zero(&user->refcount))
> +		return user;
> +	return NULL;
> +}

This is only ever used in xe_user.c. There's no need to add it to a
header.

>  
>  static inline struct xe_user *
>  xe_user_get(struct xe_user *user)

-- 
Jani Nikula, Intel

Re: [PATCH v4 8/9] drm/xe: Handle xe_work_period destruction

[Jani Nikula]

On Fri, 26 Sep 2025, Aakash Deep Sarkar <aakash.deep.sarkar@intel.com> wrote:
> This adds the xe_work_period destruction procedure.
> We iterate over all entries in the xe::work_period::users
> xarray and cancel any pending delayed work. Then destroy
> the xarray itself.
>
> Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index c34da72e5c9a..e270f57a9750 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -419,6 +419,8 @@ static struct drm_driver driver = {
>  static void xe_device_destroy(struct drm_device *dev, void *dummy)
>  {
>  	struct xe_device *xe = to_xe_device(dev);
> +	struct xe_user *user = NULL;
> +	unsigned long i;
>  
>  	xe_bo_dev_fini(&xe->bo_device);
>  
> @@ -434,6 +436,15 @@ static void xe_device_destroy(struct drm_device *dev, void *dummy)
>  	if (xe->destroy_wq)
>  		destroy_workqueue(xe->destroy_wq);
>  
> +
> +	mutex_lock(&xe->work_period.lock);
> +	xa_for_each(&xe->work_period.users, i, user) {
> +		if (cancel_delayed_work_sync(&user->delay_work))
> +			xe_user_put(user);
> +	}
> +	xa_destroy(&xe->work_period.users);
> +	mutex_unlock(&xe->work_period.lock);

These are all user details, why are they in xe_device_destroy()? Add a
new function that does this for you, and hide all the details away.

BR,
Jani.

> +
>  	ttm_device_fini(&xe->ttm);
>  }

-- 
Jani Nikula, Intel

✗ CI.checkpatch: warning for : Add GPU work period support for Xe driver (rev4)

[Patchwork]

== Series Details ==

Series: : Add GPU work period support for Xe driver (rev4)
URL   : https://patchwork.freedesktop.org/series/153341/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit cc9a35b299376e98d33059e9d8356b3754d5405f
Author: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
Date:   Fri Sep 26 10:45:20 2025 +0000

    Hack patch: Do not merge
    
    This patch is only added so that our files are built and tested
    on the CI
+ /mt/dim checkpatch d557b14c00c4ab027e66c1c7bf512cf479ff8c24 drm-intel
9834b0e91419 drm/xe: Add a new xe_user structure
-:45: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#45: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 148 lines checked
1cb7ee31f5c1 drm/xe: Add xe_gt_clock_interval_to_ns function
f9b5b4375416 drm/xe: Add a trace point for GPU work period
-:36: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#36: 
new file mode 100644

-:55: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#55: FILE: include/trace/gpu_work_period.h:15:
+TRACE_EVENT(gpu_work_period,
+

-:56: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#56: FILE: include/trace/gpu_work_period.h:16:
+	TP_PROTO(

-:66: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#66: FILE: include/trace/gpu_work_period.h:26:
+	TP_STRUCT__entry(

-:74: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#74: FILE: include/trace/gpu_work_period.h:34:
+	TP_fast_assign(

-:83: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#83: FILE: include/trace/gpu_work_period.h:43:
+	TP_printk("gpu_id=%u uid=%u start_time_ns=%llu end_time_ns=%llu total_active_duration_ns=%llu",
+		__entry->gpu_id,

total: 0 errors, 1 warnings, 5 checks, 59 lines checked
d3dc915a407f drm/xe: Modify xe_exec_queue_update_run_ticks
a506ede6f6e4 drm/xe: Handle xe_user creation and removal
-:69: CHECK:SPACING: No space is necessary after a cast
#69: FILE: drivers/gpu/drm/xe/xe_device.c:121:
+			uid = (unsigned int) cred->euid.val;

-:219: CHECK:LINE_SPACING: Please don't use multiple blank lines
#219: FILE: drivers/gpu/drm/xe/xe_user.c:109:
+
+

-:255: CHECK:LINE_SPACING: Please don't use multiple blank lines
#255: FILE: drivers/gpu/drm/xe/xe_user.h:16:
+
+

total: 0 errors, 0 warnings, 3 checks, 218 lines checked
8e8e744db2a3 drm/xe: Implement xe_work_period_worker
-:122: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#122: FILE: drivers/gpu/drm/xe/xe_user.c:26:
+		schedule_delayed_work(&user->delay_work,
+				msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL));

-:162: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#162: FILE: drivers/gpu/drm/xe/xe_user.c:64:
+	if (xe_pm_runtime_get_if_active(xe)) {
+

-:164: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#164: FILE: drivers/gpu/drm/xe/xe_user.c:66:
+		list_for_each_entry(xef, &user->filelist, user_link) {
+

-:166: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#166: FILE: drivers/gpu/drm/xe/xe_user.c:68:
+			wait_var_event(&xef->exec_queue.pending_removal,
+			!atomic_read(&xef->exec_queue.pending_removal));

-:218: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#218: FILE: drivers/gpu/drm/xe/xe_user.c:204:
+		if (!schedule_delayed_work(&user->delay_work,
+					msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL)))

-:256: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#256: FILE: drivers/gpu/drm/xe/xe_user.c:240:
+			if (!schedule_delayed_work(&user->delay_work,
+					msecs_to_jiffies(XE_WORK_PERIOD_INTERVAL)))

-:288: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#288: FILE: drivers/gpu/drm/xe/xe_user.h:39:
+	struct mutex lock;

total: 0 errors, 0 warnings, 7 checks, 258 lines checked
48f9d6fc544d drm/xe: Add a Kconfig option for GPU work period
-:46: CHECK:LINE_SPACING: Please don't use multiple blank lines
#46: FILE: drivers/gpu/drm/xe/xe_exec_queue.c:918:
 
+

total: 0 errors, 0 warnings, 1 checks, 87 lines checked
93b8831e528a drm/xe: Handle xe_work_period destruction
-:30: CHECK:LINE_SPACING: Please don't use multiple blank lines
#30: FILE: drivers/gpu/drm/xe/xe_device.c:439:
 
+

total: 0 errors, 0 warnings, 1 checks, 23 lines checked
cc9a35b29937 Hack patch: Do not merge
-:31: WARNING:IF_1: Consider removing the #if 1 and its #endif
#31: FILE: drivers/gpu/drm/xe/xe_user.h:75:
+#if 1

-:34: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)

total: 1 errors, 1 warnings, 0 checks, 16 lines checked

✓ CI.KUnit: success for : Add GPU work period support for Xe driver (rev4)

[Patchwork]

== Series Details ==

Series: : Add GPU work period support for Xe driver (rev4)
URL   : https://patchwork.freedesktop.org/series/153341/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:59:54] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:59:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:00:27] Starting KUnit Kernel (1/1)...
[12:00:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:00:27] ================== guc_buf (11 subtests) ===================
[12:00:27] [PASSED] test_smallest
[12:00:27] [PASSED] test_largest
[12:00:27] [PASSED] test_granular
[12:00:27] [PASSED] test_unique
[12:00:27] [PASSED] test_overlap
[12:00:27] [PASSED] test_reusable
[12:00:27] [PASSED] test_too_big
[12:00:27] [PASSED] test_flush
[12:00:27] [PASSED] test_lookup
[12:00:27] [PASSED] test_data
[12:00:27] [PASSED] test_class
[12:00:27] ===================== [PASSED] guc_buf =====================
[12:00:27] =================== guc_dbm (7 subtests) ===================
[12:00:27] [PASSED] test_empty
[12:00:27] [PASSED] test_default
[12:00:27] ======================== test_size  ========================
[12:00:27] [PASSED] 4
[12:00:27] [PASSED] 8
[12:00:27] [PASSED] 32
[12:00:27] [PASSED] 256
[12:00:27] ==================== [PASSED] test_size ====================
[12:00:27] ======================= test_reuse  ========================
[12:00:27] [PASSED] 4
[12:00:27] [PASSED] 8
[12:00:27] [PASSED] 32
[12:00:27] [PASSED] 256
[12:00:27] =================== [PASSED] test_reuse ====================
[12:00:27] =================== test_range_overlap  ====================
[12:00:27] [PASSED] 4
[12:00:27] [PASSED] 8
[12:00:27] [PASSED] 32
[12:00:27] [PASSED] 256
[12:00:27] =============== [PASSED] test_range_overlap ================
[12:00:27] =================== test_range_compact  ====================
[12:00:27] [PASSED] 4
[12:00:27] [PASSED] 8
[12:00:27] [PASSED] 32
[12:00:27] [PASSED] 256
[12:00:27] =============== [PASSED] test_range_compact ================
[12:00:27] ==================== test_range_spare  =====================
[12:00:27] [PASSED] 4
[12:00:27] [PASSED] 8
[12:00:27] [PASSED] 32
[12:00:27] [PASSED] 256
[12:00:27] ================ [PASSED] test_range_spare =================
[12:00:27] ===================== [PASSED] guc_dbm =====================
[12:00:27] =================== guc_idm (6 subtests) ===================
[12:00:27] [PASSED] bad_init
[12:00:27] [PASSED] no_init
[12:00:27] [PASSED] init_fini
[12:00:27] [PASSED] check_used
[12:00:27] [PASSED] check_quota
[12:00:27] [PASSED] check_all
[12:00:27] ===================== [PASSED] guc_idm =====================
[12:00:27] ================== no_relay (3 subtests) ===================
[12:00:27] [PASSED] xe_drops_guc2pf_if_not_ready
[12:00:27] [PASSED] xe_drops_guc2vf_if_not_ready
[12:00:27] [PASSED] xe_rejects_send_if_not_ready
[12:00:27] ==================== [PASSED] no_relay =====================
[12:00:27] ================== pf_relay (14 subtests) ==================
[12:00:27] [PASSED] pf_rejects_guc2pf_too_short
[12:00:27] [PASSED] pf_rejects_guc2pf_too_long
[12:00:27] [PASSED] pf_rejects_guc2pf_no_payload
[12:00:27] [PASSED] pf_fails_no_payload
[12:00:27] [PASSED] pf_fails_bad_origin
[12:00:27] [PASSED] pf_fails_bad_type
[12:00:27] [PASSED] pf_txn_reports_error
[12:00:27] [PASSED] pf_txn_sends_pf2guc
[12:00:27] [PASSED] pf_sends_pf2guc
[12:00:27] [SKIPPED] pf_loopback_nop
[12:00:27] [SKIPPED] pf_loopback_echo
[12:00:27] [SKIPPED] pf_loopback_fail
[12:00:27] [SKIPPED] pf_loopback_busy
[12:00:27] [SKIPPED] pf_loopback_retry
[12:00:27] ==================== [PASSED] pf_relay =====================
[12:00:27] ================== vf_relay (3 subtests) ===================
[12:00:27] [PASSED] vf_rejects_guc2vf_too_short
[12:00:27] [PASSED] vf_rejects_guc2vf_too_long
[12:00:27] [PASSED] vf_rejects_guc2vf_no_payload
[12:00:27] ==================== [PASSED] vf_relay =====================
[12:00:27] ===================== lmtt (1 subtest) =====================
[12:00:27] ======================== test_ops  =========================
[12:00:27] [PASSED] 2-level
[12:00:27] [PASSED] multi-level
[12:00:27] ==================== [PASSED] test_ops =====================
[12:00:27] ====================== [PASSED] lmtt =======================
[12:00:27] ================= pf_service (11 subtests) =================
[12:00:27] [PASSED] pf_negotiate_any
[12:00:27] [PASSED] pf_negotiate_base_match
[12:00:27] [PASSED] pf_negotiate_base_newer
[12:00:27] [PASSED] pf_negotiate_base_next
[12:00:27] [SKIPPED] pf_negotiate_base_older
[12:00:27] [PASSED] pf_negotiate_base_prev
[12:00:27] [PASSED] pf_negotiate_latest_match
[12:00:27] [PASSED] pf_negotiate_latest_newer
[12:00:27] [PASSED] pf_negotiate_latest_next
[12:00:27] [SKIPPED] pf_negotiate_latest_older
[12:00:27] [SKIPPED] pf_negotiate_latest_prev
[12:00:27] =================== [PASSED] pf_service ====================
[12:00:27] ================= xe_guc_g2g (2 subtests) ==================
[12:00:27] ============== xe_live_guc_g2g_kunit_default  ==============
[12:00:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:00:27] ============== xe_live_guc_g2g_kunit_allmem  ===============
[12:00:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:00:27] =================== [SKIPPED] xe_guc_g2g ===================
[12:00:27] =================== xe_mocs (2 subtests) ===================
[12:00:27] ================ xe_live_mocs_kernel_kunit  ================
[12:00:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:00:27] ================ xe_live_mocs_reset_kunit  =================
[12:00:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:00:27] ==================== [SKIPPED] xe_mocs =====================
[12:00:27] ================= xe_migrate (2 subtests) ==================
[12:00:27] ================= xe_migrate_sanity_kunit  =================
[12:00:27] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:00:27] ================== xe_validate_ccs_kunit  ==================
[12:00:27] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:00:27] =================== [SKIPPED] xe_migrate ===================
[12:00:27] ================== xe_dma_buf (1 subtest) ==================
[12:00:27] ==================== xe_dma_buf_kunit  =====================
[12:00:27] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:00:27] =================== [SKIPPED] xe_dma_buf ===================
[12:00:27] ================= xe_bo_shrink (1 subtest) =================
[12:00:27] =================== xe_bo_shrink_kunit  ====================
[12:00:27] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:00:27] ================== [SKIPPED] xe_bo_shrink ==================
[12:00:27] ==================== xe_bo (2 subtests) ====================
[12:00:27] ================== xe_ccs_migrate_kunit  ===================
[12:00:27] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:00:27] ==================== xe_bo_evict_kunit  ====================
[12:00:27] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:00:27] ===================== [SKIPPED] xe_bo ======================
[12:00:27] ==================== args (11 subtests) ====================
[12:00:27] [PASSED] count_args_test
[12:00:27] [PASSED] call_args_example
[12:00:27] [PASSED] call_args_test
[12:00:27] [PASSED] drop_first_arg_example
[12:00:27] [PASSED] drop_first_arg_test
[12:00:27] [PASSED] first_arg_example
[12:00:27] [PASSED] first_arg_test
[12:00:27] [PASSED] last_arg_example
[12:00:27] [PASSED] last_arg_test
[12:00:27] [PASSED] pick_arg_example
[12:00:27] [PASSED] sep_comma_example
[12:00:27] ====================== [PASSED] args =======================
[12:00:27] =================== xe_pci (3 subtests) ====================
[12:00:27] ==================== check_graphics_ip  ====================
[12:00:27] [PASSED] 12.00 Xe_LP
[12:00:27] [PASSED] 12.10 Xe_LP+
[12:00:27] [PASSED] 12.55 Xe_HPG
[12:00:27] [PASSED] 12.60 Xe_HPC
[12:00:27] [PASSED] 12.70 Xe_LPG
[12:00:27] [PASSED] 12.71 Xe_LPG
[12:00:27] [PASSED] 12.74 Xe_LPG+
[12:00:27] [PASSED] 20.01 Xe2_HPG
[12:00:27] [PASSED] 20.02 Xe2_HPG
[12:00:27] [PASSED] 20.04 Xe2_LPG
[12:00:27] [PASSED] 30.00 Xe3_LPG
[12:00:27] [PASSED] 30.01 Xe3_LPG
[12:00:27] [PASSED] 30.03 Xe3_LPG
[12:00:27] ================ [PASSED] check_graphics_ip ================
[12:00:27] ===================== check_media_ip  ======================
[12:00:27] [PASSED] 12.00 Xe_M
[12:00:27] [PASSED] 12.55 Xe_HPM
[12:00:27] [PASSED] 13.00 Xe_LPM+
[12:00:27] [PASSED] 13.01 Xe2_HPM
[12:00:27] [PASSED] 20.00 Xe2_LPM
[12:00:27] [PASSED] 30.00 Xe3_LPM
[12:00:27] [PASSED] 30.02 Xe3_LPM
[12:00:27] ================= [PASSED] check_media_ip ==================
[12:00:27] ================= check_platform_gt_count  =================
[12:00:27] [PASSED] 0x9A60 (TIGERLAKE)
[12:00:27] [PASSED] 0x9A68 (TIGERLAKE)
[12:00:27] [PASSED] 0x9A70 (TIGERLAKE)
[12:00:27] [PASSED] 0x9A40 (TIGERLAKE)
[12:00:27] [PASSED] 0x9A49 (TIGERLAKE)
[12:00:27] [PASSED] 0x9A59 (TIGERLAKE)
[12:00:27] [PASSED] 0x9A78 (TIGERLAKE)
[12:00:27] [PASSED] 0x9AC0 (TIGERLAKE)
[12:00:27] [PASSED] 0x9AC9 (TIGERLAKE)
[12:00:27] [PASSED] 0x9AD9 (TIGERLAKE)
[12:00:27] [PASSED] 0x9AF8 (TIGERLAKE)
[12:00:27] [PASSED] 0x4C80 (ROCKETLAKE)
[12:00:27] [PASSED] 0x4C8A (ROCKETLAKE)
[12:00:27] [PASSED] 0x4C8B (ROCKETLAKE)
[12:00:27] [PASSED] 0x4C8C (ROCKETLAKE)
[12:00:27] [PASSED] 0x4C90 (ROCKETLAKE)
[12:00:27] [PASSED] 0x4C9A (ROCKETLAKE)
[12:00:27] [PASSED] 0x4680 (ALDERLAKE_S)
[12:00:27] [PASSED] 0x4682 (ALDERLAKE_S)
[12:00:27] [PASSED] 0x4688 (ALDERLAKE_S)
[12:00:27] [PASSED] 0x468A (ALDERLAKE_S)
[12:00:27] [PASSED] 0x468B (ALDERLAKE_S)
[12:00:27] [PASSED] 0x4690 (ALDERLAKE_S)
[12:00:27] [PASSED] 0x4692 (ALDERLAKE_S)
[12:00:27] [PASSED] 0x4693 (ALDERLAKE_S)
[12:00:27] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46AA (ALDERLAKE_P)
[12:00:27] [PASSED] 0x462A (ALDERLAKE_P)
[12:00:27] [PASSED] 0x4626 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x4628 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:00:27] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:00:27] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:00:27] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:00:27] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:00:27] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:00:27] [PASSED] 0xA721 (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA720 (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:00:27] [PASSED] 0xA780 (ALDERLAKE_S)
[12:00:27] [PASSED] 0xA781 (ALDERLAKE_S)
[12:00:27] [PASSED] 0xA782 (ALDERLAKE_S)
[12:00:27] [PASSED] 0xA783 (ALDERLAKE_S)
[12:00:27] [PASSED] 0xA788 (ALDERLAKE_S)
[12:00:27] [PASSED] 0xA789 (ALDERLAKE_S)
[12:00:27] [PASSED] 0xA78A (ALDERLAKE_S)
[12:00:27] [PASSED] 0xA78B (ALDERLAKE_S)
[12:00:27] [PASSED] 0x4905 (DG1)
[12:00:27] [PASSED] 0x4906 (DG1)
[12:00:27] [PASSED] 0x4907 (DG1)
[12:00:27] [PASSED] 0x4908 (DG1)
[12:00:27] [PASSED] 0x4909 (DG1)
[12:00:27] [PASSED] 0x56C0 (DG2)
[12:00:27] [PASSED] 0x56C2 (DG2)
[12:00:27] [PASSED] 0x56C1 (DG2)
[12:00:27] [PASSED] 0x7D51 (METEORLAKE)
[12:00:27] [PASSED] 0x7DD1 (METEORLAKE)
[12:00:27] [PASSED] 0x7D41 (METEORLAKE)
[12:00:27] [PASSED] 0x7D67 (METEORLAKE)
[12:00:27] [PASSED] 0xB640 (METEORLAKE)
[12:00:27] [PASSED] 0x56A0 (DG2)
[12:00:27] [PASSED] 0x56A1 (DG2)
[12:00:27] [PASSED] 0x56A2 (DG2)
[12:00:27] [PASSED] 0x56BE (DG2)
[12:00:27] [PASSED] 0x56BF (DG2)
[12:00:27] [PASSED] 0x5690 (DG2)
[12:00:27] [PASSED] 0x5691 (DG2)
[12:00:27] [PASSED] 0x5692 (DG2)
[12:00:27] [PASSED] 0x56A5 (DG2)
[12:00:27] [PASSED] 0x56A6 (DG2)
[12:00:27] [PASSED] 0x56B0 (DG2)
[12:00:27] [PASSED] 0x56B1 (DG2)
[12:00:27] [PASSED] 0x56BA (DG2)
[12:00:27] [PASSED] 0x56BB (DG2)
[12:00:27] [PASSED] 0x56BC (DG2)
[12:00:27] [PASSED] 0x56BD (DG2)
[12:00:27] [PASSED] 0x5693 (DG2)
[12:00:27] [PASSED] 0x5694 (DG2)
[12:00:27] [PASSED] 0x5695 (DG2)
[12:00:27] [PASSED] 0x56A3 (DG2)
[12:00:27] [PASSED] 0x56A4 (DG2)
[12:00:27] [PASSED] 0x56B2 (DG2)
[12:00:27] [PASSED] 0x56B3 (DG2)
[12:00:27] [PASSED] 0x5696 (DG2)
[12:00:27] [PASSED] 0x5697 (DG2)
[12:00:27] [PASSED] 0xB69 (PVC)
[12:00:27] [PASSED] 0xB6E (PVC)
[12:00:27] [PASSED] 0xBD4 (PVC)
[12:00:27] [PASSED] 0xBD5 (PVC)
[12:00:27] [PASSED] 0xBD6 (PVC)
[12:00:27] [PASSED] 0xBD7 (PVC)
[12:00:27] [PASSED] 0xBD8 (PVC)
[12:00:27] [PASSED] 0xBD9 (PVC)
[12:00:27] [PASSED] 0xBDA (PVC)
[12:00:27] [PASSED] 0xBDB (PVC)
[12:00:27] [PASSED] 0xBE0 (PVC)
[12:00:27] [PASSED] 0xBE1 (PVC)
[12:00:27] [PASSED] 0xBE5 (PVC)
[12:00:27] [PASSED] 0x7D40 (METEORLAKE)
[12:00:27] [PASSED] 0x7D45 (METEORLAKE)
[12:00:27] [PASSED] 0x7D55 (METEORLAKE)
[12:00:27] [PASSED] 0x7D60 (METEORLAKE)
[12:00:27] [PASSED] 0x7DD5 (METEORLAKE)
[12:00:27] [PASSED] 0x6420 (LUNARLAKE)
[12:00:27] [PASSED] 0x64A0 (LUNARLAKE)
[12:00:27] [PASSED] 0x64B0 (LUNARLAKE)
[12:00:27] [PASSED] 0xE202 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE209 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE20B (BATTLEMAGE)
[12:00:27] [PASSED] 0xE20C (BATTLEMAGE)
[12:00:27] [PASSED] 0xE20D (BATTLEMAGE)
[12:00:27] [PASSED] 0xE210 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE211 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE212 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE216 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE220 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE221 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE222 (BATTLEMAGE)
[12:00:27] [PASSED] 0xE223 (BATTLEMAGE)
[12:00:27] [PASSED] 0xB080 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB081 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB082 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB083 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB084 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB085 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB086 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB087 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB08F (PANTHERLAKE)
[12:00:27] [PASSED] 0xB090 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:00:27] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:00:27] [PASSED] 0xFD80 (PANTHERLAKE)
[12:00:27] [PASSED] 0xFD81 (PANTHERLAKE)
[12:00:27] ============= [PASSED] check_platform_gt_count =============
[12:00:27] ===================== [PASSED] xe_pci ======================
[12:00:27] =================== xe_rtp (2 subtests) ====================
[12:00:27] =============== xe_rtp_process_to_sr_tests  ================
[12:00:27] [PASSED] coalesce-same-reg
[12:00:27] [PASSED] no-match-no-add
[12:00:27] [PASSED] match-or
[12:00:27] [PASSED] match-or-xfail
[12:00:27] [PASSED] no-match-no-add-multiple-rules
[12:00:27] [PASSED] two-regs-two-entries
[12:00:27] [PASSED] clr-one-set-other
[12:00:27] [PASSED] set-field
[12:00:27] [PASSED] conflict-duplicate
[12:00:27] [PASSED] conflict-not-disjoint
[12:00:27] [PASSED] conflict-reg-type
[12:00:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:00:27] ================== xe_rtp_process_tests  ===================
[12:00:27] [PASSED] active1
[12:00:27] [PASSED] active2
[12:00:27] [PASSED] active-inactive
[12:00:27] [PASSED] inactive-active
[12:00:27] [PASSED] inactive-1st_or_active-inactive
[12:00:27] [PASSED] inactive-2nd_or_active-inactive
[12:00:27] [PASSED] inactive-last_or_active-inactive
[12:00:27] [PASSED] inactive-no_or_active-inactive
[12:00:27] ============== [PASSED] xe_rtp_process_tests ===============
[12:00:27] ===================== [PASSED] xe_rtp ======================
[12:00:27] ==================== xe_wa (1 subtest) =====================
[12:00:27] ======================== xe_wa_gt  =========================
[12:00:27] [PASSED] TIGERLAKE B0
[12:00:27] [PASSED] DG1 A0
[12:00:27] [PASSED] DG1 B0
[12:00:27] [PASSED] ALDERLAKE_S A0
[12:00:27] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[12:00:27] [PASSED] ALDERLAKE_S C0
[12:00:27] [PASSED] ALDERLAKE_S D0
[12:00:27] [PASSED] ALDERLAKE_P A0
[12:00:27] [PASSED] ALDERLAKE_P B0
[12:00:27] [PASSED] ALDERLAKE_P C0
[12:00:27] [PASSED] ALDERLAKE_S RPLS D0
[12:00:27] [PASSED] ALDERLAKE_P RPLU E0
[12:00:27] [PASSED] DG2 G10 C0
[12:00:27] [PASSED] DG2 G11 B1
[12:00:27] [PASSED] DG2 G12 A1
[12:00:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:00:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:00:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:00:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:00:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:00:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:00:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:00:27] ==================== [PASSED] xe_wa_gt =====================
[12:00:27] ====================== [PASSED] xe_wa ======================
[12:00:27] ============================================================
[12:00:27] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[12:00:27] Elapsed time: 33.885s total, 4.266s configuring, 29.252s building, 0.327s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:00:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:00:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:00:53] Starting KUnit Kernel (1/1)...
[12:00:53] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:00:53] ============ drm_test_pick_cmdline (2 subtests) ============
[12:00:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:00:53] =============== drm_test_pick_cmdline_named  ===============
[12:00:53] [PASSED] NTSC
[12:00:53] [PASSED] NTSC-J
[12:00:53] [PASSED] PAL
[12:00:53] [PASSED] PAL-M
[12:00:53] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:00:53] ============== [PASSED] drm_test_pick_cmdline ==============
[12:00:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:00:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:00:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:00:53] =========== drm_validate_clone_mode (2 subtests) ===========
[12:00:53] ============== drm_test_check_in_clone_mode  ===============
[12:00:53] [PASSED] in_clone_mode
[12:00:53] [PASSED] not_in_clone_mode
[12:00:53] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:00:53] =============== drm_test_check_valid_clones  ===============
[12:00:53] [PASSED] not_in_clone_mode
[12:00:53] [PASSED] valid_clone
[12:00:53] [PASSED] invalid_clone
[12:00:53] =========== [PASSED] drm_test_check_valid_clones ===========
[12:00:53] ============= [PASSED] drm_validate_clone_mode =============
[12:00:53] ============= drm_validate_modeset (1 subtest) =============
[12:00:53] [PASSED] drm_test_check_connector_changed_modeset
[12:00:53] ============== [PASSED] drm_validate_modeset ===============
[12:00:53] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:00:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:00:53] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:00:53] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:00:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:00:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:00:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:00:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:00:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:00:53] ============== drm_bridge_alloc (2 subtests) ===============
[12:00:53] [PASSED] drm_test_drm_bridge_alloc_basic
[12:00:53] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:00:53] ================ [PASSED] drm_bridge_alloc =================
[12:00:53] ================== drm_buddy (7 subtests) ==================
[12:00:53] [PASSED] drm_test_buddy_alloc_limit
[12:00:53] [PASSED] drm_test_buddy_alloc_optimistic
[12:00:53] [PASSED] drm_test_buddy_alloc_pessimistic
[12:00:53] [PASSED] drm_test_buddy_alloc_pathological
[12:00:53] [PASSED] drm_test_buddy_alloc_contiguous
[12:00:53] [PASSED] drm_test_buddy_alloc_clear
[12:00:53] [PASSED] drm_test_buddy_alloc_range_bias
[12:00:53] ==================== [PASSED] drm_buddy ====================
[12:00:53] ============= drm_cmdline_parser (40 subtests) =============
[12:00:53] [PASSED] drm_test_cmdline_force_d_only
[12:00:53] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:00:53] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:00:53] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:00:53] [PASSED] drm_test_cmdline_force_e_only
[12:00:53] [PASSED] drm_test_cmdline_res
[12:00:53] [PASSED] drm_test_cmdline_res_vesa
[12:00:53] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:00:53] [PASSED] drm_test_cmdline_res_rblank
[12:00:53] [PASSED] drm_test_cmdline_res_bpp
[12:00:53] [PASSED] drm_test_cmdline_res_refresh
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:00:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:00:53] [PASSED] drm_test_cmdline_res_margins_force_on
[12:00:53] [PASSED] drm_test_cmdline_res_vesa_margins
[12:00:53] [PASSED] drm_test_cmdline_name
[12:00:53] [PASSED] drm_test_cmdline_name_bpp
[12:00:53] [PASSED] drm_test_cmdline_name_option
[12:00:53] [PASSED] drm_test_cmdline_name_bpp_option
[12:00:53] [PASSED] drm_test_cmdline_rotate_0
[12:00:53] [PASSED] drm_test_cmdline_rotate_90
[12:00:53] [PASSED] drm_test_cmdline_rotate_180
[12:00:53] [PASSED] drm_test_cmdline_rotate_270
[12:00:53] [PASSED] drm_test_cmdline_hmirror
[12:00:53] [PASSED] drm_test_cmdline_vmirror
[12:00:53] [PASSED] drm_test_cmdline_margin_options
[12:00:53] [PASSED] drm_test_cmdline_multiple_options
[12:00:53] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:00:53] [PASSED] drm_test_cmdline_extra_and_option
[12:00:53] [PASSED] drm_test_cmdline_freestanding_options
[12:00:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:00:53] [PASSED] drm_test_cmdline_panel_orientation
[12:00:53] ================ drm_test_cmdline_invalid  =================
[12:00:53] [PASSED] margin_only
[12:00:53] [PASSED] interlace_only
[12:00:53] [PASSED] res_missing_x
[12:00:53] [PASSED] res_missing_y
[12:00:53] [PASSED] res_bad_y
[12:00:53] [PASSED] res_missing_y_bpp
[12:00:53] [PASSED] res_bad_bpp
[12:00:53] [PASSED] res_bad_refresh
[12:00:53] [PASSED] res_bpp_refresh_force_on_off
[12:00:53] [PASSED] res_invalid_mode
[12:00:53] [PASSED] res_bpp_wrong_place_mode
[12:00:53] [PASSED] name_bpp_refresh
[12:00:53] [PASSED] name_refresh
[12:00:53] [PASSED] name_refresh_wrong_mode
[12:00:53] [PASSED] name_refresh_invalid_mode
[12:00:53] [PASSED] rotate_multiple
[12:00:53] [PASSED] rotate_invalid_val
[12:00:53] [PASSED] rotate_truncated
[12:00:53] [PASSED] invalid_option
[12:00:53] [PASSED] invalid_tv_option
[12:00:53] [PASSED] truncated_tv_option
[12:00:53] ============ [PASSED] drm_test_cmdline_invalid =============
[12:00:53] =============== drm_test_cmdline_tv_options  ===============
[12:00:53] [PASSED] NTSC
[12:00:53] [PASSED] NTSC_443
[12:00:53] [PASSED] NTSC_J
[12:00:53] [PASSED] PAL
[12:00:53] [PASSED] PAL_M
[12:00:53] [PASSED] PAL_N
[12:00:53] [PASSED] SECAM
[12:00:53] [PASSED] MONO_525
[12:00:53] [PASSED] MONO_625
[12:00:53] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:00:53] =============== [PASSED] drm_cmdline_parser ================
[12:00:53] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:00:53] [PASSED] drm_test_connector_hdmi_init_valid
[12:00:53] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:00:53] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:00:53] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:00:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:00:53] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:00:53] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:00:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:00:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[12:00:53] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:00:53] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:00:53] [PASSED] supported_formats=0x3 yuv420_allowed=1
[12:00:53] [PASSED] supported_formats=0x3 yuv420_allowed=0
[12:00:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:00:53] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:00:53] [PASSED] drm_test_connector_hdmi_init_null_product
[12:00:53] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:00:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:00:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:00:53] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:00:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:00:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:00:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:00:53] ========= drm_test_connector_hdmi_init_type_valid  =========
[12:00:53] [PASSED] HDMI-A
[12:00:53] [PASSED] HDMI-B
[12:00:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:00:53] ======== drm_test_connector_hdmi_init_type_invalid  ========
[12:00:53] [PASSED] Unknown
[12:00:53] [PASSED] VGA
[12:00:53] [PASSED] DVI-I
[12:00:53] [PASSED] DVI-D
[12:00:53] [PASSED] DVI-A
[12:00:53] [PASSED] Composite
[12:00:53] [PASSED] SVIDEO
[12:00:53] [PASSED] LVDS
[12:00:53] [PASSED] Component
[12:00:53] [PASSED] DIN
[12:00:53] [PASSED] DP
[12:00:53] [PASSED] TV
[12:00:53] [PASSED] eDP
[12:00:53] [PASSED] Virtual
[12:00:53] [PASSED] DSI
[12:00:53] [PASSED] DPI
[12:00:53] [PASSED] Writeback
[12:00:53] [PASSED] SPI
[12:00:53] [PASSED] USB
[12:00:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:00:53] ============ [PASSED] drmm_connector_hdmi_init =============
[12:00:53] ============= drmm_connector_init (3 subtests) =============
[12:00:53] [PASSED] drm_test_drmm_connector_init
[12:00:53] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:00:53] ========= drm_test_drmm_connector_init_type_valid  =========
[12:00:53] [PASSED] Unknown
[12:00:53] [PASSED] VGA
[12:00:53] [PASSED] DVI-I
[12:00:53] [PASSED] DVI-D
[12:00:53] [PASSED] DVI-A
[12:00:53] [PASSED] Composite
[12:00:53] [PASSED] SVIDEO
[12:00:53] [PASSED] LVDS
[12:00:53] [PASSED] Component
[12:00:53] [PASSED] DIN
[12:00:53] [PASSED] DP
[12:00:53] [PASSED] HDMI-A
[12:00:53] [PASSED] HDMI-B
[12:00:53] [PASSED] TV
[12:00:53] [PASSED] eDP
[12:00:53] [PASSED] Virtual
[12:00:53] [PASSED] DSI
[12:00:53] [PASSED] DPI
[12:00:53] [PASSED] Writeback
[12:00:53] [PASSED] SPI
[12:00:53] [PASSED] USB
[12:00:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:00:53] =============== [PASSED] drmm_connector_init ===============
[12:00:53] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_init
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:00:53] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[12:00:53] [PASSED] Unknown
[12:00:53] [PASSED] VGA
[12:00:53] [PASSED] DVI-I
[12:00:53] [PASSED] DVI-D
[12:00:53] [PASSED] DVI-A
[12:00:53] [PASSED] Composite
[12:00:53] [PASSED] SVIDEO
[12:00:53] [PASSED] LVDS
[12:00:53] [PASSED] Component
[12:00:53] [PASSED] DIN
[12:00:53] [PASSED] DP
[12:00:53] [PASSED] HDMI-A
[12:00:53] [PASSED] HDMI-B
[12:00:53] [PASSED] TV
[12:00:53] [PASSED] eDP
[12:00:53] [PASSED] Virtual
[12:00:53] [PASSED] DSI
[12:00:53] [PASSED] DPI
[12:00:53] [PASSED] Writeback
[12:00:53] [PASSED] SPI
[12:00:53] [PASSED] USB
[12:00:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:00:53] ======== drm_test_drm_connector_dynamic_init_name  =========
[12:00:53] [PASSED] Unknown
[12:00:53] [PASSED] VGA
[12:00:53] [PASSED] DVI-I
[12:00:53] [PASSED] DVI-D
[12:00:53] [PASSED] DVI-A
[12:00:53] [PASSED] Composite
[12:00:53] [PASSED] SVIDEO
[12:00:53] [PASSED] LVDS
[12:00:53] [PASSED] Component
[12:00:53] [PASSED] DIN
[12:00:53] [PASSED] DP
[12:00:53] [PASSED] HDMI-A
[12:00:53] [PASSED] HDMI-B
[12:00:53] [PASSED] TV
[12:00:53] [PASSED] eDP
[12:00:53] [PASSED] Virtual
[12:00:53] [PASSED] DSI
[12:00:53] [PASSED] DPI
[12:00:53] [PASSED] Writeback
[12:00:53] [PASSED] SPI
[12:00:53] [PASSED] USB
[12:00:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:00:53] =========== [PASSED] drm_connector_dynamic_init ============
[12:00:53] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:00:53] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:00:53] ======= drm_connector_dynamic_register (7 subtests) ========
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:00:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:00:53] ========= [PASSED] drm_connector_dynamic_register ==========
[12:00:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:00:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:00:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:00:53] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:00:53] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:00:53] ========== drm_test_get_tv_mode_from_name_valid  ===========
[12:00:53] [PASSED] NTSC
[12:00:53] [PASSED] NTSC-443
[12:00:53] [PASSED] NTSC-J
[12:00:53] [PASSED] PAL
[12:00:53] [PASSED] PAL-M
[12:00:53] [PASSED] PAL-N
[12:00:53] [PASSED] SECAM
[12:00:53] [PASSED] Mono
[12:00:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:00:53] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:00:53] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:00:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:00:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:00:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:00:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:00:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:00:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:00:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:00:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[12:00:53] [PASSED] VIC 96
[12:00:53] [PASSED] VIC 97
[12:00:53] [PASSED] VIC 101
[12:00:53] [PASSED] VIC 102
[12:00:53] [PASSED] VIC 106
[12:00:53] [PASSED] VIC 107
[12:00:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:00:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:00:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:00:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:00:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:00:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:00:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:00:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:00:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[12:00:53] [PASSED] Automatic
[12:00:53] [PASSED] Full
[12:00:53] [PASSED] Limited 16:235
[12:00:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:00:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:00:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:00:53] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:00:53] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[12:00:53] [PASSED] RGB
[12:00:53] [PASSED] YUV 4:2:0
[12:00:53] [PASSED] YUV 4:2:2
[12:00:53] [PASSED] YUV 4:4:4
[12:00:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:00:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:00:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:00:53] ============= drm_damage_helper (21 subtests) ==============
[12:00:53] [PASSED] drm_test_damage_iter_no_damage
[12:00:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:00:53] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:00:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:00:53] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:00:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:00:53] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:00:53] [PASSED] drm_test_damage_iter_simple_damage
[12:00:53] [PASSED] drm_test_damage_iter_single_damage
[12:00:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:00:53] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:00:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:00:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:00:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:00:53] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:00:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:00:53] [PASSED] drm_test_damage_iter_damage
[12:00:53] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:00:53] [PASSED] drm_test_damage_iter_damage_one_outside
[12:00:53] [PASSED] drm_test_damage_iter_damage_src_moved
[12:00:53] [PASSED] drm_test_damage_iter_damage_not_visible
[12:00:53] ================ [PASSED] drm_damage_helper ================
[12:00:53] ============== drm_dp_mst_helper (3 subtests) ==============
[12:00:53] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[12:00:53] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:00:53] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:00:53] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:00:53] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:00:53] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:00:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:00:53] ============== drm_test_dp_mst_calc_pbn_div  ===============
[12:00:53] [PASSED] Link rate 2000000 lane count 4
[12:00:53] [PASSED] Link rate 2000000 lane count 2
[12:00:53] [PASSED] Link rate 2000000 lane count 1
[12:00:53] [PASSED] Link rate 1350000 lane count 4
[12:00:53] [PASSED] Link rate 1350000 lane count 2
[12:00:53] [PASSED] Link rate 1350000 lane count 1
[12:00:53] [PASSED] Link rate 1000000 lane count 4
[12:00:53] [PASSED] Link rate 1000000 lane count 2
[12:00:53] [PASSED] Link rate 1000000 lane count 1
[12:00:53] [PASSED] Link rate 810000 lane count 4
[12:00:53] [PASSED] Link rate 810000 lane count 2
[12:00:53] [PASSED] Link rate 810000 lane count 1
[12:00:53] [PASSED] Link rate 540000 lane count 4
[12:00:53] [PASSED] Link rate 540000 lane count 2
[12:00:53] [PASSED] Link rate 540000 lane count 1
[12:00:53] [PASSED] Link rate 270000 lane count 4
[12:00:53] [PASSED] Link rate 270000 lane count 2
[12:00:53] [PASSED] Link rate 270000 lane count 1
[12:00:53] [PASSED] Link rate 162000 lane count 4
[12:00:53] [PASSED] Link rate 162000 lane count 2
[12:00:53] [PASSED] Link rate 162000 lane count 1
[12:00:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:00:53] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[12:00:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:00:53] [PASSED] DP_POWER_UP_PHY with port number
[12:00:53] [PASSED] DP_POWER_DOWN_PHY with port number
[12:00:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:00:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:00:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:00:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:00:53] [PASSED] DP_QUERY_PAYLOAD with port number
[12:00:53] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:00:53] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:00:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:00:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:00:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:00:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:00:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:00:53] [PASSED] DP_REMOTE_I2C_READ with port number
[12:00:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:00:53] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:00:53] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:00:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:00:53] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:00:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:00:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:00:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:00:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:00:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:00:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:00:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:00:53] ================ [PASSED] drm_dp_mst_helper ================
[12:00:53] ================== drm_exec (7 subtests) ===================
[12:00:53] [PASSED] sanitycheck
[12:00:53] [PASSED] test_lock
[12:00:53] [PASSED] test_lock_unlock
[12:00:53] [PASSED] test_duplicates
[12:00:53] [PASSED] test_prepare
[12:00:53] [PASSED] test_prepare_array
[12:00:53] [PASSED] test_multiple_loops
[12:00:53] ==================== [PASSED] drm_exec =====================
[12:00:53] =========== drm_format_helper_test (17 subtests) ===========
[12:00:53] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:00:53] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:00:53] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:00:53] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:00:53] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:00:53] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:00:53] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:00:53] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:00:53] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:00:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:00:53] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:00:53] ============== drm_test_fb_xrgb8888_to_mono  ===============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:00:53] ==================== drm_test_fb_swab  =====================
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ================ [PASSED] drm_test_fb_swab =================
[12:00:53] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:00:53] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[12:00:53] [PASSED] single_pixel_source_buffer
[12:00:53] [PASSED] single_pixel_clip_rectangle
[12:00:53] [PASSED] well_known_colors
[12:00:53] [PASSED] destination_pitch
[12:00:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:00:53] ================= drm_test_fb_clip_offset  =================
[12:00:53] [PASSED] pass through
[12:00:53] [PASSED] horizontal offset
[12:00:53] [PASSED] vertical offset
[12:00:53] [PASSED] horizontal and vertical offset
[12:00:53] [PASSED] horizontal offset (custom pitch)
[12:00:53] [PASSED] vertical offset (custom pitch)
[12:00:53] [PASSED] horizontal and vertical offset (custom pitch)
[12:00:53] ============= [PASSED] drm_test_fb_clip_offset =============
[12:00:53] =================== drm_test_fb_memcpy  ====================
[12:00:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:00:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:00:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:00:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:00:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:00:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:00:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:00:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:00:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:00:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:00:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:00:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:00:53] =============== [PASSED] drm_test_fb_memcpy ================
[12:00:53] ============= [PASSED] drm_format_helper_test ==============
[12:00:53] ================= drm_format (18 subtests) =================
[12:00:53] [PASSED] drm_test_format_block_width_invalid
[12:00:53] [PASSED] drm_test_format_block_width_one_plane
[12:00:53] [PASSED] drm_test_format_block_width_two_plane
[12:00:53] [PASSED] drm_test_format_block_width_three_plane
[12:00:53] [PASSED] drm_test_format_block_width_tiled
[12:00:53] [PASSED] drm_test_format_block_height_invalid
[12:00:53] [PASSED] drm_test_format_block_height_one_plane
[12:00:53] [PASSED] drm_test_format_block_height_two_plane
[12:00:53] [PASSED] drm_test_format_block_height_three_plane
[12:00:53] [PASSED] drm_test_format_block_height_tiled
[12:00:53] [PASSED] drm_test_format_min_pitch_invalid
[12:00:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:00:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:00:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:00:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:00:53] [PASSED] drm_test_format_min_pitch_two_plane
[12:00:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:00:53] [PASSED] drm_test_format_min_pitch_tiled
[12:00:53] =================== [PASSED] drm_format ====================
[12:00:53] ============== drm_framebuffer (10 subtests) ===============
[12:00:53] ========== drm_test_framebuffer_check_src_coords  ==========
[12:00:53] [PASSED] Success: source fits into fb
[12:00:53] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:00:53] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:00:53] [PASSED] Fail: overflowing fb with source width
[12:00:53] [PASSED] Fail: overflowing fb with source height
[12:00:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:00:53] [PASSED] drm_test_framebuffer_cleanup
[12:00:53] =============== drm_test_framebuffer_create  ===============
[12:00:53] [PASSED] ABGR8888 normal sizes
[12:00:53] [PASSED] ABGR8888 max sizes
[12:00:53] [PASSED] ABGR8888 pitch greater than min required
[12:00:53] [PASSED] ABGR8888 pitch less than min required
[12:00:53] [PASSED] ABGR8888 Invalid width
[12:00:53] [PASSED] ABGR8888 Invalid buffer handle
[12:00:53] [PASSED] No pixel format
[12:00:53] [PASSED] ABGR8888 Width 0
[12:00:53] [PASSED] ABGR8888 Height 0
[12:00:53] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:00:53] [PASSED] ABGR8888 Large buffer offset
[12:00:53] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:00:53] [PASSED] ABGR8888 Invalid flag
[12:00:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:00:53] [PASSED] ABGR8888 Valid buffer modifier
[12:00:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:00:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:00:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:00:53] [PASSED] NV12 Normal sizes
[12:00:53] [PASSED] NV12 Max sizes
[12:00:53] [PASSED] NV12 Invalid pitch
[12:00:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:00:53] [PASSED] NV12 different  modifier per-plane
[12:00:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:00:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:00:53] [PASSED] NV12 Modifier for inexistent plane
[12:00:53] [PASSED] NV12 Handle for inexistent plane
[12:00:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:00:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:00:53] [PASSED] YVU420 Normal sizes
[12:00:53] [PASSED] YVU420 Max sizes
[12:00:53] [PASSED] YVU420 Invalid pitch
[12:00:53] [PASSED] YVU420 Different pitches
[12:00:53] [PASSED] YVU420 Different buffer offsets/pitches
[12:00:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:00:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:00:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:00:53] [PASSED] YVU420 Valid modifier
[12:00:53] [PASSED] YVU420 Different modifiers per plane
[12:00:53] [PASSED] YVU420 Modifier for inexistent plane
[12:00:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:00:53] [PASSED] X0L2 Normal sizes
[12:00:53] [PASSED] X0L2 Max sizes
[12:00:53] [PASSED] X0L2 Invalid pitch
[12:00:53] [PASSED] X0L2 Pitch greater than minimum required
[12:00:53] [PASSED] X0L2 Handle for inexistent plane
[12:00:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:00:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:00:53] [PASSED] X0L2 Valid modifier
[12:00:53] [PASSED] X0L2 Modifier for inexistent plane
[12:00:53] =========== [PASSED] drm_test_framebuffer_create ===========
[12:00:53] [PASSED] drm_test_framebuffer_free
[12:00:53] [PASSED] drm_test_framebuffer_init
[12:00:53] [PASSED] drm_test_framebuffer_init_bad_format
[12:00:53] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:00:53] [PASSED] drm_test_framebuffer_lookup
[12:00:53] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:00:53] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:00:53] ================= [PASSED] drm_framebuffer =================
[12:00:53] ================ drm_gem_shmem (8 subtests) ================
[12:00:53] [PASSED] drm_gem_shmem_test_obj_create
[12:00:53] [PASSED] drm_gem_shmem_test_obj_create_private
[12:00:53] [PASSED] drm_gem_shmem_test_pin_pages
[12:00:53] [PASSED] drm_gem_shmem_test_vmap
[12:00:53] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:00:53] [PASSED] drm_gem_shmem_test_get_sg_table
[12:00:53] [PASSED] drm_gem_shmem_test_madvise
[12:00:53] [PASSED] drm_gem_shmem_test_purge
[12:00:53] ================== [PASSED] drm_gem_shmem ==================
[12:00:53] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:00:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[12:00:53] [PASSED] Automatic
[12:00:53] [PASSED] Full
[12:00:53] [PASSED] Limited 16:235
[12:00:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:00:53] [PASSED] drm_test_check_disable_connector
[12:00:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:00:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:00:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:00:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:00:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:00:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:00:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:00:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:00:53] [PASSED] drm_test_check_output_bpc_dvi
[12:00:53] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:00:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:00:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:00:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:00:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:00:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:00:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:00:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:00:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:00:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:00:53] [PASSED] drm_test_check_broadcast_rgb_value
[12:00:53] [PASSED] drm_test_check_bpc_8_value
[12:00:53] [PASSED] drm_test_check_bpc_10_value
[12:00:53] [PASSED] drm_test_check_bpc_12_value
[12:00:53] [PASSED] drm_test_check_format_value
[12:00:53] [PASSED] drm_test_check_tmds_char_value
[12:00:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:00:53] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:00:53] [PASSED] drm_test_check_mode_valid
[12:00:53] [PASSED] drm_test_check_mode_valid_reject
[12:00:53] [PASSED] drm_test_check_mode_valid_reject_rate
[12:00:53] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:00:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:00:53] ================= drm_managed (2 subtests) =================
[12:00:53] [PASSED] drm_test_managed_release_action
[12:00:53] [PASSED] drm_test_managed_run_action
[12:00:53] =================== [PASSED] drm_managed ===================
[12:00:53] =================== drm_mm (6 subtests) ====================
[12:00:53] [PASSED] drm_test_mm_init
[12:00:53] [PASSED] drm_test_mm_debug
[12:00:53] [PASSED] drm_test_mm_align32
[12:00:53] [PASSED] drm_test_mm_align64
[12:00:53] [PASSED] drm_test_mm_lowest
[12:00:53] [PASSED] drm_test_mm_highest
[12:00:53] ===================== [PASSED] drm_mm ======================
[12:00:53] ============= drm_modes_analog_tv (5 subtests) =============
[12:00:53] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:00:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:00:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:00:53] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:00:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:00:53] =============== [PASSED] drm_modes_analog_tv ===============
[12:00:53] ============== drm_plane_helper (2 subtests) ===============
[12:00:53] =============== drm_test_check_plane_state  ================
[12:00:53] [PASSED] clipping_simple
[12:00:53] [PASSED] clipping_rotate_reflect
[12:00:53] [PASSED] positioning_simple
[12:00:53] [PASSED] upscaling
[12:00:53] [PASSED] downscaling
[12:00:53] [PASSED] rounding1
[12:00:53] [PASSED] rounding2
[12:00:53] [PASSED] rounding3
[12:00:53] [PASSED] rounding4
[12:00:53] =========== [PASSED] drm_test_check_plane_state ============
[12:00:53] =========== drm_test_check_invalid_plane_state  ============
[12:00:53] [PASSED] positioning_invalid
[12:00:53] [PASSED] upscaling_invalid
[12:00:53] [PASSED] downscaling_invalid
[12:00:53] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:00:53] ================ [PASSED] drm_plane_helper =================
[12:00:53] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:00:53] ====== drm_test_connector_helper_tv_get_modes_check  =======
[12:00:53] [PASSED] None
[12:00:53] [PASSED] PAL
[12:00:53] [PASSED] NTSC
[12:00:53] [PASSED] Both, NTSC Default
[12:00:53] [PASSED] Both, PAL Default
[12:00:53] [PASSED] Both, NTSC Default, with PAL on command-line
[12:00:53] [PASSED] Both, PAL Default, with NTSC on command-line
[12:00:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:00:53] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:00:53] ================== drm_rect (9 subtests) ===================
[12:00:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:00:53] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:00:53] [PASSED] drm_test_rect_clip_scaled_clipped
[12:00:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:00:53] ================= drm_test_rect_intersect  =================
[12:00:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:00:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:00:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:00:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:00:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:00:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:00:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:00:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:00:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:00:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:00:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:00:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:00:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:00:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:00:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:00:53] ============= [PASSED] drm_test_rect_intersect =============
[12:00:53] ================ drm_test_rect_calc_hscale  ================
[12:00:53] [PASSED] normal use
[12:00:53] [PASSED] out of max range
[12:00:53] [PASSED] out of min range
[12:00:53] [PASSED] zero dst
[12:00:53] [PASSED] negative src
[12:00:53] [PASSED] negative dst
[12:00:53] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:00:53] ================ drm_test_rect_calc_vscale  ================
[12:00:53] [PASSED] normal use
[12:00:53] [PASSED] out of max range
[12:00:53] [PASSED] out of min range
[12:00:53] [PASSED] zero dst
[12:00:53] [PASSED] negative src
stty: 'standard input': Inappropriate ioctl for device
[12:00:53] [PASSED] negative dst
[12:00:53] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:00:53] ================== drm_test_rect_rotate  ===================
[12:00:53] [PASSED] reflect-x
[12:00:53] [PASSED] reflect-y
[12:00:53] [PASSED] rotate-0
[12:00:53] [PASSED] rotate-90
[12:00:53] [PASSED] rotate-180
[12:00:53] [PASSED] rotate-270
[12:00:53] ============== [PASSED] drm_test_rect_rotate ===============
[12:00:53] ================ drm_test_rect_rotate_inv  =================
[12:00:53] [PASSED] reflect-x
[12:00:53] [PASSED] reflect-y
[12:00:53] [PASSED] rotate-0
[12:00:53] [PASSED] rotate-90
[12:00:53] [PASSED] rotate-180
[12:00:53] [PASSED] rotate-270
[12:00:53] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:00:53] ==================== [PASSED] drm_rect =====================
[12:00:53] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:00:53] ============ drm_test_sysfb_build_fourcc_list  =============
[12:00:53] [PASSED] no native formats
[12:00:53] [PASSED] XRGB8888 as native format
[12:00:53] [PASSED] remove duplicates
[12:00:53] [PASSED] convert alpha formats
[12:00:53] [PASSED] random formats
[12:00:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:00:53] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:00:53] ============================================================
[12:00:53] Testing complete. Ran 621 tests: passed: 621
[12:00:53] Elapsed time: 25.537s total, 1.694s configuring, 23.676s building, 0.140s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:00:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:00:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:01:04] Starting KUnit Kernel (1/1)...
[12:01:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:01:04] ================= ttm_device (5 subtests) ==================
[12:01:04] [PASSED] ttm_device_init_basic
[12:01:04] [PASSED] ttm_device_init_multiple
[12:01:04] [PASSED] ttm_device_fini_basic
[12:01:04] [PASSED] ttm_device_init_no_vma_man
[12:01:04] ================== ttm_device_init_pools  ==================
[12:01:04] [PASSED] No DMA allocations, no DMA32 required
[12:01:04] [PASSED] DMA allocations, DMA32 required
[12:01:04] [PASSED] No DMA allocations, DMA32 required
[12:01:04] [PASSED] DMA allocations, no DMA32 required
[12:01:04] ============== [PASSED] ttm_device_init_pools ==============
[12:01:04] =================== [PASSED] ttm_device ====================
[12:01:04] ================== ttm_pool (8 subtests) ===================
[12:01:04] ================== ttm_pool_alloc_basic  ===================
[12:01:04] [PASSED] One page
[12:01:04] [PASSED] More than one page
[12:01:04] [PASSED] Above the allocation limit
[12:01:04] [PASSED] One page, with coherent DMA mappings enabled
[12:01:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:01:04] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:01:04] ============== ttm_pool_alloc_basic_dma_addr  ==============
[12:01:04] [PASSED] One page
[12:01:04] [PASSED] More than one page
[12:01:04] [PASSED] Above the allocation limit
[12:01:04] [PASSED] One page, with coherent DMA mappings enabled
[12:01:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:01:04] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:01:04] [PASSED] ttm_pool_alloc_order_caching_match
[12:01:04] [PASSED] ttm_pool_alloc_caching_mismatch
[12:01:04] [PASSED] ttm_pool_alloc_order_mismatch
[12:01:04] [PASSED] ttm_pool_free_dma_alloc
[12:01:04] [PASSED] ttm_pool_free_no_dma_alloc
[12:01:04] [PASSED] ttm_pool_fini_basic
[12:01:04] ==================== [PASSED] ttm_pool =====================
[12:01:04] ================ ttm_resource (8 subtests) =================
[12:01:04] ================= ttm_resource_init_basic  =================
[12:01:04] [PASSED] Init resource in TTM_PL_SYSTEM
[12:01:04] [PASSED] Init resource in TTM_PL_VRAM
[12:01:04] [PASSED] Init resource in a private placement
[12:01:04] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:01:04] ============= [PASSED] ttm_resource_init_basic =============
[12:01:04] [PASSED] ttm_resource_init_pinned
[12:01:04] [PASSED] ttm_resource_fini_basic
[12:01:04] [PASSED] ttm_resource_manager_init_basic
[12:01:04] [PASSED] ttm_resource_manager_usage_basic
[12:01:04] [PASSED] ttm_resource_manager_set_used_basic
[12:01:04] [PASSED] ttm_sys_man_alloc_basic
[12:01:04] [PASSED] ttm_sys_man_free_basic
[12:01:04] ================== [PASSED] ttm_resource ===================
[12:01:04] =================== ttm_tt (15 subtests) ===================
[12:01:04] ==================== ttm_tt_init_basic  ====================
[12:01:04] [PASSED] Page-aligned size
[12:01:04] [PASSED] Extra pages requested
[12:01:04] ================ [PASSED] ttm_tt_init_basic ================
[12:01:04] [PASSED] ttm_tt_init_misaligned
[12:01:04] [PASSED] ttm_tt_fini_basic
[12:01:04] [PASSED] ttm_tt_fini_sg
[12:01:04] [PASSED] ttm_tt_fini_shmem
[12:01:04] [PASSED] ttm_tt_create_basic
[12:01:04] [PASSED] ttm_tt_create_invalid_bo_type
[12:01:04] [PASSED] ttm_tt_create_ttm_exists
[12:01:04] [PASSED] ttm_tt_create_failed
[12:01:04] [PASSED] ttm_tt_destroy_basic
[12:01:04] [PASSED] ttm_tt_populate_null_ttm
[12:01:04] [PASSED] ttm_tt_populate_populated_ttm
[12:01:04] [PASSED] ttm_tt_unpopulate_basic
[12:01:04] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:01:04] [PASSED] ttm_tt_swapin_basic
[12:01:04] ===================== [PASSED] ttm_tt ======================
[12:01:04] =================== ttm_bo (14 subtests) ===================
[12:01:04] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[12:01:04] [PASSED] Cannot be interrupted and sleeps
[12:01:04] [PASSED] Cannot be interrupted, locks straight away
[12:01:04] [PASSED] Can be interrupted, sleeps
[12:01:04] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:01:04] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:01:04] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:01:04] [PASSED] ttm_bo_reserve_double_resv
[12:01:04] [PASSED] ttm_bo_reserve_interrupted
[12:01:04] [PASSED] ttm_bo_reserve_deadlock
[12:01:04] [PASSED] ttm_bo_unreserve_basic
[12:01:04] [PASSED] ttm_bo_unreserve_pinned
[12:01:04] [PASSED] ttm_bo_unreserve_bulk
[12:01:04] [PASSED] ttm_bo_fini_basic
[12:01:04] [PASSED] ttm_bo_fini_shared_resv
[12:01:04] [PASSED] ttm_bo_pin_basic
[12:01:04] [PASSED] ttm_bo_pin_unpin_resource
[12:01:04] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:01:04] ===================== [PASSED] ttm_bo ======================
[12:01:04] ============== ttm_bo_validate (21 subtests) ===============
[12:01:04] ============== ttm_bo_init_reserved_sys_man  ===============
[12:01:04] [PASSED] Buffer object for userspace
[12:01:04] [PASSED] Kernel buffer object
[12:01:04] [PASSED] Shared buffer object
[12:01:04] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:01:04] ============== ttm_bo_init_reserved_mock_man  ==============
[12:01:04] [PASSED] Buffer object for userspace
[12:01:04] [PASSED] Kernel buffer object
[12:01:04] [PASSED] Shared buffer object
[12:01:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:01:04] [PASSED] ttm_bo_init_reserved_resv
[12:01:04] ================== ttm_bo_validate_basic  ==================
[12:01:04] [PASSED] Buffer object for userspace
[12:01:04] [PASSED] Kernel buffer object
[12:01:04] [PASSED] Shared buffer object
[12:01:04] ============== [PASSED] ttm_bo_validate_basic ==============
[12:01:04] [PASSED] ttm_bo_validate_invalid_placement
[12:01:04] ============= ttm_bo_validate_same_placement  ==============
[12:01:04] [PASSED] System manager
[12:01:04] [PASSED] VRAM manager
[12:01:04] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:01:04] [PASSED] ttm_bo_validate_failed_alloc
[12:01:04] [PASSED] ttm_bo_validate_pinned
[12:01:04] [PASSED] ttm_bo_validate_busy_placement
[12:01:04] ================ ttm_bo_validate_multihop  =================
[12:01:04] [PASSED] Buffer object for userspace
[12:01:04] [PASSED] Kernel buffer object
[12:01:04] [PASSED] Shared buffer object
[12:01:04] ============ [PASSED] ttm_bo_validate_multihop =============
[12:01:04] ========== ttm_bo_validate_no_placement_signaled  ==========
[12:01:04] [PASSED] Buffer object in system domain, no page vector
[12:01:04] [PASSED] Buffer object in system domain with an existing page vector
[12:01:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:01:04] ======== ttm_bo_validate_no_placement_not_signaled  ========
[12:01:04] [PASSED] Buffer object for userspace
[12:01:04] [PASSED] Kernel buffer object
[12:01:04] [PASSED] Shared buffer object
[12:01:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:01:04] [PASSED] ttm_bo_validate_move_fence_signaled
[12:01:04] ========= ttm_bo_validate_move_fence_not_signaled  =========
[12:01:04] [PASSED] Waits for GPU
[12:01:04] [PASSED] Tries to lock straight away
[12:01:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:01:04] [PASSED] ttm_bo_validate_happy_evict
[12:01:04] [PASSED] ttm_bo_validate_all_pinned_evict
[12:01:04] [PASSED] ttm_bo_validate_allowed_only_evict
[12:01:04] [PASSED] ttm_bo_validate_deleted_evict
[12:01:04] [PASSED] ttm_bo_validate_busy_domain_evict
[12:01:04] [PASSED] ttm_bo_validate_evict_gutting
[12:01:04] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[12:01:04] ================= [PASSED] ttm_bo_validate =================
[12:01:04] ============================================================
[12:01:04] Testing complete. Ran 101 tests: passed: 101
[12:01:04] Elapsed time: 11.006s total, 1.721s configuring, 9.068s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for : Add GPU work period support for Xe driver (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3741 bytes --]

== Series Details ==

Series: : Add GPU work period support for Xe driver (rev4)
URL   : https://patchwork.freedesktop.org/series/153341/
State : failure

== Summary ==

CI Bug Log - changes from xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24_BAT -> xe-pw-153341v4_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-153341v4_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-153341v4_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 9)
------------------------------

  Missing    (2): bat-adlp-vm bat-ptl-vm 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-153341v4_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-bmg-1:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
    - bat-adlp-7:         [PASS][3] -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/bat-adlp-7/igt@core_hotunplug@unbind-rebind.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/bat-adlp-7/igt@core_hotunplug@unbind-rebind.html
    - bat-lnl-2:          [PASS][5] -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/bat-lnl-2/igt@core_hotunplug@unbind-rebind.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/bat-lnl-2/igt@core_hotunplug@unbind-rebind.html
    - bat-lnl-1:          [PASS][7] -> [INCOMPLETE][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/bat-lnl-1/igt@core_hotunplug@unbind-rebind.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/bat-lnl-1/igt@core_hotunplug@unbind-rebind.html
    - bat-bmg-2:          [PASS][9] -> [INCOMPLETE][10]
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html

  * igt@xe_module_load@load:
    - bat-dg2-oem2:       [PASS][11] -> [ABORT][12]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/bat-dg2-oem2/igt@xe_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/bat-dg2-oem2/igt@xe_module_load@load.html

  
#### Warnings ####

  * igt@fbdev@info:
    - bat-atsm-2:         [SKIP][13] ([Intel XE#2134]) -> [INCOMPLETE][14]
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/bat-atsm-2/igt@fbdev@info.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/bat-atsm-2/igt@fbdev@info.html

  
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134


Build changes
-------------

  * Linux: xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24 -> xe-pw-153341v4

  IGT_8554: 8554
  xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24: d557b14c00c4ab027e66c1c7bf512cf479ff8c24
  xe-pw-153341v4: 153341v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/index.html

[-- Attachment #2: Type: text/html, Size: 4411 bytes --]

✗ Xe.CI.Full: failure for : Add GPU work period support for Xe driver (rev4)

[Patchwork]

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== Series Details ==

Series: : Add GPU work period support for Xe driver (rev4)
URL   : https://patchwork.freedesktop.org/series/153341/
State : failure

== Summary ==

CI Bug Log - changes from xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24_FULL -> xe-pw-153341v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-153341v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-153341v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-153341v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pm_rpm@legacy-planes@plane-43:
    - shard-adlp:         [PASS][1] -> [ABORT][2] +8 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-4/igt@kms_pm_rpm@legacy-planes@plane-43.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-1/igt@kms_pm_rpm@legacy-planes@plane-43.html
    - shard-bmg:          [PASS][3] -> [ABORT][4] +9 other tests abort
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-3/igt@kms_pm_rpm@legacy-planes@plane-43.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-7/igt@kms_pm_rpm@legacy-planes@plane-43.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-dg2-set2:     [PASS][5] -> [ABORT][6] +6 other tests abort
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-434/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-466/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@universal-planes-dpms@plane-33:
    - shard-dg2-set2:     NOTRUN -> [ABORT][7] +3 other tests abort
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@kms_pm_rpm@universal-planes-dpms@plane-33.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early:
    - shard-lnl:          [PASS][8] -> [DMESG-WARN][9] +7 other tests dmesg-warn
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-5/igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-1/igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early.html

  * igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run:
    - shard-dg2-set2:     [PASS][10] -> [DMESG-WARN][11] +5 other tests dmesg-warn
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-436/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-464/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html

  * igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch:
    - shard-bmg:          [PASS][12] -> [DMESG-WARN][13] +5 other tests dmesg-warn
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-8/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html
    - shard-adlp:         [PASS][14] -> [DMESG-WARN][15] +7 other tests dmesg-warn
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-9/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-2/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html

  * igt@xe_pm@d3hot-mmap-vram:
    - shard-bmg:          [PASS][16] -> [FAIL][17]
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-4/igt@xe_pm@d3hot-mmap-vram.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-7/igt@xe_pm@d3hot-mmap-vram.html
    - shard-dg2-set2:     [PASS][18] -> [FAIL][19]
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-436/igt@xe_pm@d3hot-mmap-vram.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-464/igt@xe_pm@d3hot-mmap-vram.html

  * igt@xe_pm@s4-d3hot-basic-exec:
    - shard-bmg:          NOTRUN -> [ABORT][20]
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@xe_pm@s4-d3hot-basic-exec.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-lnl:          [PASS][21] -> [ABORT][22] +8 other tests abort
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-4/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-7/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  * igt@xe_wedged@basic-wedged:
    - shard-adlp:         [PASS][23] -> [INCOMPLETE][24]
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-6/igt@xe_wedged@basic-wedged.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-2/igt@xe_wedged@basic-wedged.html
    - shard-dg2-set2:     [PASS][25] -> [INCOMPLETE][26]
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-463/igt@xe_wedged@basic-wedged.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-466/igt@xe_wedged@basic-wedged.html
    - shard-lnl:          [PASS][27] -> [INCOMPLETE][28] +1 other test incomplete
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-7/igt@xe_wedged@basic-wedged.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-1/igt@xe_wedged@basic-wedged.html
    - shard-bmg:          [PASS][29] -> [INCOMPLETE][30]
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-7/igt@xe_wedged@basic-wedged.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-8/igt@xe_wedged@basic-wedged.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][31]
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-466/igt@xe_wedged@wedged-at-any-timeout.html

  
#### Warnings ####

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-bmg:          [SKIP][32] ([Intel XE#2320]) -> [ABORT][33]
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-3/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
    - shard-dg2-set2:     [SKIP][34] ([Intel XE#455]) -> [ABORT][35]
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-432/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-463/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          [SKIP][36] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) -> [ABORT][37]
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-7/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-lnl:          [SKIP][38] ([Intel XE#1439] / [Intel XE#3141]) -> [ABORT][39]
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-8/igt@kms_pm_rpm@modeset-non-lpsp.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-8/igt@kms_pm_rpm@modeset-non-lpsp.html
    - shard-adlp:         [SKIP][40] ([Intel XE#836]) -> [ABORT][41]
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-2/igt@kms_pm_rpm@modeset-non-lpsp.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-6/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@xe_pm@d3cold-basic:
    - shard-lnl:          [SKIP][42] ([Intel XE#2284] / [Intel XE#366]) -> [ABORT][43]
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-2/igt@xe_pm@d3cold-basic.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-1/igt@xe_pm@d3cold-basic.html
    - shard-bmg:          [SKIP][44] ([Intel XE#2284]) -> [ABORT][45]
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-8/igt@xe_pm@d3cold-basic.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@xe_pm@d3cold-basic.html
    - shard-adlp:         [SKIP][46] ([Intel XE#2284] / [Intel XE#366]) -> [ABORT][47]
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-8/igt@xe_pm@d3cold-basic.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@xe_pm@d3cold-basic.html
    - shard-dg2-set2:     [SKIP][48] ([Intel XE#2284] / [Intel XE#366]) -> [ABORT][49]
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-463/igt@xe_pm@d3cold-basic.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-434/igt@xe_pm@d3cold-basic.html

  * igt@xe_pm@d3cold-i2c:
    - shard-lnl:          [SKIP][50] ([Intel XE#5694]) -> [ABORT][51]
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-7/igt@xe_pm@d3cold-i2c.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-2/igt@xe_pm@d3cold-i2c.html
    - shard-bmg:          [SKIP][52] ([Intel XE#5694]) -> [ABORT][53]
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@xe_pm@d3cold-i2c.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@xe_pm@d3cold-i2c.html
    - shard-adlp:         [SKIP][54] ([Intel XE#5694]) -> [ABORT][55]
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-4/igt@xe_pm@d3cold-i2c.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-3/igt@xe_pm@d3cold-i2c.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_async_flips@async-flip-dpms}:
    - shard-lnl:          [PASS][56] -> [ABORT][57] +1 other test abort
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-4/igt@kms_async_flips@async-flip-dpms.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-5/igt@kms_async_flips@async-flip-dpms.html
    - shard-adlp:         [DMESG-WARN][58] ([Intel XE#4543]) -> [ABORT][59]
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-9/igt@kms_async_flips@async-flip-dpms.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@kms_async_flips@async-flip-dpms.html

  * {igt@kms_async_flips@async-flip-dpms@pipe-a-dp-2}:
    - shard-bmg:          [PASS][60] -> [ABORT][61] +1 other test abort
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-8/igt@kms_async_flips@async-flip-dpms@pipe-a-dp-2.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@kms_async_flips@async-flip-dpms@pipe-a-dp-2.html

  * {igt@kms_async_flips@async-flip-dpms@pipe-a-hdmi-a-1}:
    - shard-adlp:         [PASS][62] -> [ABORT][63]
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-9/igt@kms_async_flips@async-flip-dpms@pipe-a-hdmi-a-1.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@kms_async_flips@async-flip-dpms@pipe-a-hdmi-a-1.html

  * {igt@xe_configfs@engines-allowed}:
    - shard-adlp:         [PASS][64] -> [DMESG-WARN][65]
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-2/igt@xe_configfs@engines-allowed.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-3/igt@xe_configfs@engines-allowed.html
    - shard-bmg:          [PASS][66] -> [DMESG-WARN][67]
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@xe_configfs@engines-allowed.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@xe_configfs@engines-allowed.html

  
Known issues
------------

  Here are the changes found in xe-pw-153341v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@y-tiled-32bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][68] ([Intel XE#1124])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html

  * igt@kms_bw@linear-tiling-3-displays-3840x2160p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([Intel XE#367])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2887])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-c-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][72] ([Intel XE#787]) +76 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-432/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][73] ([Intel XE#455] / [Intel XE#787]) +15 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-2:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][74] ([Intel XE#1727] / [Intel XE#3113])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-2.html

  * igt@kms_chamelium_audio@hdmi-audio:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#2252]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_chamelium_audio@hdmi-audio.html

  * igt@kms_chamelium_color@ctm-limited-range:
    - shard-dg2-set2:     NOTRUN -> [SKIP][76] ([Intel XE#306])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@kms_chamelium_color@ctm-limited-range.html

  * igt@kms_chamelium_edid@vga-edid-read:
    - shard-dg2-set2:     NOTRUN -> [SKIP][77] ([Intel XE#373]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@kms_chamelium_edid@vga-edid-read.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#2321])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
    - shard-bmg:          [PASS][79] -> [SKIP][80] ([Intel XE#2291]) +1 other test skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#2244])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [PASS][82] -> [FAIL][83] ([Intel XE#301]) +1 other test fail
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-rmfb-interruptible@b-hdmi-a1:
    - shard-adlp:         [PASS][84] -> [DMESG-WARN][85] ([Intel XE#4543]) +3 other tests dmesg-warn
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-8/igt@kms_flip@flip-vs-rmfb-interruptible@b-hdmi-a1.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@kms_flip@flip-vs-rmfb-interruptible@b-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][86] ([Intel XE#651]) +2 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#2311]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#5390]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-dg2-set2:     NOTRUN -> [SKIP][89] ([Intel XE#658])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][90] ([Intel XE#653]) +6 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#2313])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-bmg:          [PASS][92] -> [SKIP][93] ([Intel XE#1503])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@kms_hdr@static-toggle-dpms.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-dg2-set2:     NOTRUN -> [SKIP][94] ([Intel XE#346])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-dg2-set2:     NOTRUN -> [SKIP][95] ([Intel XE#356])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-dg2-set2:     NOTRUN -> [SKIP][96] ([Intel XE#455]) +4 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#1406] / [Intel XE#1489])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
    - shard-dg2-set2:     NOTRUN -> [SKIP][98] ([Intel XE#1406] / [Intel XE#1489])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][99] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +4 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#1499])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@kms_vrr@flip-suspend.html

  * igt@xe_eudebug@basic-exec-queues:
    - shard-dg2-set2:     NOTRUN -> [SKIP][101] ([Intel XE#4837]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@xe_eudebug@basic-exec-queues.html

  * igt@xe_eudebug_online@writes-caching-vram-bb-sram-target-vram:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#4837]) +1 other test skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@xe_eudebug_online@writes-caching-vram-bb-sram-target-vram.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind:
    - shard-dg2-set2:     [PASS][103] -> [SKIP][104] ([Intel XE#1392]) +3 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html

  * igt@xe_exec_fault_mode@many-execqueues-rebind:
    - shard-dg2-set2:     NOTRUN -> [SKIP][105] ([Intel XE#288]) +3 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@xe_exec_fault_mode@many-execqueues-rebind.html

  * igt@xe_exec_system_allocator@many-stride-malloc-race:
    - shard-dg2-set2:     NOTRUN -> [SKIP][106] ([Intel XE#4915]) +37 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@xe_exec_system_allocator@many-stride-malloc-race.html

  * igt@xe_exec_system_allocator@once-large-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#4943])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@xe_exec_system_allocator@once-large-mmap-new-huge.html

  * igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run:
    - shard-adlp:         [PASS][108] -> [DMESG-WARN][109] ([Intel XE#2953] / [Intel XE#4173])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-6/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-1/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html

  * igt@xe_oa@syncs-ufence-wait:
    - shard-dg2-set2:     NOTRUN -> [SKIP][110] ([Intel XE#3573])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@xe_oa@syncs-ufence-wait.html

  * igt@xe_pmu@engine-activity-most-load-idle:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][111] ([Intel XE#6190]) +1 other test dmesg-warn
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@xe_pmu@engine-activity-most-load-idle.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][112] ([Intel XE#4733])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [DMESG-WARN][113] ([Intel XE#5354]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
    - shard-bmg:          [SKIP][115] ([Intel XE#2291]) -> [PASS][116]
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          [SKIP][117] ([Intel XE#2316]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - shard-adlp:         [DMESG-WARN][119] ([Intel XE#4543]) -> [PASS][120] +3 other tests pass
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-1/igt@kms_flip@basic-flip-vs-dpms.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-4/igt@kms_flip@basic-flip-vs-dpms.html

  * igt@kms_vrr@negative-basic:
    - shard-bmg:          [SKIP][121] ([Intel XE#1499]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@kms_vrr@negative-basic.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@kms_vrr@negative-basic.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-bind:
    - shard-dg2-set2:     [SKIP][123] ([Intel XE#1392]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-432/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-463/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html

  * {igt@xe_exec_system_allocator@many-large-execqueues-malloc-prefetch}:
    - shard-lnl:          [CRASH][125] ([Intel XE#6192]) -> [PASS][126] +1 other test pass
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-3/igt@xe_exec_system_allocator@many-large-execqueues-malloc-prefetch.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-7/igt@xe_exec_system_allocator@many-large-execqueues-malloc-prefetch.html

  * {igt@xe_exec_system_allocator@once-malloc-prefetch}:
    - shard-bmg:          [CRASH][127] ([Intel XE#6192]) -> [PASS][128] +1 other test pass
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-4/igt@xe_exec_system_allocator@once-malloc-prefetch.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@xe_exec_system_allocator@once-malloc-prefetch.html

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [SKIP][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154]) ([Intel XE#378]) -> ([PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-4/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-4/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-4/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-7/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-1/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-1/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-1/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-5/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-3/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-5/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-3/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-3/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-5/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-7/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-7/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-3/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-7/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-1/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-2/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-2/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-2/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-8/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-8/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-8/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-5/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-lnl-8/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-7/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-7/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-4/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-5/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-5/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-5/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-2/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-1/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-1/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-2/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-1/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-3/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-4/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-2/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-2/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-8/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-8/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-8/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-8/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-4/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-5/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-3/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-3/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-1/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-lnl-7/igt@xe_module_load@load.html
    - shard-bmg:          ([PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [SKIP][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205]) ([Intel XE#2457]) -> ([PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-8/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-1/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-4/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-4/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-8/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-7/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-1/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-1/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-7/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-7/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-1/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-7/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-3/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-4/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-8/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-3/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-3/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-3/igt@xe_module_load@load.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@xe_module_load@load.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-8/igt@xe_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-3/igt@xe_module_load@load.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@xe_module_load@load.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@xe_module_load@load.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@xe_module_load@load.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@xe_module_load@load.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@xe_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@xe_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@xe_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@xe_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@xe_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@xe_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@xe_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@xe_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-8/igt@xe_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-4/igt@xe_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-8/igt@xe_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-3/igt@xe_module_load@load.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-3/igt@xe_module_load@load.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-7/igt@xe_module_load@load.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-1/igt@xe_module_load@load.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@xe_module_load@load.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-7/igt@xe_module_load@load.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-7/igt@xe_module_load@load.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-3/igt@xe_module_load@load.html
    - shard-adlp:         ([PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [PASS][251], [PASS][252], [PASS][253], [PASS][254], [SKIP][255], [PASS][256]) ([Intel XE#378] / [Intel XE#5612]) -> ([PASS][257], [PASS][258], [PASS][259], [PASS][260], [PASS][261], [PASS][262], [PASS][263], [PASS][264], [PASS][265], [PASS][266], [PASS][267], [PASS][268], [PASS][269], [PASS][270], [PASS][271], [PASS][272], [PASS][273], [PASS][274], [PASS][275], [PASS][276], [PASS][277], [PASS][278], [PASS][279], [PASS][280], [PASS][281])
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-8/igt@xe_module_load@load.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-6/igt@xe_module_load@load.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-6/igt@xe_module_load@load.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-2/igt@xe_module_load@load.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-1/igt@xe_module_load@load.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-1/igt@xe_module_load@load.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-1/igt@xe_module_load@load.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-1/igt@xe_module_load@load.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-6/igt@xe_module_load@load.html
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-8/igt@xe_module_load@load.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-3/igt@xe_module_load@load.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-4/igt@xe_module_load@load.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-4/igt@xe_module_load@load.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-4/igt@xe_module_load@load.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-3/igt@xe_module_load@load.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-2/igt@xe_module_load@load.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-9/igt@xe_module_load@load.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-9/igt@xe_module_load@load.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-8/igt@xe_module_load@load.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-6/igt@xe_module_load@load.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-3/igt@xe_module_load@load.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-2/igt@xe_module_load@load.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-2/igt@xe_module_load@load.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-9/igt@xe_module_load@load.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-4/igt@xe_module_load@load.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-3/igt@xe_module_load@load.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@xe_module_load@load.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@xe_module_load@load.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@xe_module_load@load.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-4/igt@xe_module_load@load.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-3/igt@xe_module_load@load.html
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-2/igt@xe_module_load@load.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-2/igt@xe_module_load@load.html
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-9/igt@xe_module_load@load.html
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-9/igt@xe_module_load@load.html
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-6/igt@xe_module_load@load.html
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-9/igt@xe_module_load@load.html
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-2/igt@xe_module_load@load.html
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-2/igt@xe_module_load@load.html
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-4/igt@xe_module_load@load.html
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-4/igt@xe_module_load@load.html
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-3/igt@xe_module_load@load.html
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-3/igt@xe_module_load@load.html
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-3/igt@xe_module_load@load.html
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-1/igt@xe_module_load@load.html
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-1/igt@xe_module_load@load.html
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-1/igt@xe_module_load@load.html
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@xe_module_load@load.html
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-6/igt@xe_module_load@load.html
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-6/igt@xe_module_load@load.html
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-6/igt@xe_module_load@load.html
    - shard-dg2-set2:     ([PASS][282], [PASS][283], [PASS][284], [PASS][285], [SKIP][286], [PASS][287], [PASS][288], [PASS][289], [PASS][290], [PASS][291], [PASS][292], [PASS][293], [PASS][294], [PASS][295], [PASS][296], [PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301]) ([Intel XE#378]) -> ([PASS][302], [PASS][303], [PASS][304], [PASS][305], [PASS][306], [PASS][307], [PASS][308], [PASS][309], [PASS][310], [PASS][311], [PASS][312], [PASS][313], [PASS][314], [PASS][315], [PASS][316], [PASS][317], [PASS][318], [PASS][319], [PASS][320], [PASS][321])
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-433/igt@xe_module_load@load.html
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-436/igt@xe_module_load@load.html
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-464/igt@xe_module_load@load.html
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-464/igt@xe_module_load@load.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-464/igt@xe_module_load@load.html
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-464/igt@xe_module_load@load.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-463/igt@xe_module_load@load.html
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-463/igt@xe_module_load@load.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-436/igt@xe_module_load@load.html
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-433/igt@xe_module_load@load.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-433/igt@xe_module_load@load.html
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-463/igt@xe_module_load@load.html
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-466/igt@xe_module_load@load.html
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-466/igt@xe_module_load@load.html
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-436/igt@xe_module_load@load.html
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-434/igt@xe_module_load@load.html
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-434/igt@xe_module_load@load.html
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-434/igt@xe_module_load@load.html
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-432/igt@xe_module_load@load.html
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-dg2-432/igt@xe_module_load@load.html
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-463/igt@xe_module_load@load.html
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-464/igt@xe_module_load@load.html
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-464/igt@xe_module_load@load.html
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-463/igt@xe_module_load@load.html
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@xe_module_load@load.html
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@xe_module_load@load.html
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@xe_module_load@load.html
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-466/igt@xe_module_load@load.html
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@xe_module_load@load.html
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-463/igt@xe_module_load@load.html
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-434/igt@xe_module_load@load.html
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-466/igt@xe_module_load@load.html
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-434/igt@xe_module_load@load.html
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-434/igt@xe_module_load@load.html
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-466/igt@xe_module_load@load.html
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-432/igt@xe_module_load@load.html
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-432/igt@xe_module_load@load.html
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-433/igt@xe_module_load@load.html
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-432/igt@xe_module_load@load.html
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-dg2-436/igt@xe_module_load@load.html

  
#### Warnings ####

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [FAIL][322] ([Intel XE#1188]) -> [SKIP][323] ([Intel XE#2341])
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@kms_content_protection@uevent.html
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@kms_content_protection@uevent.html

  * igt@kms_flip@flip-vs-rmfb-interruptible:
    - shard-adlp:         [DMESG-WARN][324] ([Intel XE#5208]) -> [DMESG-WARN][325] ([Intel XE#4543] / [Intel XE#5208])
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-adlp-8/igt@kms_flip@flip-vs-rmfb-interruptible.html
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-adlp-8/igt@kms_flip@flip-vs-rmfb-interruptible.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff:
    - shard-bmg:          [SKIP][326] ([Intel XE#2312]) -> [SKIP][327] ([Intel XE#2311])
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-onoff:
    - shard-bmg:          [SKIP][328] ([Intel XE#2311]) -> [SKIP][329] ([Intel XE#2312])
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-onoff.html
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff:
    - shard-bmg:          [SKIP][330] ([Intel XE#2312]) -> [SKIP][331] ([Intel XE#2313]) +2 other tests skip
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][332] ([Intel XE#2313]) -> [SKIP][333] ([Intel XE#2312])
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt.html
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#6190]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6190
  [Intel XE#6192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6192
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929


Build changes
-------------

  * Linux: xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24 -> xe-pw-153341v4

  IGT_8554: 8554
  xe-3833-d557b14c00c4ab027e66c1c7bf512cf479ff8c24: d557b14c00c4ab027e66c1c7bf512cf479ff8c24
  xe-pw-153341v4: 153341v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153341v4/index.html

[-- Attachment #2: Type: text/html, Size: 68171 bytes --]

Re: [PATCH v4 1/9] drm/xe: Add a new xe_user structure

[Rodrigo Vivi]

On Fri, Sep 26, 2025 at 10:45:12AM +0000, Aakash Deep Sarkar wrote:
> For Android GPU work period event we need to track the runtime
> on the GPU for each user id. This means we can have multiple
> xe files opened by different processes/threads belonging to
> the same user id. All these xe files need to be grouped together
> so that one can easily identify these while calculating the
> run time for the given user id.
> 
> Currently, the xe driver doesn't record the user id of the
> calling process. Also, all the xe files created using open
> call are clubbed together inside the xe device structure
> with no way to distinguish between them based on the user id
> of the calling process.
> 
> To remedy these limitations we are adding another layer of
> indirection between xe device and xe file. xe device will
> now have a list of xe users each with a given user id; and each
> xe user will have a list of xe files each of which is created
> by a process that is associated with this user id.
> 
> The lifetime of the xe user structure should be between when
> a process with a new user id has opened the xe device; and when
> the last xe file belonging to this user id is closed.
> 
> Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
> ---
>  drivers/gpu/drm/xe/Makefile  |  2 +
>  drivers/gpu/drm/xe/xe_user.c | 59 ++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_user.h | 81 ++++++++++++++++++++++++++++++++++++
>  3 files changed, 142 insertions(+)
>  create mode 100644 drivers/gpu/drm/xe/xe_user.c
>  create mode 100644 drivers/gpu/drm/xe/xe_user.h
> 
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index d9c6cf0f189e..ff6b584f3293 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -333,6 +333,8 @@ ifeq ($(CONFIG_DEBUG_FS),y)
>  
>  	xe-$(CONFIG_PCI_IOV) += xe_gt_sriov_pf_debugfs.o
>  
> +	xe-y += xe_user.o
> +
>  	xe-$(CONFIG_DRM_XE_DISPLAY) += \
>  		i915-display/intel_display_debugfs.o \
>  		i915-display/intel_display_debugfs_params.o \
> diff --git a/drivers/gpu/drm/xe/xe_user.c b/drivers/gpu/drm/xe/xe_user.c
> new file mode 100644
> index 000000000000..8c285a68115a
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_user.c
> @@ -0,0 +1,59 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2023 Intel Corporation

2025

> + */
> +
> +#include <linux/slab.h>
> +
> +#include "xe_user.h"
> +

Please add a /** DOC: 
section in here explaining the xe_user. Mostly adapted from the commit
message above, but no need to mention Android. Just mention that this
is aimed to track different users, like the message explains

> +/**
> + * worker thread to emit gpu work period event for this xe user
> + * @work: work instance for this xe user
> + *
> + * Return: void
> + */

no kernel doc in static functions


> +static inline void work_period_worker(struct work_struct *work)
> +{
> +	//TODO: Implement this worker

Perhaps you should not add this stub here and wait to add in
the next patches along with the implementation.

> +}
> +
> +/**
> + * xe_user_alloc() - Allocate xe user
> + * @void: No arg
> + *
> + * Allocate xe user struct to track activity on the gpu
> + * by the application. Call this API whenever a new app
> + * has opened xe device.
> + *
> + * Return: pointer to user struct or NULL if can't allocate
> + */
> +struct xe_user *xe_user_alloc(void)
> +{
> +	struct xe_user *user;
> +
> +	user = kzalloc(sizeof(*user), GFP_KERNEL);
> +	if (!user)
> +		return NULL;
> +
> +	kref_init(&user->refcount);
> +	mutex_init(&user->filelist_lock);
> +	INIT_LIST_HEAD(&user->filelist);
> +	//TODO: Add a hook into xe device

probably better to not add the TODO things at all, specially
if you are adding this in this series.

> +	INIT_WORK(&user->work, work_period_worker);
> +	return user;
> +}
> +
> +/**
> + * __xe_user_free() - Free user struct
> + * @kref: The reference
> + *
> + * Return: void
> + */
> +void __xe_user_free(struct kref *kref)
> +{
> +	struct xe_user *user =
> +		container_of(kref, struct xe_user, refcount);
> +
> +	kfree(user);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_user.h b/drivers/gpu/drm/xe/xe_user.h
> new file mode 100644
> index 000000000000..e52f66d3f3b0
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_user.h
> @@ -0,0 +1,81 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation

2025

> + */
> +
> +#ifndef _XE_USER_H_
> +#define _XE_USER_H_
> +
> +#include <linux/kref.h>
> +#include <linux/list.h>
> +#include <linux/workqueue.h>
> +
> +/**
> + * This is a per process/user id structure for a xe device

probably not following the doc standards here...

> + * client. It is allocated when a new process/app opens the
> + * xe device and destroyed when the last xe file belonging
> + * to this user id is destroyed.
> + */
> +struct xe_user {
> +	/**
> +	 * @refcount: reference count
> +	 */
> +	struct kref refcount;
> +
> +	/**
> +	 * @xe: pointer to the xe_device
> +	 */
> +	struct xe_device *xe;
> +
> +	/**
> +	 * @filelist_lock: lock protecting the filelist
> +	 */
> +	struct mutex filelist_lock;
> +
> +	/**
> +	 * @filelist: list of xe files belonging to this xe user
> +	 */
> +	struct list_head filelist;
> +
> +	/**
> +	 * @work: work to emit the gpu work period event for this
> +	 * xe user
> +	 */
> +	struct work_struct work;
> +
> +	/**
> +	 * @uid: user id for this xe_user
> +	 */
> +	u32 uid;
> +
> +	/**
> +	 * @active_duration_ns: sum total of xe_file.active_duration_ns
> +	 * for all xe files belonging to this xe user
> +	 */
> +	u64 active_duration_ns;
> +
> +	/**
> +	 * @last_timestamp_ns: timestamp in ns when we last emitted event
> +	 * for this xe user
> +	 */
> +	u64 last_timestamp_ns;
> +};
> +
> +struct xe_user *xe_user_alloc(void);
> +
> +static inline struct xe_user *
> +xe_user_get(struct xe_user *user)
> +{
> +	kref_get(&user->refcount);
> +	return user;
> +}
> +
> +void __xe_user_free(struct kref *kref);
> +
> +static inline void xe_user_put(struct xe_user *user)
> +{
> +	kref_put(&user->refcount, __xe_user_free);
> +}
> +
> +#endif // _XE_USER_H_
> +
> -- 
> 2.49.0
> 

Re: [PATCH v4 3/9] drm/xe: Add a trace point for GPU work period

[Rodrigo Vivi]

On Fri, Sep 26, 2025 at 10:45:14AM +0000, Aakash Deep Sarkar wrote:
> The GPU work period event is required to have the following format:
> 
> Defines the structure of the kernel tracepoint:
> /sys/kernel/tracing/events/power/gpu_work_period
> 
> A value that uniquely identifies the GPU within the system.
>   uint32_t gpu_id;
> 
> The UID of the application (i.e. persistent, unique ID of the Android
> app) that submitted work to the GPU.
>   uint32_t uid;
> 
> The start time of the period in nanoseconds. The clock must be
> CLOCK_MONOTONIC_RAW, as returned by the ktime_get_raw_ns(void) function.
>   uint64_t start_time_ns;
> 
> The end time of the period in nanoseconds. The clock must be
> CLOCK_MONOTONIC_RAW, as returned by the ktime_get_raw_ns(void) function.
>   uint64_t end_time_ns;
> 
> The amount of time the GPU was running GPU work for |uid| during the
> period, in nanoseconds, without double-counting parallel GPU work for the
> same |uid|. For example, this might include the amount of time the GPU
> spent performing shader work (vertex work, fragment work, etc.) for
> |uid|.
>   uint64_t total_active_duration_ns;
> 
> Signed-off-by: Aakash Deep Sarkar <aakash.deep.sarkar@intel.com>
> ---
>  include/trace/gpu_work_period.h | 59 +++++++++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 include/trace/gpu_work_period.h
> 
> diff --git a/include/trace/gpu_work_period.h b/include/trace/gpu_work_period.h
> new file mode 100644
> index 000000000000..e06467625705
> --- /dev/null
> +++ b/include/trace/gpu_work_period.h
> @@ -0,0 +1,59 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#undef TRACE_SYSTEM
> +#define TRACE_SYSTEM power
> +
> +#if !defined(_TRACE_GPU_WORK_PERIOD_H) || defined(TRACE_HEADER_MULTI_READ)
> +#define _TRACE_GPU_WORK_PERIOD_H
> +
> +#include <linux/tracepoint.h>
> +
> +TRACE_EVENT(gpu_work_period,

oh! not again please!
Stop trying to brute force this.

If it is a xe trace you need to add 'xe_' prefix.

If you really need the 'gpu_' prefix because of Android, this
needs to go through the drm layer, not a driver specific.

> +
> +	TP_PROTO(
> +		u32 gpu_id,
> +		u32 uid,
> +		u64 start_time_ns,
> +		u64 end_time_ns,
> +		u64 total_active_duration_ns
> +	),
> +
> +	TP_ARGS(gpu_id, uid, start_time_ns, end_time_ns, total_active_duration_ns),
> +
> +	TP_STRUCT__entry(
> +		__field(u32, gpu_id)
> +		__field(u32, uid)
> +		__field(u64, start_time_ns)
> +		__field(u64, end_time_ns)
> +		__field(u64, total_active_duration_ns)
> +	),
> +
> +	TP_fast_assign(
> +		__entry->gpu_id = gpu_id;
> +		__entry->uid = uid;
> +		__entry->start_time_ns = start_time_ns;
> +		__entry->end_time_ns = end_time_ns;
> +		__entry->total_active_duration_ns = total_active_duration_ns;
> +	),
> +
> +	TP_printk("gpu_id=%u uid=%u start_time_ns=%llu end_time_ns=%llu total_active_duration_ns=%llu",
> +		__entry->gpu_id,
> +		__entry->uid,
> +		__entry->start_time_ns,
> +		__entry->end_time_ns,
> +		__entry->total_active_duration_ns)
> +);
> +
> +#endif /* _TRACE_GPU_WORK_PERIOD_H */
> +
> +/* This part must be outside protection */
> +
> +#undef TRACE_INCLUDE_FILE
> +#define TRACE_INCLUDE_FILE gpu_work_period
> +#undef TRACE_INCLUDE_PATH
> +#define TRACE_INCLUDE_PATH .
> +
> +#include <trace/define_trace.h>
> -- 
> 2.49.0
> 

Re: [PATCH v4 3/9] drm/xe: Add a trace point for GPU work period

[Dixit, Ashutosh]

On Thu, 02 Oct 2025 07:42:33 -0700, Rodrigo Vivi wrote:
>
> > diff --git a/include/trace/gpu_work_period.h b/include/trace/gpu_work_period.h
> > new file mode 100644
> > index 000000000000..e06467625705
> > --- /dev/null
> > +++ b/include/trace/gpu_work_period.h
> > @@ -0,0 +1,59 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2025 Intel Corporation
> > + */
> > +
> > +#undef TRACE_SYSTEM
> > +#define TRACE_SYSTEM power
> > +
> > +#if !defined(_TRACE_GPU_WORK_PERIOD_H) || defined(TRACE_HEADER_MULTI_READ)
> > +#define _TRACE_GPU_WORK_PERIOD_H
> > +
> > +#include <linux/tracepoint.h>
> > +
> > +TRACE_EVENT(gpu_work_period,
>
> oh! not again please!
> Stop trying to brute force this.
>
> If it is a xe trace you need to add 'xe_' prefix.
>
> If you really need the 'gpu_' prefix because of Android, this
> needs to go through the drm layer, not a driver specific.

Also, drm layer patches need to be sent to the following mail lists:

	intel-gfx@lists.freedesktop.org
	dri-devel@lists.freedesktop.org
	intel-xe@lists.freedesktop.org

Also, see previous similar comments on the gpu_frequency tracepoint series.

Thanks.
--
Ashutosh