From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: "Iddamsetty, Aravind" <aravind.iddamsetty@intel.com>
Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com>,
intel-xe@lists.freedesktop.org,
Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: Re: [Intel-xe] [PATCH v2 2/2] drm/xe/pmu: Enable PMU interface
Date: Sun, 09 Jul 2023 22:57:40 -0700 [thread overview]
Message-ID: <87wmz8gvfv.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <d35680a0-b829-3a4d-897e-b581e86976e1@intel.com>
On Sun, 09 Jul 2023 21:13:59 -0700, Iddamsetty, Aravind wrote:
>
> On 09-07-2023 06:02, Dixit, Ashutosh wrote:
> > On Thu, 06 Jul 2023 20:53:47 -0700, Iddamsetty, Aravind wrote:
> >> On 07-07-2023 07:48, Dixit, Ashutosh wrote:
> >>> On Thu, 06 Jul 2023 06:42:29 -0700, Iddamsetty, Aravind wrote:
> >>> Also, could you please explain where the requirement to expose these OAG
> >>> group busy/free registers via the PMU is coming from? Since these are OA
> >>> registers presumably they can be collected using the OA subsystem.
> >>
> >> L0 sysman needs this
> >> https://spec.oneapi.io/level-zero/latest/sysman/api.html#zes-engine-properties-t
> >> and xpumanager uses this
> >> https://github.com/intel/xpumanager/blob/master/core/src/device/gpu/gpu_device.cpp
> >
> > Also there is the above mentioned open regarding this: "Since these are OA
> > registers presumably they can be collected using the OA subsystem". L0 now
> > seems to be supporting OA and we are going to provide an OA subsystem for
> > xe. This probably also needs arch input.
>
> While I try to check on this, by any chance do you know why we have to
> go with custom OA subsystem implementation and cannot use PMU for
> reporting OA.
Because we already had a big OA subsystem in i915 (i915_perf.c) which we
are bringing over to xe. And OA has many more metrics than just the few we
are exposing (or had exposed via the PMU). You can see these metrics in
build/lib directory of the IGT build (after you compile IGT). Grep for
busyness. Some of metrics which come from GuC will not be available from OA
(since OA data is HW generated) so we will have to expose these separately.
Separately, I think it would be good to understand how other drm drivers
expose such performance data (such as what we were doing in i915 with OA
and PMU) for userland to digest.
Let's see. I am not against PMU per se, just asking questions so we can get
some opinion about these things before we commit to supporting the PMU
interface.
Thanks.
--
Ashutosh
next prev parent reply other threads:[~2023-07-10 5:57 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-27 12:21 [Intel-xe] [PATCH v2 0/2] drm/xe/pmu: Enable PMU interface Aravind Iddamsetty
2023-06-27 12:21 ` [Intel-xe] [PATCH v2 1/2] drm/xe: Get GT clock to nanosecs Aravind Iddamsetty
2023-07-04 9:29 ` Upadhyay, Tejas
2023-07-04 10:14 ` Upadhyay, Tejas
2023-07-05 4:46 ` Iddamsetty, Aravind
2023-07-06 0:55 ` Dixit, Ashutosh
2023-06-27 12:21 ` [Intel-xe] [PATCH v2 2/2] drm/xe/pmu: Enable PMU interface Aravind Iddamsetty
2023-06-30 13:53 ` Upadhyay, Tejas
2023-07-03 5:11 ` Iddamsetty, Aravind
2023-07-04 3:34 ` Ghimiray, Himal Prasad
2023-07-05 4:52 ` Iddamsetty, Aravind
2023-07-04 9:10 ` Upadhyay, Tejas
2023-07-05 4:42 ` Iddamsetty, Aravind
2023-07-06 2:39 ` Dixit, Ashutosh
2023-07-06 13:42 ` Iddamsetty, Aravind
2023-07-07 2:18 ` Dixit, Ashutosh
2023-07-07 3:53 ` Iddamsetty, Aravind
2023-07-07 6:08 ` Dixit, Ashutosh
2023-07-07 10:42 ` Iddamsetty, Aravind
2023-07-07 21:25 ` Dixit, Ashutosh
2023-07-10 6:05 ` Iddamsetty, Aravind
2023-07-10 8:12 ` Ursulin, Tvrtko
2023-07-11 16:19 ` Iddamsetty, Aravind
2023-07-11 23:10 ` Dixit, Ashutosh
2023-07-12 3:11 ` Iddamsetty, Aravind
2023-07-12 5:24 ` Dixit, Ashutosh
2023-07-11 22:58 ` Dixit, Ashutosh
2023-07-09 0:32 ` Dixit, Ashutosh
2023-07-10 4:13 ` Iddamsetty, Aravind
2023-07-10 5:57 ` Dixit, Ashutosh [this message]
2023-07-18 5:07 ` Dixit, Ashutosh
2023-07-19 6:59 ` Iddamsetty, Aravind
2023-07-06 2:40 ` Belgaumkar, Vinay
2023-07-06 13:06 ` Iddamsetty, Aravind
2023-07-21 1:02 ` Dixit, Ashutosh
2023-07-21 11:51 ` Iddamsetty, Aravind
2023-07-21 23:36 ` Dixit, Ashutosh
2023-07-22 6:04 ` Dixit, Ashutosh
2023-07-24 8:03 ` Iddamsetty, Aravind
2023-07-24 9:00 ` Ursulin, Tvrtko
2023-07-24 15:52 ` Dixit, Ashutosh
2023-07-24 15:52 ` Dixit, Ashutosh
2023-07-24 16:05 ` Iddamsetty, Aravind
2023-07-24 16:31 ` Dixit, Ashutosh
2023-07-25 11:38 ` Iddamsetty, Aravind
2023-08-07 21:16 ` Dixit, Ashutosh
2023-08-07 22:22 ` Dixit, Ashutosh
2023-08-08 13:45 ` Iddamsetty, Aravind
2023-08-08 15:18 ` Dixit, Ashutosh
2023-08-09 4:26 ` Iddamsetty, Aravind
2023-08-09 5:02 ` Dixit, Ashutosh
2023-07-24 9:38 ` Iddamsetty, Aravind
2023-07-22 14:39 ` Dixit, Ashutosh
2023-07-24 8:02 ` Iddamsetty, Aravind
2023-06-27 13:04 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe/pmu: Enable PMU interface (rev2) Patchwork
2023-06-27 13:05 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-06-27 13:06 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-06-27 13:10 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-06-27 13:10 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
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