From: Raag Jadav <raag.jadav@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, daniele.ceraolospurio@intel.com,
riana.tauro@intel.com, mallesh.koujalagi@intel.com,
aravind.iddamsetty@intel.com, himal.prasad.ghimiray@intel.com,
arvind.yadav@intel.com, syed.abdul.muqthyar.ahmed@intel.com,
nitin.r.gote@intel.com, pravalika.gurram@intel.com
Subject: Re: [PATCH v4 12/12] drm/xe/xe_ras: Report correctable errors using SIGID
Date: Fri, 16 Oct 2026 05:05:43 +0200 [thread overview]
Message-ID: <atGUh1N45hl6wzoU@black.igk.intel.com> (raw)
In-Reply-To: <20261009104602.1075405-26-badal.nilawar@intel.com>
On Fri, Oct 09, 2026 at 04:16:15PM +0530, Badal Nilawar wrote:
> Use xe_log_* helper to report correctable errors.
>
> Assisted-by: Copilot:Claude-Opus-5.5
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> Cc: Raag Jadav <raag.jadav@intel.com>
> ---
> v4:
> - Pass structured log component to xe_log_from() (sashiko)
> ---
> drivers/gpu/drm/xe/xe_ras.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index af2970941b59..9df2e8942bda 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -3,6 +3,8 @@
> * Copyright © 2026 Intel Corporation
> */
>
> +#include <linux/bitfield.h>
> +
> #include "xe_configfs.h"
> #include "xe_cper.h"
> #include "xe_debugfs.h"
> @@ -216,6 +218,12 @@ static u8 ras_sev_to_cper_sev(u8 ras_sev)
> }
> }
>
> +static u16 ras_comp_to_log_comp(u8 component)
> +{
> + return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
> + FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
> +}
> +
> static inline const char *sev_to_str(u8 severity)
> {
> if (severity >= XE_RAS_SEV_MAX)
> @@ -459,8 +467,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> if (!ras_counter_is_valid(xe, &errors[id]))
> continue;
>
> - xe_warn(xe, "[RAS]: %s %s detected\n",
> - comp_to_str(component), sev_to_str(severity));
> + xe_log_from(xe, ras_sev_to_cper_sev(severity),
> + ras_comp_to_hw_sigid(component),
> + ras_comp_to_log_comp(component),
> + &errors[id], sizeof(errors[id]),
> + "error detected\n");
Please add a reference log in commit message, so we don't leave people
guessing (in all patches).
Raag
> /* Send event once per component */
> if (sent & BIT(component))
> --
> 2.54.0
>
next prev parent reply other threads:[~2026-10-16 3:06 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 10:46 [PATCH v4 00/12] Add CPER logging support for CRI Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-09 10:43 ` sashiko-bot
2026-10-09 12:17 ` Nilawar, Badal
2026-10-12 6:18 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-09 10:46 ` sashiko-bot
2026-10-09 12:27 ` Nilawar, Badal
2026-10-12 9:07 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 03/12] drm/xe/cper: Initialize Intel-specific error section header Badal Nilawar
2026-10-14 7:27 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 04/12] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-14 10:30 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-10-09 10:40 ` sashiko-bot
2026-10-09 12:45 ` Nilawar, Badal
2026-10-14 15:19 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-10-09 10:41 ` sashiko-bot
2026-10-09 13:07 ` Nilawar, Badal
2026-10-15 9:45 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 07/12] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-15 10:36 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-09 10:38 ` sashiko-bot
2026-10-09 10:46 ` [PATCH v4 09/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-10-14 9:05 ` Mallesh, Koujalagi
2026-10-09 10:46 ` [PATCH v4 10/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-14 9:28 ` Mallesh, Koujalagi
2026-10-14 9:30 ` Tauro, Riana
2026-10-16 2:55 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 11/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-14 9:31 ` Mallesh, Koujalagi
2026-10-16 3:01 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 12/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-09 10:50 ` sashiko-bot
2026-10-16 3:05 ` Raag Jadav [this message]
2026-10-09 10:54 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev4) Patchwork
2026-10-09 10:56 ` ✓ CI.KUnit: success " Patchwork
2026-10-09 12:03 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-10-09 15:13 ` ✓ Xe.CI.FULL: success " Patchwork
2026-10-12 6:14 ` [PATCH v4 00/12] Add CPER logging support for CRI Raag Jadav
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