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From: "Cheatham, Benjamin" <benjamin.cheatham@amd.com>
To: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: <linux-cxl@vger.kernel.org>
Subject: Re: [PATCH 12/17] cxl/core: Add CXL snoop filter setup and allocation
Date: Wed, 17 Dec 2025 12:02:23 -0600	[thread overview]
Message-ID: <0f8c5027-7adf-4891-a287-e9e085842ebf@amd.com> (raw)
In-Reply-To: <20251217163556.00001f58@huawei.com>

On 12/17/2025 10:35 AM, Jonathan Cameron wrote:
> On Tue, 11 Nov 2025 15:40:27 -0600
> Ben Cheatham <Benjamin.Cheatham@amd.com> wrote:
> 
>> The CXL snoop filter capability (CXL 3.2 8.2.4.23) is a mandatory
>> capability for CXL 2.0+ root ports that is used by the host and CXL
>> devices to manage CXL cache coherence.
>>
>> Snoop filters may be shared by several CXL root ports, with each snoop
>> filter having a unique group id. Create snoop filter instances as CXL
>> root ports are added to the system. If the snoop filter already exists,
>> add the root port to the existing filter instead.
>>
>> Snoop filter instances are used to keep track of the amount of CXL cache
>> space active under the filter. The CXL specification allows rejecting
>> CXL devices based on the amount of filter subscription, but determining
>> when the filter is oversaturated is most likely implementation specific.
>> To address this, add a cxl_core module parameter to specify whether
>> adding a CXL.cache device's cache to an already full filter should fail
>> device probe. The default setting of the parameter is to allow
>> oversaturation of the filter ("strict_snoop=off").
>>
>> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>
>> ---
>>
>> Jonathan asked about the allocation policy when the snoop filter is
>> "full". I had the device fail probe beforehand, but it got me thinking
>> that it may be worthwhile to add an option to over commit the filter
>> instead, hence the module parameter. I'm game to other suggestions, but
>> a config symbol didn't feel right since the setting probably varies by
>> platform/user.
> 
> Doesn't feel like a module parameter is appropriate as may depend on
> specific devices as well. Ideally we want the capacity and device requirements
> to be exposed to user space before deciding to bring it in and how to handle
> minimum vs ideal levels.
> 
> Tricky topic and once we get a little nearer merging this + have some
> device drivers to poke at lets revisit. Maybe on one of the sync calls.
> 

That makes sense, I just wanted to add something to get the ball rolling. I'm
fine delaying it until this starts being considered for a merge and/or
discussing on a sync call.

>  
>>
>> Also I'll add Cache_SF_Coverage support when this series goes out of
>> RFC (I forgot to do it this time around).
>>
> 
> On a related topic, how do we know the right Cache_SF_Granularity for
> a given system?  Might be a specification gap (or I just can't find it)
> 

That's a good question. I guess I just assumed that it would be programmed
by the platform firmware, but it may be that the OS is supposed to program it?
It's pretty ambiguous, so a spec clarification may be needed.

> Jonathan
> 
> 


  reply	other threads:[~2025-12-17 18:10 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-11 21:40 [RFC v2 PATCH 00/17] Initial CXL.cache device support Ben Cheatham
2025-11-11 21:40 ` [PATCH 01/17] cxl/port: Arrange for always synchronous endpoint attach Ben Cheatham
2025-11-17 15:56   ` Jonathan Cameron
2025-11-11 21:40 ` [PATCH 02/17] cxl: Move struct cxl_dev_state definition Ben Cheatham
2025-11-11 21:40 ` [PATCH 03/17] cxl/core: Add function for getting CXL cache info Ben Cheatham
2025-12-17 16:09   ` Jonathan Cameron
2025-12-17 18:01     ` Cheatham, Benjamin
2025-11-11 21:40 ` [PATCH 04/17] cxl/core: Add CXL.cache device struct Ben Cheatham
2025-12-17 16:14   ` Jonathan Cameron
2025-11-11 21:40 ` [PATCH 05/17] cxl/cache: Add cxl_cache driver Ben Cheatham
2025-12-17 16:17   ` Jonathan Cameron
2025-12-17 18:01     ` Cheatham, Benjamin
2025-11-11 21:40 ` [PATCH 06/17] cxl: Replace cxl_mem_find_port() with cxl_dev_find_port() Ben Cheatham
2025-12-17 16:18   ` Jonathan Cameron
2025-12-17 18:01     ` Cheatham, Benjamin
2025-11-11 21:40 ` [PATCH 07/17] cxl: Change cxl_ep_load() to use struct device * parameter Ben Cheatham
2025-11-11 21:40 ` [PATCH 08/17] cxl/core: Update devm_cxl_enumerate_ports() Ben Cheatham
2025-11-11 21:40 ` [PATCH 09/17] cxl/port: Split endpoint port probe on device type Ben Cheatham
2025-11-11 21:40 ` [PATCH 10/17] cxl/cache, mem: Prevent RAS register mapping race Ben Cheatham
2025-12-17 16:23   ` Jonathan Cameron
2025-12-17 18:02     ` Cheatham, Benjamin
2025-11-11 21:40 ` [PATCH 11/17] cxl/core, port: Update devm_cxl_add_endpoint() Ben Cheatham
2025-11-11 21:40 ` [PATCH 12/17] cxl/core: Add CXL snoop filter setup and allocation Ben Cheatham
2025-12-17 16:35   ` Jonathan Cameron
2025-12-17 18:02     ` Cheatham, Benjamin [this message]
2025-11-11 21:40 ` [PATCH 13/17] cxl/core: Add cache id verification Ben Cheatham
2025-12-22 13:47   ` Jonathan Cameron
2026-01-05 21:16     ` Cheatham, Benjamin
2025-11-11 21:40 ` [PATCH 14/17] cxl/port: Add cache id programming Ben Cheatham
2025-11-11 21:40 ` [PATCH 15/17] cxl/port: Bypass cache id for singleton cache devices Ben Cheatham
2025-11-11 21:40 ` [PATCH 16/17] cxl/core: Add cache device attributes Ben Cheatham
2025-12-17 16:12   ` Jonathan Cameron
2025-12-17 18:02     ` Cheatham, Benjamin
2025-11-11 21:40 ` [PATCH 17/17] cxl/core: Add cache device cache management attributes Ben Cheatham

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