From: Ira Weiny <ira.weiny@intel.com>
To: Dan Williams <dan.j.williams@intel.com>, <linux-cxl@vger.kernel.org>
Cc: Dave Jiang <dave.jiang@intel.com>,
Alejandro Lucero <alucerop@amd.com>,
Ira Weiny <ira.weiny@intel.com>, <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH v2 2/5] cxl: Introduce to_{ram,pmem}_{res,perf}() helpers
Date: Wed, 22 Jan 2025 08:18:10 -0600 [thread overview]
Message-ID: <6790fe2295879_1eafc29441@iweiny-mobl.notmuch> (raw)
In-Reply-To: <173753636159.3849855.512949598685608224.stgit@dwillia2-xfh.jf.intel.com>
Dan Williams wrote:
> In preparation for consolidating all DPA partition information into an
> array of DPA metadata, introduce helpers that hide the layout of the
> current data. I.e. make the eventual replacement of ->ram_res,
> ->pmem_res, ->ram_perf, and ->pmem_perf with a new DPA metadata array a
> no-op for code paths that consume that information, and reduce the noise
> of follow-on patches.
>
> The end goal is to consolidate all DPA information in 'struct
> cxl_dev_state', but for now the helpers just make it appear that all DPA
> metadata is relative to @cxlds.
>
> Note that a follow-on patch also cleans up the temporary placeholders of
> @ram_res, and @pmem_res in the qos_class manipulation code,
> cxl_dpa_alloc(), and cxl_mem_create_range_info().
>
> Cc: Dave Jiang <dave.jiang@intel.com>
> Cc: Alejandro Lucero <alucerop@amd.com>
> Cc: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
next prev parent reply other threads:[~2025-01-22 14:18 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-22 8:59 [PATCH v2 0/5] cxl: DPA partition metadata is a mess Dan Williams
2025-01-22 8:59 ` [PATCH v2 1/5] cxl: Remove the CXL_DECODER_MIXED mistake Dan Williams
2025-01-22 14:11 ` Ira Weiny
2025-01-23 15:49 ` Jonathan Cameron
2025-01-23 15:58 ` Alejandro Lucero Palau
2025-01-23 16:03 ` Dave Jiang
2025-01-22 8:59 ` [PATCH v2 2/5] cxl: Introduce to_{ram,pmem}_{res,perf}() helpers Dan Williams
2025-01-22 14:18 ` Ira Weiny [this message]
2025-01-23 15:57 ` Jonathan Cameron
2025-01-23 20:01 ` Dan Williams
2025-01-23 16:13 ` Dave Jiang
2025-01-23 16:25 ` Alejandro Lucero Palau
2025-01-23 21:04 ` Dan Williams
2025-01-24 10:15 ` Alejandro Lucero Palau
2025-01-25 0:45 ` Dan Williams
2025-01-22 8:59 ` [PATCH v2 3/5] cxl: Introduce 'struct cxl_dpa_partition' and 'struct cxl_range_info' Dan Williams
2025-01-22 14:53 ` Ira Weiny
2025-01-22 22:24 ` Dan Williams
2025-01-23 3:10 ` Ira Weiny
2025-01-23 16:09 ` Jonathan Cameron
2025-01-23 20:24 ` Dan Williams
2025-01-23 16:57 ` Dave Jiang
2025-01-23 17:00 ` Alejandro Lucero Palau
2025-01-23 22:43 ` Dan Williams
2025-01-23 17:17 ` Alejandro Lucero Palau
2025-01-23 22:48 ` Dan Williams
2025-01-24 10:29 ` Alejandro Lucero Palau
2025-01-22 8:59 ` [PATCH v2 4/5] cxl: Make cxl_dpa_alloc() DPA partition number agnostic Dan Williams
2025-01-22 16:29 ` Ira Weiny
2025-01-22 22:35 ` Dan Williams
2025-01-23 3:14 ` Ira Weiny
2025-01-23 3:28 ` Dan Williams
2025-01-23 16:41 ` Jonathan Cameron
2025-01-23 21:34 ` Dan Williams
2025-01-23 17:21 ` Alejandro Lucero Palau
2025-01-23 20:52 ` Dave Jiang
2025-01-22 8:59 ` [PATCH v2 5/5] cxl: Kill enum cxl_decoder_mode Dan Williams
2025-01-22 17:42 ` Ira Weiny
2025-01-22 22:58 ` Dan Williams
2025-01-23 3:39 ` Ira Weiny
2025-01-23 4:11 ` Dan Williams
2025-01-23 21:30 ` Dave Jiang
2025-01-24 22:22 ` Ira Weiny
2025-01-23 16:51 ` Jonathan Cameron
2025-01-23 21:50 ` Dan Williams
2025-01-23 17:20 ` Alejandro Lucero Palau
2025-01-23 21:29 ` Dave Jiang
2025-01-23 17:23 ` [PATCH v2 0/5] cxl: DPA partition metadata is a mess Alejandro Lucero Palau
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