Re: [PATCH v6 10/16] ASoC: rsnd: Add SSI reset support for RZ/G3E platform

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The commit message claims that `rsnd_ssi_use_busif()` is modified to always return 1 for the RZ/G3E platform to prevent PIO mode, but this implementation is entirely missing from the patch.
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commit 9fb40a1158dd3311ef34bf2a0294ba24c8a07ed6
Author: John Madieu <john.madieu.xa@bp.renesas.com>

ASoC: rsnd: Add SSI reset support for RZ/G3E platform

This commit adds SSI reset support for the Renesas RZ/G3E SoC, using
per-SSI reset lines. It also mentions updating the driver to consistently
select the BUSIF DMA path.

> To support these differences, rsnd_ssi_use_busif() always returns 1
> on RZ/G3E, ensuring that the driver consistently selects the BUSIF
> DMA path.

Is the modification to rsnd_ssi_use_busif() missing from this patch?

The commit message states that the function is updated to always return 1
for the RZ/G3E platform, but the diff does not contain any changes to
rsnd_ssi_use_busif().

> diff --git a/sound/soc/renesas/rcar/ssi.c b/sound/soc/renesas/rcar/ssi.c
> index cf98cc9ee44c3..e6734671328c8 100644
> --- a/sound/soc/renesas/rcar/ssi.c
> +++ b/sound/soc/renesas/rcar/ssi.c

[ ... ]

> @@ -1220,7 +1232,7 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
>  			ops = &rsnd_ssi_dma_ops;
>  
>  		ret = rsnd_mod_init(priv, rsnd_mod_get(ssi), ops, clk,
> -				    NULL, RSND_MOD_SSI, i);
> +				    rstc, RSND_MOD_SSI, i);

Without the rsnd_ssi_use_busif() enforcement, the driver could still select
PIO mode if the pio-transfer property is set in the Device Tree, or if DMA
allocation fails and triggers rsnd_ssi_fallback().

Since RZ/G3E does not implement the SSITDR and SSIRDR registers used in PIO
mode, does this regression risk causing a bus fault when accessing those
unimplemented registers?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260512182631.3842065-1-john.madieu.xa@bp.renesas.com?part=10