From: sashiko-bot@kernel.org
To: "John Madieu" <john.madieu.xa@bp.renesas.com>
Cc: krzk+dt@kernel.org, conor+dt@kernel.org,
wsa+renesas@sang-engineering.com, devicetree@vger.kernel.org,
robh@kernel.org
Subject: Re: [PATCH v6 14/16] ASoC: rsnd: src: Add SRC reset and clock support for RZ/G3E
Date: Thu, 14 May 2026 05:04:59 +0000 [thread overview]
Message-ID: <20260514050500.5AA86C2BCB7@smtp.kernel.org> (raw)
In-Reply-To: <20260512182631.3842065-15-john.madieu.xa@bp.renesas.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Missing error rollback in the probe loop leaves hardware permanently deasserted.
- [Low] Redundant devres allocations for a shared reset control inside a loop.
--
commit 987ecf3576f0681ad0809aeed224f14241a758ce
Author: John Madieu <john.madieu.xa@bp.renesas.com>
ASoC: rsnd: src: Add SRC reset and clock support for RZ/G3E
This commit introduces explicit Sampling Rate Converter Unit (SCU) reset and
clock management for the RZ/G3E SoC. It adds support for the shared SCU
reset controller used by all SRC modules and manages the SCU supply clock
with the same lifetime as the other SCU clocks.
> diff --git a/sound/soc/renesas/rcar/src.c b/sound/soc/renesas/rcar/src.c
> --- a/sound/soc/renesas/rcar/src.c
> +++ b/sound/soc/renesas/rcar/src.c
[ ... ]
> @@ -754,6 +792,16 @@ int rsnd_src_probe(struct rsnd_priv *priv)
> goto rsnd_src_probe_done;
> }
>
> + /*
> + * RZ/G3E uses a shared SCU reset controller for all SRC modules.
> + * R-Car platforms typically don't have SRC reset controls.
> + */
> + rstc = devm_reset_control_get_optional_shared(dev, "scu");
Is it intended to fetch the shared reset control inside the loop?
Since it queries the parent device using a constant string, it resolves to
the exact same shared reset control on every iteration. Could this be moved
outside the loop to avoid duplicate devres allocations and repeated refcount
increments for the same resource?
The resulting single rstc instance could then be safely passed to
rsnd_mod_init() during each iteration, as the reset subsystem correctly
handles multiple deassertions on the same shared wrapper.
> + if (IS_ERR(rstc)) {
> + ret = PTR_ERR(rstc);
> + goto rsnd_src_probe_done;
> + }
> +
> clk = rsnd_devm_clk_get_indexed(dev, SRC_NAME, i);
> if (IS_ERR(clk)) {
> ret = PTR_ERR(clk);
> goto rsnd_src_probe_done;
> }
Does this error path leave the hardware permanently deasserted for modules
initialized in previous iterations?
When an error occurs here, the function returns without rolling back the
modules successfully initialized earlier in the loop. rsnd_mod_init()
explicitly deasserts the reset control:
rsnd_mod_init()
...
ret = reset_control_deassert(rstc);
...
Since devres only drops object references via reset_control_put() and does
not assert the reset line on failure, the hardware reset might remain
permanently deasserted.
While the failure to unwind the clock prepare count on this error path appears
to be a pre-existing condition, the reset deassert state leak is introduced
here. Could an explicit rollback be added to handle this?
> ret = rsnd_mod_init(priv, rsnd_mod_get(src),
> - &rsnd_src_ops, clk, NULL, RSND_MOD_SRC, i);
> + &rsnd_src_ops, clk, rstc, RSND_MOD_SRC, i);
> if (ret)
> goto rsnd_src_probe_done;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260512182631.3842065-1-john.madieu.xa@bp.renesas.com?part=14
next prev parent reply other threads:[~2026-05-14 5:05 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 18:26 [PATCH v6 00/16] ASoC: rsnd: Add RZ/G3E audio driver support John Madieu
2026-05-12 18:26 ` [PATCH v6 01/16] ASoC: dt-bindings: sound: Add DT binding for RZ/G3E sound John Madieu
2026-05-13 23:45 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 02/16] ASoC: rsnd: Fix RSND_SOC_MASK width to single nibble John Madieu
2026-05-12 18:26 ` [PATCH v6 03/16] ASoC: rsnd: Add reset controller support to rsnd_mod John Madieu
2026-05-14 0:07 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 04/16] ASoC: rsnd: Support hyphen or dot in indexed clock and reset names John Madieu
2026-05-14 0:45 ` Mark Brown
2026-05-12 18:26 ` [PATCH v6 05/16] ASoC: rsnd: Add RZ/G3E SoC probing and register map John Madieu
2026-05-14 0:51 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 06/16] ASoC: rsnd: Add audmacpp clock and reset support for RZ/G3E John Madieu
2026-05-14 1:11 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 07/16] ASoC: rsnd: Refactor DMA address tables with named structs John Madieu
2026-05-12 18:26 ` [PATCH v6 08/16] ASoC: rsnd: Add RZ/G3E DMA address calculation support John Madieu
2026-05-14 2:13 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 09/16] ASoC: rsnd: ssui: Add RZ/G3E SSIU BUSIF support John Madieu
2026-05-13 0:35 ` Kuninori Morimoto
2026-05-13 5:04 ` John Madieu
2026-05-13 23:02 ` Kuninori Morimoto
2026-05-13 9:41 ` Geert Uytterhoeven
2026-05-13 15:30 ` John Madieu
2026-05-14 2:58 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 10/16] ASoC: rsnd: Add SSI reset support for RZ/G3E platform John Madieu
2026-05-14 3:22 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 11/16] ASoC: rsnd: Add ADG reset support for RZ/G3E John Madieu
2026-05-14 3:46 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 12/16] ASoC: rsnd: adg: Add per-SSI ADG and SSIF supply clock management John Madieu
2026-05-14 4:09 ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 13/16] ASoC: rsnd: adg: Look up RZ/G3E clkin under audio-clk{a,b,c,i} John Madieu
2026-05-12 18:26 ` [PATCH v6 14/16] ASoC: rsnd: src: Add SRC reset and clock support for RZ/G3E John Madieu
2026-05-13 0:44 ` Kuninori Morimoto
2026-05-13 5:17 ` John Madieu
2026-05-14 5:04 ` sashiko-bot [this message]
2026-05-12 18:26 ` [PATCH v6 15/16] ASoC: rsnd: Support unprefixed DT node names " John Madieu
2026-05-12 18:26 ` [PATCH v6 16/16] ASoC: rsnd: Add system suspend/resume support John Madieu
2026-05-14 0:46 ` Mark Brown
2026-05-14 6:09 ` sashiko-bot
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