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From: sashiko-bot@kernel.org
To: "John Madieu" <john.madieu.xa@bp.renesas.com>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org,
	krzk+dt@kernel.org, wsa+renesas@sang-engineering.com,
	robh@kernel.org
Subject: Re: [PATCH v6 11/16] ASoC: rsnd: Add ADG reset support for RZ/G3E
Date: Thu, 14 May 2026 03:46:57 +0000	[thread overview]
Message-ID: <20260514034658.2A599C2BCB7@smtp.kernel.org> (raw)
In-Reply-To: <20260512182631.3842065-12-john.madieu.xa@bp.renesas.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The ADG reset line is deasserted during probe but never asserted on module removal or error paths, causing a state/resource leak.
- [High] The ADG module reset is deasserted before its clock is enabled, violating the hardware reset sequence.
--

commit 6c6d894ea65ae109e5fa8d85239c0bfcc07fc1aa
Author: John Madieu <john.madieu.xa@bp.renesas.com>

ASoC: rsnd: Add ADG reset support for RZ/G3E

This commit adds optional reset control support for the ADG module on
Renesas RZ/G3E SoCs. It retrieves the adg reset line and passes it to
rsnd_mod_init() during probe.

> diff --git a/sound/soc/renesas/rcar/adg.c b/sound/soc/renesas/rcar/adg.c
> --- a/sound/soc/renesas/rcar/adg.c
> +++ b/sound/soc/renesas/rcar/adg.c
> @@ -779,8 +780,11 @@ int rsnd_adg_probe(struct rsnd_priv *priv)
>  	if (!adg)
>  		return -ENOMEM;
>  
> -	ret = rsnd_mod_init(priv, &adg->mod, &adg_ops,
> -		      NULL, NULL, 0, 0);
> +	rstc = devm_reset_control_get_optional_exclusive(dev, "adg");
> +	if (IS_ERR(rstc))
> +		return dev_err_probe(dev, PTR_ERR(rstc), "failed to get adg reset\n");
> +
> +	ret = rsnd_mod_init(priv, &adg->mod, &adg_ops, NULL, rstc, 0, 0);

Does this sequence deassert the reset before the module clock is enabled?

Looking at rsnd_mod_init(), the reset is deasserted immediately:

sound/soc/renesas/rcar/core.c:rsnd_mod_init() {
        ...
        ret = clk_prepare_enable(clk);
        if (ret)
                return ret;

        ret = reset_control_deassert(rstc);
        ...
}

Since NULL is passed for the clk argument in rsnd_adg_probe(), the ADG
clock isn't enabled during this deassertion. The actual ADG clock is
fetched and enabled later in rsnd_adg_probe() via rsnd_adg_get_clkin()
and rsnd_adg_clk_enable().

On Renesas hardware, synchronous resets typically require the module
clock to be actively running when the reset is deasserted. Could this
cause the hardware to miss the reset release or lead to uninitialized
module state?

>  	if (ret)
>  		return ret;

Are there missing cleanup paths for the deasserted reset?

If rsnd_adg_probe() fails later (for example, in rsnd_adg_get_clkin()),
it returns the error directly without jumping to a cleanup path to
re-assert the reset.

Additionally, if rsnd_adg_remove() does not call rsnd_mod_quit() for
the ADG module, does this leave the hardware permanently out of reset
across unbind and rebind cycles?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260512182631.3842065-1-john.madieu.xa@bp.renesas.com?part=11

  reply	other threads:[~2026-05-14  3:46 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-12 18:26 [PATCH v6 00/16] ASoC: rsnd: Add RZ/G3E audio driver support John Madieu
2026-05-12 18:26 ` [PATCH v6 01/16] ASoC: dt-bindings: sound: Add DT binding for RZ/G3E sound John Madieu
2026-05-13 23:45   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 02/16] ASoC: rsnd: Fix RSND_SOC_MASK width to single nibble John Madieu
2026-05-12 18:26 ` [PATCH v6 03/16] ASoC: rsnd: Add reset controller support to rsnd_mod John Madieu
2026-05-14  0:07   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 04/16] ASoC: rsnd: Support hyphen or dot in indexed clock and reset names John Madieu
2026-05-14  0:45   ` Mark Brown
2026-05-12 18:26 ` [PATCH v6 05/16] ASoC: rsnd: Add RZ/G3E SoC probing and register map John Madieu
2026-05-14  0:51   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 06/16] ASoC: rsnd: Add audmacpp clock and reset support for RZ/G3E John Madieu
2026-05-14  1:11   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 07/16] ASoC: rsnd: Refactor DMA address tables with named structs John Madieu
2026-05-12 18:26 ` [PATCH v6 08/16] ASoC: rsnd: Add RZ/G3E DMA address calculation support John Madieu
2026-05-14  2:13   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 09/16] ASoC: rsnd: ssui: Add RZ/G3E SSIU BUSIF support John Madieu
2026-05-13  0:35   ` Kuninori Morimoto
2026-05-13  5:04     ` John Madieu
2026-05-13 23:02       ` Kuninori Morimoto
2026-05-13  9:41   ` Geert Uytterhoeven
2026-05-13 15:30     ` John Madieu
2026-05-14  2:58   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 10/16] ASoC: rsnd: Add SSI reset support for RZ/G3E platform John Madieu
2026-05-14  3:22   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 11/16] ASoC: rsnd: Add ADG reset support for RZ/G3E John Madieu
2026-05-14  3:46   ` sashiko-bot [this message]
2026-05-12 18:26 ` [PATCH v6 12/16] ASoC: rsnd: adg: Add per-SSI ADG and SSIF supply clock management John Madieu
2026-05-14  4:09   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 13/16] ASoC: rsnd: adg: Look up RZ/G3E clkin under audio-clk{a,b,c,i} John Madieu
2026-05-12 18:26 ` [PATCH v6 14/16] ASoC: rsnd: src: Add SRC reset and clock support for RZ/G3E John Madieu
2026-05-13  0:44   ` Kuninori Morimoto
2026-05-13  5:17     ` John Madieu
2026-05-14  5:04   ` sashiko-bot
2026-05-12 18:26 ` [PATCH v6 15/16] ASoC: rsnd: Support unprefixed DT node names " John Madieu
2026-05-12 18:26 ` [PATCH v6 16/16] ASoC: rsnd: Add system suspend/resume support John Madieu
2026-05-14  0:46   ` Mark Brown

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