Re: [PATCH v2 03/11] media: ccs-pll: Check for too high VT PLL multiplier in dual PLL case

[Laurent Pinchart <laurent.pinchart@ideasonboard.com>]

Hi Sakari,

Thank you for the patch.

On Thu, Apr 17, 2025 at 09:53:46AM +0300, Sakari Ailus wrote:
> The check for VT PLL upper limit in dual PLL case was missing. Add it now.
> 
> Fixes: 6c7469e46b60 ("media: ccs-pll: Add trivial dual PLL support")
> Cc: stable@vger.kernel.org
> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
>  drivers/media/i2c/ccs-pll.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
> index 2399cd6509b7..266fcd160da6 100644
> --- a/drivers/media/i2c/ccs-pll.c
> +++ b/drivers/media/i2c/ccs-pll.c
> @@ -312,6 +312,11 @@ __ccs_pll_calculate_vt_tree(struct device *dev,
>  	dev_dbg(dev, "more_mul2: %u\n", more_mul);
>  
>  	pll_fr->pll_multiplier = mul * more_mul;
> +	if (pll_fr->pll_multiplier > lim_fr->max_pll_multiplier) {
> +		dev_dbg(dev, "pll multiplier %u too high\n",
> +			pll_fr->pll_multiplier);
> +		return -EINVAL;
> +	}
>  
>  	if (pll_fr->pll_multiplier * pll_fr->pll_ip_clk_freq_hz >
>  	    lim_fr->max_pll_op_clk_freq_hz)

-- 
Regards,

Laurent Pinchart