From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: linux-media@vger.kernel.org, dongcheng.yan@intel.com
Subject: Re: [PATCH v2 01/11] media: ccs-pll: Start OP pre-PLL multiplier search from correct value
Date: Tue, 22 Apr 2025 14:50:01 +0300 [thread overview]
Message-ID: <20250422115001.GC329@pendragon.ideasonboard.com> (raw)
In-Reply-To: <aAeA1ncpTCgfuI25@kekkonen.localdomain>
On Tue, Apr 22, 2025 at 11:43:18AM +0000, Sakari Ailus wrote:
> On Mon, Apr 21, 2025 at 10:50:04PM +0300, Laurent Pinchart wrote:
> > On Thu, Apr 17, 2025 at 09:53:44AM +0300, Sakari Ailus wrote:
> > > The ccs_pll_calculate() function does a search over possible PLL
> > > configurations to find the "best" one. If the sensor did not support odd
> >
> > s/did not/does not/
> >
> > > pre-PLL divisors and the minimum value (with constraints) wasn't 1, other
> >
> > s/wasn't/isn't/
> >
> > > even values could have errorneously searched (and selected) for the
> >
> > s/could have errorneously searched/
> > s/could be erroneously searched/
> >
> > Do you mean "other odd values" ?
>
> Odd values that aren't 1.
You wrote ", other even values could ...". I think s/even/odd/ is what
you meant.
> > > pre-PLL divisor. Fix this.
> > >
> > > Fixes: 415ddd993978 ("media: ccs-pll: Split limits and PLL configuration into front and back parts")
> > > Cc: stable@vger.kernel.org
> > > Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
> > > ---
> > > drivers/media/i2c/ccs-pll.c | 2 ++
> > > 1 file changed, 2 insertions(+)
> > >
> > > diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
> > > index 34ccda666524..e516ed23e899 100644
> > > --- a/drivers/media/i2c/ccs-pll.c
> > > +++ b/drivers/media/i2c/ccs-pll.c
> > > @@ -815,6 +815,8 @@ int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim,
> > > one_or_more(
> > > DIV_ROUND_UP(op_lim_fr->max_pll_op_clk_freq_hz,
> > > pll->ext_clk_freq_hz))));
> > > + if (!(pll->flags & CCS_PLL_FLAG_EXT_IP_PLL_DIVIDER))
> > > + min_op_pre_pll_clk_div = clk_div_even(min_op_pre_pll_clk_div);
> > > dev_dbg(dev, "pll_op check: min / max op_pre_pll_clk_div: %u / %u\n",
> > > min_op_pre_pll_clk_div, max_op_pre_pll_clk_div);
> > >
> >
> > Is my understanding correct that the problem can only occur during the
> > first iteration of the loop just below ? If so, with the commit message
> > fixed,
>
> Correct.
>
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> >
> > If not, there's something I don't get :-)
>
> :-)
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2025-04-22 11:50 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 6:53 [PATCH v2 00/11] CCS PLL fixes and improvements Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 01/11] media: ccs-pll: Start OP pre-PLL multiplier search from correct value Sakari Ailus
2025-04-21 19:50 ` Laurent Pinchart
2025-04-22 11:43 ` Sakari Ailus
2025-04-22 11:50 ` Laurent Pinchart [this message]
2025-04-22 12:07 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 02/11] media: ccs-pll: Start VT " Sakari Ailus
2025-04-21 19:53 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 03/11] media: ccs-pll: Check for too high VT PLL multiplier in dual PLL case Sakari Ailus
2025-04-21 19:56 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 04/11] media: ccs-pll: Correctly the upper limit of maximum op_pre_pll_clk_div Sakari Ailus
2025-04-21 20:01 ` Laurent Pinchart
2025-04-23 11:55 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 05/11] media: ccs-pll: Print a debug message on too high VT PLL OP clock Sakari Ailus
2025-04-21 20:02 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 06/11] media: ccs-pll: Drop LINK_DECOUPLED flag Sakari Ailus
2025-04-21 20:03 ` Laurent Pinchart
2025-04-23 12:04 ` Sakari Ailus
2025-04-23 12:22 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 07/11] media: ccs-pll: Print missing PLL flags Sakari Ailus
2025-04-21 20:05 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 08/11] media: ccs-pll: Add a flag for even PLL multipliers Sakari Ailus
2025-04-21 20:19 ` Laurent Pinchart
2025-04-23 10:19 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 09/11] media: ccs-pll: Better validate VT PLL branch Sakari Ailus
2025-04-21 20:24 ` Laurent Pinchart
2025-04-23 10:26 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 10/11] media: ccs-pll: Print PLL calculator flags in the beginning Sakari Ailus
2025-04-21 20:25 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 11/11] media: ccs-pll: Document the CCS PLL flags Sakari Ailus
2025-04-21 20:29 ` Laurent Pinchart
2025-04-22 11:49 ` Sakari Ailus
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