From: kernel test robot <lkp@intel.com>
To: Hans Zhang <18255117159@163.com>,
bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, vigneshr@ti.com,
jingoohan1@gmail.com, thomas.petazzoni@bootlin.com,
pali@kernel.org, ryder.lee@mediatek.com,
jianjun.wang@mediatek.com, claudiu.beznea.uj@bp.renesas.com,
mpillai@cadence.com
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
robh@kernel.org, s-vadapalli@ti.com, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
linux-renesas-soc@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com>
Subject: Re: [PATCH v2 8/8] PCI: rzg3s-host: Add 100 ms delay after link training
Date: Thu, 14 May 2026 14:19:35 +0200 [thread overview]
Message-ID: <202605141426.2RPW8nvf-lkp@intel.com> (raw)
In-Reply-To: <20260506152346.166056-9-18255117159@163.com>
Hi Hans,
kernel test robot noticed the following build errors:
[auto build test ERROR on a293ec25d59dd96309058c70df5a4dd0f889a1e4]
url: https://github.com/intel-lab-lkp/linux/commits/Hans-Zhang/PCI-Add-pcie_wait_after_link_train-helper/20260514-132815
base: a293ec25d59dd96309058c70df5a4dd0f889a1e4
patch link: https://lore.kernel.org/r/20260506152346.166056-9-18255117159%40163.com
patch subject: [PATCH v2 8/8] PCI: rzg3s-host: Add 100 ms delay after link training
config: x86_64-kexec (https://download.01.org/0day-ci/archive/20260514/202605141426.2RPW8nvf-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260514/202605141426.2RPW8nvf-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202605141426.2RPW8nvf-lkp@intel.com/
All error/warnings (new ones prefixed by >>):
In file included from drivers/pci/access.c:8:
>> drivers/pci/pci.h:73:3: error: call to undeclared function 'msleep'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
73 | msleep(PCIE_RESET_CONFIG_WAIT_MS);
| ^
1 error generated.
--
In file included from drivers/pci/rebar.c:17:
>> drivers/pci/pci.h:73:3: error: call to undeclared function 'msleep'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
73 | msleep(PCIE_RESET_CONFIG_WAIT_MS);
| ^
>> drivers/pci/rebar.c:142:31: warning: implicit conversion from 'unsigned long long' to 'u32' (aka 'unsigned int') changes value from 140737488355328 to 0 [-Wconstant-conversion]
142 | if (size < 0 || size > ilog2(SZ_128T) - ilog2(PCI_REBAR_MIN_SIZE))
| ~~~~~~^~~~~~~~
include/linux/sizes.h:70:20: note: expanded from macro 'SZ_128T'
70 | #define SZ_128T _AC(0x800000000000, ULL)
| ^~~~~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/const.h:21:18: note: expanded from macro '_AC'
21 | #define _AC(X,Y) __AC(X,Y)
| ^~~~~~~~~
include/uapi/linux/const.h:20:20: note: expanded from macro '__AC'
20 | #define __AC(X,Y) (X##Y)
| ^~~~
<scratch space>:37:1: note: expanded from here
37 | 0x800000000000ULL
| ^~~~~~~~~~~~~~~~~
include/linux/log2.h:162:14: note: expanded from macro 'ilog2'
162 | __ilog2_u32(n) : \
| ~~~~~~~~~~~ ^
1 warning and 1 error generated.
--
In file included from drivers/pci/msi/pcidev_msi.c:5:
>> drivers/pci/msi/../pci.h:73:3: error: call to undeclared function 'msleep'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
73 | msleep(PCIE_RESET_CONFIG_WAIT_MS);
| ^
1 error generated.
--
In file included from drivers/pci/pcie/portdrv.c:22:
>> drivers/pci/pcie/../pci.h:73:3: error: call to undeclared function 'msleep'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
73 | msleep(PCIE_RESET_CONFIG_WAIT_MS);
| ^
1 error generated.
vim +/msleep +73 drivers/pci/pci.h
62
63 /**
64 * pcie_wait_after_link_train - Wait 100 ms if link speed > 5 GT/s
65 * @max_link_speed: the maximum link speed (2 = 5.0 GT/s, 3 = 8.0 GT/s, ...)
66 *
67 * Must be called after Link training completes and before the first
68 * Configuration Request is sent.
69 */
70 static inline void pcie_wait_after_link_train(int max_link_speed)
71 {
72 if (max_link_speed > 2)
> 73 msleep(PCIE_RESET_CONFIG_WAIT_MS);
74 }
75
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2026-05-14 12:20 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-06 15:23 [PATCH v2 0/8] PCI: Add common helper for 100 ms delay after link training Hans Zhang
2026-05-06 15:23 ` [PATCH v2 1/8] PCI: Add pcie_wait_after_link_train() helper Hans Zhang
2026-05-06 15:34 ` Biju Das
2026-05-06 16:16 ` Hans Zhang
2026-05-06 15:55 ` Manivannan Sadhasivam
2026-05-06 16:13 ` Hans Zhang
2026-05-06 20:18 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 2/8] PCI: cadence: LGA: Add max_link_speed field and 100 ms delay after link training Hans Zhang
2026-05-06 15:31 ` Biju Das
2026-05-06 16:21 ` Hans Zhang
2026-05-06 16:27 ` Biju Das
2026-05-06 16:31 ` Hans Zhang
2026-05-06 16:03 ` Manivannan Sadhasivam
2026-05-06 16:14 ` Hans Zhang
2026-05-06 20:39 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 3/8] PCI: cadence: HPA: Add " Hans Zhang
2026-05-06 21:05 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 4/8] PCI: j721e: Set max_link_speed to enable 100 ms delay after link up Hans Zhang
2026-05-06 16:04 ` Manivannan Sadhasivam
2026-05-06 16:11 ` Hans Zhang
2026-05-06 16:51 ` Manivannan Sadhasivam
2026-05-06 21:12 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 5/8] PCI: dwc: Use common pcie_wait_after_link_train() helper Hans Zhang
2026-05-06 15:23 ` [PATCH v2 6/8] PCI: aardvark: Add 100 ms delay after link training Hans Zhang
2026-05-06 21:48 ` sashiko-bot
2026-05-12 21:25 ` Pali Rohár
2026-05-13 7:00 ` Hans Zhang
2026-05-13 7:20 ` Pali Rohár
2026-05-13 7:34 ` Hans Zhang
2026-05-13 18:54 ` Pali Rohár
2026-05-06 15:23 ` [PATCH v2 7/8] PCI: mediatek-gen3: " Hans Zhang
2026-05-06 22:14 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 8/8] PCI: rzg3s-host: " Hans Zhang
2026-05-06 16:52 ` Claudiu Beznea
2026-05-09 16:25 ` Hans Zhang
2026-05-06 22:28 ` sashiko-bot
2026-05-14 12:19 ` kernel test robot [this message]
2026-05-14 12:50 ` kernel test robot
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