From: Vidya Sagar <vidyas@nvidia.com>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
"kwilczynski@kernel.org" <kwilczynski@kernel.org>,
"mani@kernel.org" <mani@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
Jon Hunter <jonathanh@nvidia.com>,
"kishon@kernel.org" <kishon@kernel.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"Frank.Li@nxp.com" <Frank.Li@nxp.com>,
"den@valinux.co.jp" <den@valinux.co.jp>,
"hongxing.zhu@nxp.com" <hongxing.zhu@nxp.com>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"cassel@kernel.org" <cassel@kernel.org>,
"18255117159@163.com" <18255117159@163.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 3/9] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration
Date: Fri, 27 Feb 2026 12:35:54 +0000 [thread overview]
Message-ID: <27efc115-959b-47ed-9ef7-b79c8930176a@nvidia.com> (raw)
In-Reply-To: <20260223184538.3084753-4-mmaddireddy@nvidia.com>
On 24/02/26 00:15, Manikanta Maddireddy wrote:
> From: Vidya Sagar <vidyas@nvidia.com>
>
> The Tegra PCIe Endpoint controller has a single interrupt line that is
> shared between multiple interrupt sources:
> 1. PCIe link state events (link up, hot reset done)
> 2. Configuration space events (Bus Master Enable changes)
> 3. DMA completion events
>
> Currently, the interrupt is registered with IRQF_ONESHOT, which keeps the
> interrupt line masked until the threaded handler completes. This prevents
> the DMA driver from sharing the same interrupt line, as the DMA completion
> interrupts would be blocked while the threaded handler processes link state
> events.
>
> Removing IRQF_ONESHOT is safe for the following reasons:
>
> 1. The hard IRQ handler (tegra_pcie_ep_hard_irq) properly acknowledges and
> clears all interrupt status bits in hardware before returning. This
> prevents interrupt storms and ensures the interrupt controller can
> re-enable the interrupt line immediately.
>
> 2. The hard IRQ handler explicitly checks for DMA interrupts
> (APPL_INTR_STATUS_L1_8_0_EDMA_INT_MASK) and marks them as handled,
> allowing the DMA driver's handler to process them separately.
>
> 3. The threaded handler (tegra_pcie_ep_irq_thread) only processes link-up
> notifications and LTR message sending. These operations don't conflict
> with DMA interrupt processing and don't require the interrupt line to
> remain masked.
>
> This change enables the DMA driver to share the interrupt line with the
> PCIe endpoint driver, allowing both drivers to process their respective
> events without blocking each other.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
> Changes V1 -> V6: Updated commit message
>
> drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index 51bad99cec31..aeec5f8b9842 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -2226,7 +2226,7 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
> ret = devm_request_threaded_irq(dev, pp->irq,
> tegra_pcie_ep_hard_irq,
> tegra_pcie_ep_irq_thread,
> - IRQF_SHARED | IRQF_ONESHOT,
> + IRQF_SHARED,
> "tegra-pcie-ep-intr", pcie);
> if (ret) {
> dev_err(dev, "Failed to request IRQ %d: %d\n", pp->irq,
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
next prev parent reply other threads:[~2026-02-27 12:36 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-23 18:45 [PATCH v6 0/9] Enhancements to pcie-tegra194 driver Manikanta Maddireddy
2026-02-23 18:45 ` [PATCH v6 1/9] PCI: tegra194: Drive CLKREQ signal low explicitly Manikanta Maddireddy
2026-02-27 12:35 ` Vidya Sagar
2026-03-02 23:34 ` Bjorn Helgaas
2026-03-03 6:51 ` Manikanta Maddireddy
2026-02-23 18:45 ` [PATCH v6 2/9] PCI: tegra194: Calibrate P2U for endpoint mode Manikanta Maddireddy
2026-02-27 12:35 ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 3/9] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration Manikanta Maddireddy
2026-02-27 12:35 ` Vidya Sagar [this message]
2026-02-23 18:45 ` [PATCH v6 4/9] PCI: tegra194: Enable DMA interrupt Manikanta Maddireddy
2026-02-27 12:36 ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 5/9] PCI: tegra194: Enable hardware hot reset mode in Endpoint Manikanta Maddireddy
2026-02-27 12:36 ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 6/9] PCI: tegra194: Disable L1.2 capability of Tegra234 EP Manikanta Maddireddy
2026-02-27 12:36 ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 7/9] dt-bindings: PCI: tegra194: Add monitor clock support Manikanta Maddireddy
2026-02-27 12:36 ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 8/9] PCI: tegra194: Add core " Manikanta Maddireddy
2026-02-27 12:36 ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 9/9] PCI: tegra194: Add ASPM L1 entrance latency config Manikanta Maddireddy
2026-02-27 12:36 ` Vidya Sagar
2026-02-27 16:59 ` [PATCH v6 0/9] Enhancements to pcie-tegra194 driver Jon Hunter
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