[PATCH 00/42] i.MX fixes and cleanup

[PATCH 00/42] i.MX fixes and cleanup

[Bernhard Beschow]

This series fixes various issues in i.MX device emulation, cleans up i.MX
Kconfig handling, improves tracing, and improves some code. Functional console
tests for the remaining i.MX boards are added where images are publicly
available, except for imx6ul which is taken care of in a different series [1].
Fixes which appear safe for backporting are cc'd to qemu-stable.

The series is structured as follows: Patches 1-4 fix some issues and are
mostly marked for backporting. Patch 2 is a follow-up on patch 1 which allows
patch 1 to be backported while patch 2 shouldn't because it breaks migration.

Patches 5-10 add and improve functional tests for i.MX devices. While at it,
saner defaults for the amount of RAM and number of CPUs are established.

Patches 11-15 turn the remaining i.MX SoC device models into SySBus devices
which fixes their reset behavior.

Patches 16 and 17 are QOM fixes inspired by Phil's comment during the FlexCAN
series.

Patches 18-33 are Kconfig cleanups where the majority is about splitting
CONFIG_IMX into dedicated config items.

The remainder is cosmetics and adding a QOM path to some i.MX trace events.

Testing done:
* Run functional tests for sabrelite, imx8mp-evk, imx8mm-evk, mcimx7d-sabre.

[1]
https://lore.kernel.org/qemu-devel/20260904161438.3838261-1-bin.
meng@processmission.com/

Bernhard Beschow (42):
  hw/watchdog/wdt_imx2: Fix handling of write-once WCR bits
  hw/watchdog/wdt_imx2: Remove unused attributes
  hw/arm/imx8mm-evk: Fix reference count of SoC object
  hw/arm/mcimx7d-sabre: Ignore memory transaction failures
  docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk
    invocations
  hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default
  tests/functional/arm: Add console test for `sabrelite` machine
  hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default
  hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB of RAM by default
  tests/functional/arm: Add console test for `mcimx7d-sabre` machine
  hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
  hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
  hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
  hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
  hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE
  hw/timer/imx_gpt: Wire clock control module via link property
  hw/timer/imx_epit: Wire clock control module via link property
  hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
  hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
  Kconfig: Extract config IMX_AVIC from config IMX
  Kconfig: Extract config IMX_GPCV2 from config IMX
  Kconfig: Extract config IMX_RNG from config IMX
  Kconfig: Extract config FSL_IMX7_GPR from config IMX
  Kconfig: Extract config FSL_IMX{6,7}_SRC from config IMX
  Kconfig: Extract config FSL_IMX7_SNVS from config IMX
  Kconfig: Extract dedicated config FSL_IMXx_CCM from config IMX
  Kconfig: Extract config IMX_GPT from config IMX
  Kconfig: Extract config IMX_EPIT from config IMX
  Kconfig: Extract config GPIO_IMX from config IMX
  Kconfig: Extract config IMX_SPI from config IMX
  Kconfig: Extract config IMX_SERIAL from config IMX
  Kconfig: Remove config IMX
  hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
  hw/arm/fsl-imx8m: Fix typo
  hw/misc/imx6_src: Avoid casting from void *
  hw/char/imx_serial: Avoid casting from void *
  hw/intc/imx_avic: Avoid casting from void *
  hw/misc/imx*_ccm: Avoid casting from void *
  hw/usb/imx-usb-phy: Avoid casting from void *
  hw/net/imx_fec: Trace with QOM path where easily possible
  hw/net/lan9118_phy: Trace with QOM path
  hw/watchdog/wdt_imx2: Trace with QOM path

 MAINTAINERS                                 |  2 +
 docs/system/arm/imx8m.rst                   |  2 +-
 docs/system/arm/sabrelite.rst               |  4 +-
 include/hw/arm/fsl-imx25.h                  |  5 +-
 include/hw/arm/fsl-imx31.h                  |  5 +-
 include/hw/arm/fsl-imx6.h                   |  5 +-
 include/hw/arm/fsl-imx6ul.h                 |  5 +-
 include/hw/arm/fsl-imx7.h                   |  5 +-
 include/hw/arm/fsl-imx8mm.h                 |  4 +-
 include/hw/arm/fsl-imx8mp.h                 |  4 +-
 include/hw/watchdog/wdt_imx2.h              |  2 -
 hw/arm/fsl-imx25.c                          | 13 ++---
 hw/arm/fsl-imx31.c                          | 13 ++---
 hw/arm/fsl-imx6.c                           | 10 ++--
 hw/arm/fsl-imx6ul.c                         | 10 ++--
 hw/arm/fsl-imx7.c                           |  8 ++-
 hw/arm/fsl-imx8mm.c                         |  5 +-
 hw/arm/fsl-imx8mp.c                         |  5 +-
 hw/arm/imx25_pdk.c                          |  2 +-
 hw/arm/imx8mm-evk.c                         |  4 +-
 hw/arm/kzm.c                                |  2 +-
 hw/arm/mcimx6ul-evk.c                       |  3 +-
 hw/arm/mcimx7d-sabre.c                      |  5 +-
 hw/arm/sabrelite.c                          |  5 +-
 hw/char/imx_serial.c                        | 10 ++--
 hw/intc/imx_avic.c                          |  6 +--
 hw/misc/imx25_ccm.c                         |  4 +-
 hw/misc/imx31_ccm.c                         |  4 +-
 hw/misc/imx6_ccm.c                          |  8 +--
 hw/misc/imx6_src.c                          |  4 +-
 hw/misc/imx6ul_ccm.c                        |  8 +--
 hw/misc/imx7_src.c                          |  4 +-
 hw/net/imx_fec.c                            | 28 +++++-----
 hw/net/lan9118_phy.c                        | 10 ++--
 hw/timer/imx_epit.c                         | 14 +++++
 hw/timer/imx_gpt.c                          | 14 +++++
 hw/usb/imx-usb-phy.c                        |  4 +-
 hw/watchdog/wdt_imx2.c                      | 30 +++--------
 hw/arm/Kconfig                              | 57 ++++++++++++++++++---
 hw/char/Kconfig                             |  3 ++
 hw/char/meson.build                         |  2 +-
 hw/gpio/Kconfig                             |  3 ++
 hw/gpio/meson.build                         |  2 +-
 hw/intc/Kconfig                             |  6 +++
 hw/intc/meson.build                         |  3 +-
 hw/misc/Kconfig                             | 41 +++++++++++++--
 hw/misc/meson.build                         | 24 ++++-----
 hw/net/Kconfig                              |  2 +-
 hw/net/trace-events                         | 33 ++++++------
 hw/ssi/Kconfig                              |  4 ++
 hw/ssi/meson.build                          |  2 +-
 hw/timer/Kconfig                            | 10 ++++
 hw/timer/meson.build                        |  4 +-
 hw/vmapple/Kconfig                          |  1 -
 hw/watchdog/trace-events                    |  8 +--
 tests/functional/aarch64/test_imx8mm_evk.py |  4 +-
 tests/functional/aarch64/test_imx8mp_evk.py |  4 +-
 tests/functional/arm/meson.build            |  2 +
 tests/functional/arm/test_mcimx7d_sabre.py  | 46 +++++++++++++++++
 tests/functional/arm/test_sabrelite.py      | 46 +++++++++++++++++
 60 files changed, 393 insertions(+), 190 deletions(-)
 create mode 100755 tests/functional/arm/test_mcimx7d_sabre.py
 create mode 100755 tests/functional/arm/test_sabrelite.py

-- 
2.55.0

[PATCH 01/42] hw/watchdog/wdt_imx2: Fix handling of write-once WCR bits

[Bernhard Beschow]

Guests such as u-boot may experience inadvertant reboots when configuring
the WCR register. Apparently there is a typo in the WCR locked bits
handling: The locked values for s->wcr must come from itself rather than
from s->wicr. While at it remove the redundant locked attributes for the
bits which stick to one once written with one.

Note that removing the locked attributes required a migration break. Defer
that to a subsequent patch to help backporting.

Fixes: daca13d495a1 ("hw/watchdog: Implement full i.MX watchdog
support")
cc: qemu-stable
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/watchdog/wdt_imx2.c | 19 +++----------------
 1 file changed, 3 insertions(+), 16 deletions(-)

diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index c83d4107c1..aaf4695db2 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -59,9 +59,8 @@ static void imx2_wdt_reset(DeviceState *dev)
 
     s->wicr_locked = false;
     s->wcr_locked = false;
-    s->wcr_wde_locked = false;
 
-    s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS;
+    s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS | (s->wcr & IMX2_WDT_WCR_WDT);
     s->wsr = 0;
     s->wrsr &= ~(IMX2_WDT_WRSR_TOUT | IMX2_WDT_WRSR_SFTW);
     s->wicr = IMX2_WDT_WICR_WICT_DEF;
@@ -156,23 +155,11 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
     case IMX2_WDT_WCR:
         if (s->wcr_locked) {
             value &= ~IMX2_WDT_WCR_LOCK_MASK;
-            value |= (s->wicr & IMX2_WDT_WCR_LOCK_MASK);
+            value |= (s->wcr & IMX2_WDT_WCR_LOCK_MASK);
         }
         s->wcr_locked = true;
-        if (s->wcr_wde_locked) {
-            value &= ~IMX2_WDT_WCR_WDE;
-            value |= (s->wicr & ~IMX2_WDT_WCR_WDE);
-        } else if (value & IMX2_WDT_WCR_WDE) {
-            s->wcr_wde_locked = true;
-        }
-        if (s->wcr_wdt_locked) {
-            value &= ~IMX2_WDT_WCR_WDT;
-            value |= (s->wicr & ~IMX2_WDT_WCR_WDT);
-        } else if (value & IMX2_WDT_WCR_WDT) {
-            s->wcr_wdt_locked = true;
-        }
 
-        s->wcr = value;
+        s->wcr = value | (s->wcr & (IMX2_WDT_WCR_WDT | IMX2_WDT_WCR_WDE));
         if (!(value & IMX2_WDT_WCR_SRS)) {
             s->wrsr = IMX2_WDT_WRSR_SFTW;
         }
-- 
2.55.0

Re: [PATCH 01/42] hw/watchdog/wdt_imx2: Fix handling of write-once WCR bits

[Peter Maydell]

On Mon, 21 Sept 2026 at 22:47, Bernhard Beschow <shentey@gmail.com> wrote:
>
> Guests such as u-boot may experience inadvertant reboots when configuring
> the WCR register. Apparently there is a typo in the WCR locked bits
> handling: The locked values for s->wcr must come from itself rather than
> from s->wicr. While at it remove the redundant locked attributes for the
> bits which stick to one once written with one.

"while at it" is one of those phrases that tends to suggest
this should be more than one commit. It's doing a lot more
than fixing the bug where we use wicr when we should have used wcr.

> Note that removing the locked attributes required a migration break. Defer
> that to a subsequent patch to help backporting.
>
> Fixes: daca13d495a1 ("hw/watchdog: Implement full i.MX watchdog
> support")
> cc: qemu-stable
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>  hw/watchdog/wdt_imx2.c | 19 +++----------------
>  1 file changed, 3 insertions(+), 16 deletions(-)
>
> diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
> index c83d4107c1..aaf4695db2 100644
> --- a/hw/watchdog/wdt_imx2.c
> +++ b/hw/watchdog/wdt_imx2.c
> @@ -59,9 +59,8 @@ static void imx2_wdt_reset(DeviceState *dev)
>
>      s->wicr_locked = false;
>      s->wcr_locked = false;
> -    s->wcr_wde_locked = false;
>
> -    s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS;
> +    s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS | (s->wcr & IMX2_WDT_WCR_WDT);

This doesn't look right. Reset should be "cold start power on", so
the reset value of WCR shouldn't depend on what s->wcr happens
to contain now. It's also not mentioned in the commit message.

>      s->wsr = 0;
>      s->wrsr &= ~(IMX2_WDT_WRSR_TOUT | IMX2_WDT_WRSR_SFTW);
>      s->wicr = IMX2_WDT_WICR_WICT_DEF;
> @@ -156,23 +155,11 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
>      case IMX2_WDT_WCR:
>          if (s->wcr_locked) {
>              value &= ~IMX2_WDT_WCR_LOCK_MASK;
> -            value |= (s->wicr & IMX2_WDT_WCR_LOCK_MASK);
> +            value |= (s->wcr & IMX2_WDT_WCR_LOCK_MASK);
>          }
>          s->wcr_locked = true;
> -        if (s->wcr_wde_locked) {
> -            value &= ~IMX2_WDT_WCR_WDE;
> -            value |= (s->wicr & ~IMX2_WDT_WCR_WDE);
> -        } else if (value & IMX2_WDT_WCR_WDE) {
> -            s->wcr_wde_locked = true;
> -        }
> -        if (s->wcr_wdt_locked) {
> -            value &= ~IMX2_WDT_WCR_WDT;
> -            value |= (s->wicr & ~IMX2_WDT_WCR_WDT);
> -        } else if (value & IMX2_WDT_WCR_WDT) {
> -            s->wcr_wdt_locked = true;
> -        }
>
> -        s->wcr = value;
> +        s->wcr = value | (s->wcr & (IMX2_WDT_WCR_WDT | IMX2_WDT_WCR_WDE));

This looks correct, but I think it would be helpful to have a
comment that notes that WDZST, WDBG and WDW are "write-once only"
whereas WDT and WDE are "write one once only". The difference is
a bit subtle otherwise.

thanks
-- PMM

Re: [PATCH 01/42] hw/watchdog/wdt_imx2: Fix handling of write-once WCR bits

[Bernhard Beschow]

Am 28. September 2026 18:22:49 UTC schrieb Peter Maydell <peter.maydell@linaro.org>:
>On Mon, 21 Sept 2026 at 22:47, Bernhard Beschow <shentey@gmail.com> wrote:
>>
>> Guests such as u-boot may experience inadvertant reboots when configuring
>> the WCR register. Apparently there is a typo in the WCR locked bits
>> handling: The locked values for s->wcr must come from itself rather than
>> from s->wicr. While at it remove the redundant locked attributes for the
>> bits which stick to one once written with one.
>
>"while at it" is one of those phrases that tends to suggest
>this should be more than one commit. It's doing a lot more
>than fixing the bug where we use wicr when we should have used wcr.

Okay, I'll split the patch: One which fixes the bug by fixing the typo, suitable for backporting. Then another one resolving the redundant boolean attributes which breaks migration.

>
>> Note that removing the locked attributes required a migration break. Defer
>> that to a subsequent patch to help backporting.
>>
>> Fixes: daca13d495a1 ("hw/watchdog: Implement full i.MX watchdog
>> support")
>> cc: qemu-stable
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> ---
>>  hw/watchdog/wdt_imx2.c | 19 +++----------------
>>  1 file changed, 3 insertions(+), 16 deletions(-)
>>
>> diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
>> index c83d4107c1..aaf4695db2 100644
>> --- a/hw/watchdog/wdt_imx2.c
>> +++ b/hw/watchdog/wdt_imx2.c
>> @@ -59,9 +59,8 @@ static void imx2_wdt_reset(DeviceState *dev)
>>
>>      s->wicr_locked = false;
>>      s->wcr_locked = false;
>> -    s->wcr_wde_locked = false;
>>
>> -    s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS;
>> +    s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS | (s->wcr & IMX2_WDT_WCR_WDT);
>
>This doesn't look right. Reset should be "cold start power on", so
>the reset value of WCR shouldn't depend on what s->wcr happens
>to contain now. It's also not mentioned in the commit message.

Note that `s->wcr_wdt_locked = false;` is missing in the existing code, so retaining the IMX2_WDT_WCR_WDT position preserves behavior, hence no mentioning in the commit message.

WDT is cleared on POR while WDE is cleared on "system reset". So indeed WDT needs to be cleared when reset represents "cold start power on". I'll add a (backporteable) patch.

>
>>      s->wsr = 0;
>>      s->wrsr &= ~(IMX2_WDT_WRSR_TOUT | IMX2_WDT_WRSR_SFTW);
>>      s->wicr = IMX2_WDT_WICR_WICT_DEF;
>> @@ -156,23 +155,11 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
>>      case IMX2_WDT_WCR:
>>          if (s->wcr_locked) {
>>              value &= ~IMX2_WDT_WCR_LOCK_MASK;
>> -            value |= (s->wicr & IMX2_WDT_WCR_LOCK_MASK);
>> +            value |= (s->wcr & IMX2_WDT_WCR_LOCK_MASK);
>>          }
>>          s->wcr_locked = true;
>> -        if (s->wcr_wde_locked) {
>> -            value &= ~IMX2_WDT_WCR_WDE;
>> -            value |= (s->wicr & ~IMX2_WDT_WCR_WDE);
>> -        } else if (value & IMX2_WDT_WCR_WDE) {
>> -            s->wcr_wde_locked = true;
>> -        }
>> -        if (s->wcr_wdt_locked) {
>> -            value &= ~IMX2_WDT_WCR_WDT;
>> -            value |= (s->wicr & ~IMX2_WDT_WCR_WDT);
>> -        } else if (value & IMX2_WDT_WCR_WDT) {
>> -            s->wcr_wdt_locked = true;
>> -        }
>>
>> -        s->wcr = value;
>> +        s->wcr = value | (s->wcr & (IMX2_WDT_WCR_WDT | IMX2_WDT_WCR_WDE));
>
>This looks correct, but I think it would be helpful to have a
>comment that notes that WDZST, WDBG and WDW are "write-once only"
>whereas WDT and WDE are "write one once only". The difference is
>a bit subtle otherwise.

Okay, I'll add a comment in the patch where the redundant attributes are removed.

Best regards,
Bernhard

>
>thanks
>-- PMM

[PATCH 02/42] hw/watchdog/wdt_imx2: Remove unused attributes

[Bernhard Beschow]

The previous change rendered the locked attributes unused but they were kept
for migration compatibiliy when backporting. Remove the unneeded attributes
and break migration compatibility since QEMU does not guarantee
compatibility for i.MX devices between feature releases.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 include/hw/watchdog/wdt_imx2.h | 2 --
 hw/watchdog/wdt_imx2.c         | 3 +--
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h
index ad36b8820d..0bf2903959 100644
--- a/include/hw/watchdog/wdt_imx2.h
+++ b/include/hw/watchdog/wdt_imx2.h
@@ -84,8 +84,6 @@ struct IMX2WdtState {
     uint16_t wmcr;
 
     bool wcr_locked;            /* affects WDZST, WDBG, and WDW */
-    bool wcr_wde_locked;        /* affects WDE */
-    bool wcr_wdt_locked;        /* affects WDT (never cleared) */
 };
 
 #endif /* WDT_IMX2_H */
diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index aaf4695db2..c8ea704aa3 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -220,13 +220,12 @@ static const MemoryRegionOps imx2_wdt_ops = {
 
 static const VMStateDescription vmstate_imx2_wdt = {
     .name = "imx2.wdt",
+    .version_id = 1,
     .fields = (const VMStateField[]) {
         VMSTATE_PTIMER(timer, IMX2WdtState),
         VMSTATE_PTIMER(itimer, IMX2WdtState),
         VMSTATE_BOOL(wicr_locked, IMX2WdtState),
         VMSTATE_BOOL(wcr_locked, IMX2WdtState),
-        VMSTATE_BOOL(wcr_wde_locked, IMX2WdtState),
-        VMSTATE_BOOL(wcr_wdt_locked, IMX2WdtState),
         VMSTATE_UINT16(wcr, IMX2WdtState),
         VMSTATE_UINT16(wsr, IMX2WdtState),
         VMSTATE_UINT16(wrsr, IMX2WdtState),
-- 
2.55.0

Re: [PATCH 02/42] hw/watchdog/wdt_imx2: Remove unused attributes

[Peter Maydell]

On Mon, 21 Sept 2026 at 22:47, Bernhard Beschow <shentey@gmail.com> wrote:
>
> The previous change rendered the locked attributes unused but they were kept
> for migration compatibiliy when backporting. Remove the unneeded attributes
> and break migration compatibility since QEMU does not guarantee
> compatibility for i.MX devices between feature releases.
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>  include/hw/watchdog/wdt_imx2.h | 2 --
>  hw/watchdog/wdt_imx2.c         | 3 +--
>  2 files changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h
> index ad36b8820d..0bf2903959 100644
> --- a/include/hw/watchdog/wdt_imx2.h
> +++ b/include/hw/watchdog/wdt_imx2.h
> @@ -84,8 +84,6 @@ struct IMX2WdtState {
>      uint16_t wmcr;
>
>      bool wcr_locked;            /* affects WDZST, WDBG, and WDW */
> -    bool wcr_wde_locked;        /* affects WDE */
> -    bool wcr_wdt_locked;        /* affects WDT (never cleared) */
>  };
>
>  #endif /* WDT_IMX2_H */
> diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
> index aaf4695db2..c8ea704aa3 100644
> --- a/hw/watchdog/wdt_imx2.c
> +++ b/hw/watchdog/wdt_imx2.c
> @@ -220,13 +220,12 @@ static const MemoryRegionOps imx2_wdt_ops = {
>
>  static const VMStateDescription vmstate_imx2_wdt = {
>      .name = "imx2.wdt",
> +    .version_id = 1,
>      .fields = (const VMStateField[]) {
>          VMSTATE_PTIMER(timer, IMX2WdtState),
>          VMSTATE_PTIMER(itimer, IMX2WdtState),
>          VMSTATE_BOOL(wicr_locked, IMX2WdtState),
>          VMSTATE_BOOL(wcr_locked, IMX2WdtState),
> -        VMSTATE_BOOL(wcr_wde_locked, IMX2WdtState),
> -        VMSTATE_BOOL(wcr_wdt_locked, IMX2WdtState),
>          VMSTATE_UINT16(wcr, IMX2WdtState),
>          VMSTATE_UINT16(wsr, IMX2WdtState),
>          VMSTATE_UINT16(wrsr, IMX2WdtState),

We could alternatively keep the migration compat by using
   VMSTATE_UNUSED(1), /* was wcr_wde_locked */
   VMSTATE_UNUSED(1), /* was wcr_wdt_locked */

but as you say we don't care about this for imx boards, so
bumping the version field is fine.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

[PATCH 03/42] hw/arm/imx8mm-evk: Fix reference count of SoC object

[Bernhard Beschow]

Using sysbus_realize_and_unref() requires object_new() rather than
object_new_with_props(), otherwise the initial reference count is
subtracted twice, i.e. ends up being one too low.

Fixes: 7bcd1f30bc83 ("hw/arm: Add the i.MX 8MM EVK(Evaluation Kit)
board")
cc: qemu-stable
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/imx8mm-evk.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/arm/imx8mm-evk.c b/hw/arm/imx8mm-evk.c
index c3215b11cb..6de0d9c4a2 100644
--- a/hw/arm/imx8mm-evk.c
+++ b/hw/arm/imx8mm-evk.c
@@ -83,8 +83,8 @@ static void imx8mm_evk_init(MachineState *machine)
     ims->bootinfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
     ims->bootinfo.modify_dtb = imx8mm_evk_modify_dtb;
 
-    s = FSL_IMX8MM(object_new_with_props(TYPE_FSL_IMX8MM, OBJECT(machine),
-                                         "soc", &error_fatal, NULL));
+    s = FSL_IMX8MM(object_new(TYPE_FSL_IMX8MM));
+    object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
     object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal);
     sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
 
-- 
2.55.0

Re: [PATCH 03/42] hw/arm/imx8mm-evk: Fix reference count of SoC object

[Peter Maydell]

On Mon, 21 Sept 2026 at 22:47, Bernhard Beschow <shentey@gmail.com> wrote:
>
> Using sysbus_realize_and_unref() requires object_new() rather than
> object_new_with_props(), otherwise the initial reference count is
> subtracted twice, i.e. ends up being one too low.
>
> Fixes: 7bcd1f30bc83 ("hw/arm: Add the i.MX 8MM EVK(Evaluation Kit)
> board")
> cc: qemu-stable
> Reported-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>  hw/arm/imx8mm-evk.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/imx8mm-evk.c b/hw/arm/imx8mm-evk.c
> index c3215b11cb..6de0d9c4a2 100644
> --- a/hw/arm/imx8mm-evk.c
> +++ b/hw/arm/imx8mm-evk.c
> @@ -83,8 +83,8 @@ static void imx8mm_evk_init(MachineState *machine)
>      ims->bootinfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
>      ims->bootinfo.modify_dtb = imx8mm_evk_modify_dtb;
>
> -    s = FSL_IMX8MM(object_new_with_props(TYPE_FSL_IMX8MM, OBJECT(machine),
> -                                         "soc", &error_fatal, NULL));
> +    s = FSL_IMX8MM(object_new(TYPE_FSL_IMX8MM));
> +    object_property_add_child(OBJECT(machine), "soc", OBJECT(s));

Ah, yes, I vaguely remember this. We noticed this was the wrong way
to do it for imx8mp-evk.c, in this thread:
 https://lore.kernel.org/qemu-devel/CAFEAcA_cYDwOFP_h_pKyUQ0kKmT671iZiNntzMC5O5tF=1cC=A@mail.gmail.com/
but not before I incorrectly suggested using it in the imx8mm
patchset that was just landing in the tree at that time.

This patch makes imx8mm do the same thing as imx8mp used to do
and eg imx6ul does now, so

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

I do notice that we also have the approach that you changed
imx8mp-evk to in 8099d86d3, where we have the SoC struct
directly embedded in the machine state struct and can use
object_initialize_child(). But we don't need to adopt
that here (especially as I think there's an unresolved
design discussion about whether we should prefer to avoid
the "embed struct in struct" pattern entirely in future).

thanks
-- PMM

[PATCH 04/42] hw/arm/mcimx7d-sabre: Ignore memory transaction failures

[Bernhard Beschow]

When using mcimx7d-sabre with newer Linux versions such as 7.0, the
machine fails to boot. This happens due to memory transaction failures
since the address space is not fully covered with unimp devices. Fix
booting by ignoring memory transaction failures in the machine.

cc: qemu-stable
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/mcimx7d-sabre.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 65fdb19c06..8d223fca6c 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -83,6 +83,7 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
     mc->max_cpus = FSL_IMX7_NUM_CPUS;
     mc->default_ram_id = "mcimx7d-sabre.ram";
     mc->auto_create_sdcard = true;
+    mc->ignore_memory_transaction_failures = true;
 }
 
 DEFINE_MACHINE_EXTENDED("mcimx7d-sabre", MACHINE, Mcimx7dSabreMachineState,
-- 
2.55.0

Re: [PATCH 04/42] hw/arm/mcimx7d-sabre: Ignore memory transaction failures

[Peter Maydell]

On Mon, 21 Sept 2026 at 22:47, Bernhard Beschow <shentey@gmail.com> wrote:
>
> When using mcimx7d-sabre with newer Linux versions such as 7.0, the
> machine fails to boot. This happens due to memory transaction failures
> since the address space is not fully covered with unimp devices. Fix
> booting by ignoring memory transaction failures in the machine.
>
> cc: qemu-stable
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>  hw/arm/mcimx7d-sabre.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
> index 65fdb19c06..8d223fca6c 100644
> --- a/hw/arm/mcimx7d-sabre.c
> +++ b/hw/arm/mcimx7d-sabre.c
> @@ -83,6 +83,7 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
>      mc->max_cpus = FSL_IMX7_NUM_CPUS;
>      mc->default_ram_id = "mcimx7d-sabre.ram";
>      mc->auto_create_sdcard = true;
> +    mc->ignore_memory_transaction_failures = true;
>  }

This flag is in QEMU strictly to allow us to preserve
backwards compatibility of behaviour with the older QEMU
versions which pre-dated the suport of transaction failures
(and where therefore we expected that if we just enabled it
globally that we'd break previously-working user setups
because we were missing some devices). It should not be
newly set for any board model that isn't already setting it
(and in an ideal world we would eliminate it from all those
old board models, except that's a lot of work for mostly
ancient hardly used machine types).

Instead the fix here is to identify which devices we need
to provide as at least unimplemented-device stubs, and add
them to the board/SoC.

thanks
-- PMM

Re: [PATCH 04/42] hw/arm/mcimx7d-sabre: Ignore memory transaction failures

[Bernhard Beschow]

Am 28. September 2026 18:05:11 UTC schrieb Peter Maydell <peter.maydell@linaro.org>:
>On Mon, 21 Sept 2026 at 22:47, Bernhard Beschow <shentey@gmail.com> wrote:
>>
>> When using mcimx7d-sabre with newer Linux versions such as 7.0, the
>> machine fails to boot. This happens due to memory transaction failures
>> since the address space is not fully covered with unimp devices. Fix
>> booting by ignoring memory transaction failures in the machine.
>>
>> cc: qemu-stable
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> ---
>>  hw/arm/mcimx7d-sabre.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
>> index 65fdb19c06..8d223fca6c 100644
>> --- a/hw/arm/mcimx7d-sabre.c
>> +++ b/hw/arm/mcimx7d-sabre.c
>> @@ -83,6 +83,7 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
>>      mc->max_cpus = FSL_IMX7_NUM_CPUS;
>>      mc->default_ram_id = "mcimx7d-sabre.ram";
>>      mc->auto_create_sdcard = true;
>> +    mc->ignore_memory_transaction_failures = true;
>>  }
>
>This flag is in QEMU strictly to allow us to preserve
>backwards compatibility of behaviour with the older QEMU
>versions which pre-dated the suport of transaction failures
>(and where therefore we expected that if we just enabled it
>globally that we'd break previously-working user setups
>because we were missing some devices). It should not be
>newly set for any board model that isn't already setting it
>(and in an ideal world we would eliminate it from all those
>old board models, except that's a lot of work for mostly
>ancient hardly used machine types).
>
>Instead the fix here is to identify which devices we need
>to provide as at least unimplemented-device stubs, and add
>them to the board/SoC.

Okay, then let's drop this patch from the series. The functional test should still succeed.

Best regards,
Bernhard

>
>thanks
>-- PMM

[PATCH 05/42] docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk invocations

[Bernhard Beschow]

Both boards provide defaults matching real hardware. No need to ask
users to repeat these. Also, remove these redundant arguments from the
functional tests such that the defaults get tested.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 docs/system/arm/imx8m.rst                   | 2 +-
 tests/functional/aarch64/test_imx8mm_evk.py | 4 +---
 tests/functional/aarch64/test_imx8mp_evk.py | 4 +---
 3 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/docs/system/arm/imx8m.rst b/docs/system/arm/imx8m.rst
index 1bcb8255be..5348757089 100644
--- a/docs/system/arm/imx8m.rst
+++ b/docs/system/arm/imx8m.rst
@@ -79,7 +79,7 @@ For i.MX 8M Mini EVK:
 
 .. code-block:: bash
 
-  $ qemu-system-aarch64 -M imx8mm-evk -smp 4 -m 2G \
+  $ qemu-system-aarch64 -M imx8mm-evk \
       -display none -serial null -serial stdio \
       -kernel Image \
       -dtb imx8mm-evk.dtb \
diff --git a/tests/functional/aarch64/test_imx8mm_evk.py b/tests/functional/aarch64/test_imx8mm_evk.py
index 86725991f1..73d286167c 100755
--- a/tests/functional/aarch64/test_imx8mm_evk.py
+++ b/tests/functional/aarch64/test_imx8mm_evk.py
@@ -52,9 +52,7 @@ def test_aarch64_imx8mm_evk_usdhc(self):
         self.require_accelerator("tcg")
         self.set_machine('imx8mm-evk')
         self.vm.set_console(console_index=1)
-        self.vm.add_args('-m', '2G',
-                         '-smp', '4',
-                         '-kernel', self.kernel_path,
+        self.vm.add_args('-kernel', self.kernel_path,
                          '-initrd', self.initrd_path,
                          '-dtb', self.dtb_path,
                          '-append', 'root=/dev/mmcblk2p1',
diff --git a/tests/functional/aarch64/test_imx8mp_evk.py b/tests/functional/aarch64/test_imx8mp_evk.py
index 99ddcdef83..2ec421c326 100755
--- a/tests/functional/aarch64/test_imx8mp_evk.py
+++ b/tests/functional/aarch64/test_imx8mp_evk.py
@@ -52,9 +52,7 @@ def test_aarch64_imx8mp_evk_usdhc(self):
         self.require_accelerator("tcg")
         self.set_machine('imx8mp-evk')
         self.vm.set_console(console_index=1)
-        self.vm.add_args('-m', '2G',
-                         '-smp', '4',
-                         '-kernel', self.kernel_path,
+        self.vm.add_args('-kernel', self.kernel_path,
                          '-initrd', self.initrd_path,
                          '-dtb', self.dtb_path,
                          '-append', 'root=/dev/mmcblk2p1',
-- 
2.55.0

Re: [PATCH 05/42] docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk invocations

[Peter Maydell]

On Mon, 21 Sept 2026 at 22:47, Bernhard Beschow <shentey@gmail.com> wrote:
>
> Both boards provide defaults matching real hardware. No need to ask
> users to repeat these. Also, remove these redundant arguments from the
> functional tests such that the defaults get tested.
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

Re: [PATCH 05/42] docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk invocations

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Both boards provide defaults matching real hardware. No need to ask
> users to repeat these. Also, remove these redundant arguments from the
> functional tests such that the defaults get tested.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   docs/system/arm/imx8m.rst                   | 2 +-
>   tests/functional/aarch64/test_imx8mm_evk.py | 4 +---
>   tests/functional/aarch64/test_imx8mp_evk.py | 4 +---
>   3 files changed, 3 insertions(+), 7 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 06/42] hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default

[Bernhard Beschow]

Having four CPUs and 1 GiB of RAM matches real hardware. Fix the machine
defaults to make its use more ergonomic and less error-prone. Also
reflect this in the board documentation.

To reproduce the old default behavior for e.g. migration purposes,
`-smp 1 -m 128M` needs to be passed on the command line.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 docs/system/arm/sabrelite.rst | 4 ++--
 hw/arm/sabrelite.c            | 3 +++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/docs/system/arm/sabrelite.rst b/docs/system/arm/sabrelite.rst
index d3a3c01dd6..b8ac9548f5 100644
--- a/docs/system/arm/sabrelite.rst
+++ b/docs/system/arm/sabrelite.rst
@@ -55,7 +55,7 @@ To boot the newly built Linux kernel in QEMU with the SABRE Lite machine, use:
 
 .. code-block:: bash
 
-  $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
+  $ qemu-system-arm -M sabrelite \
       -display none -serial null -serial stdio \
       -kernel arch/arm/boot/zImage \
       -dtb arch/arm/boot/dts/imx6q-sabrelite.dtb \
@@ -89,7 +89,7 @@ the -kernel argument, along with an SD card image with rootfs:
 
 .. code-block:: bash
 
-  $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
+  $ qemu-system-arm -M sabrelite \
       -display none -serial null -serial stdio \
       -kernel u-boot
 
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 05dfabd937..34f302f83c 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -17,6 +17,7 @@
 #include "hw/core/boards.h"
 #include "hw/core/qdev-properties.h"
 #include "qemu/error-report.h"
+#include "qemu/units.h"
 #include "system/qtest.h"
 
 struct SabreliteMachineState {
@@ -139,7 +140,9 @@ static void sabrelite_machine_class_init(ObjectClass *oc, const void *data)
     mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex-A9)";
     mc->init = sabrelite_init;
     mc->max_cpus = FSL_IMX6_NUM_CPUS;
+    mc->default_cpus = FSL_IMX6_NUM_CPUS;
     mc->ignore_memory_transaction_failures = true;
+    mc->default_ram_size = 1 * GiB;
     mc->default_ram_id = "sabrelite.ram";
     mc->auto_create_sdcard = true;
 }
-- 
2.55.0

Re: [PATCH 06/42] hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Having four CPUs and 1 GiB of RAM matches real hardware. Fix the machine
> defaults to make its use more ergonomic and less error-prone. Also
> reflect this in the board documentation.
> 
> To reproduce the old default behavior for e.g. migration purposes,
> `-smp 1 -m 128M` needs to be passed on the command line.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   docs/system/arm/sabrelite.rst | 4 ++--
>   hw/arm/sabrelite.c            | 3 +++
>   2 files changed, 5 insertions(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 07/42] tests/functional/arm: Add console test for `sabrelite` machine

[Bernhard Beschow]

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 MAINTAINERS                            |  1 +
 tests/functional/arm/meson.build       |  1 +
 tests/functional/arm/test_sabrelite.py | 46 ++++++++++++++++++++++++++
 3 files changed, 48 insertions(+)
 create mode 100755 tests/functional/arm/test_sabrelite.py

diff --git a/MAINTAINERS b/MAINTAINERS
index 6be9c5725b..7cc9e558f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1051,6 +1051,7 @@ F: include/hw/usb/imx-usb-phy.h
 F: include/hw/arm/fsl-imx6.h
 F: include/hw/misc/imx6_*.h
 F: include/hw/ssi/imx_spi.h
+F: tests/functional/arm/test_sabrelite.py
 
 SBSA-REF
 M: Peter Maydell <peter.maydell@linaro.org>
diff --git a/tests/functional/arm/meson.build b/tests/functional/arm/meson.build
index 61b00932db..761b371a8d 100644
--- a/tests/functional/arm/meson.build
+++ b/tests/functional/arm/meson.build
@@ -24,6 +24,7 @@ test_arm_timeouts = {
   'quanta_gsj' : 240,
   'raspi2' : 120,
   'replay' : 240,
+  'sabrelite' : 240,
   'tuxrun' : 240,
   'sx1' : 360,
 }
diff --git a/tests/functional/arm/test_sabrelite.py b/tests/functional/arm/test_sabrelite.py
new file mode 100755
index 0000000000..31a0a49eac
--- /dev/null
+++ b/tests/functional/arm/test_sabrelite.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots a Linux kernel and checks the console
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from qemu_test import LinuxKernelTest, Asset
+
+
+class SabreliteMachine(LinuxKernelTest):
+
+    ASSET_KERNEL = Asset(
+        ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+         '20230607/images/netboot/vmlinuz'),
+        '5851e9c61465a26db810796db671c4729e66e81c365b3ebb1a4b7f772737605b')
+
+    ASSET_INITRD = Asset(
+        ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+         '20230607/images/netboot/initrd.gz'),
+        'fe33f836232a9107716d34dc56d36dea81bab039243a2a42ea6583a50c9b92ca')
+
+    ASSET_DTB = Asset(
+        ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+         '20230607/images/device-tree/imx6q-sabrelite.dtb'),
+        '3ad637c8ea55ebd058a67f686e050b82ccb0d1327bc283623c133c48ad87db44')
+
+    def setUp(self):
+        super().setUp()
+
+        self.kernel_path = self.ASSET_KERNEL.fetch()
+        self.initrd_path = self.ASSET_INITRD.fetch()
+        self.dtb_path = self.ASSET_DTB.fetch()
+
+    def test_console(self):
+        self.require_accelerator("tcg")
+        self.set_machine('sabrelite')
+        self.vm.set_console(console_index=1)
+        self.vm.add_args('-kernel', self.kernel_path,
+                         '-initrd', self.initrd_path,
+                         '-dtb', self.dtb_path)
+
+        self.vm.launch()
+        self.wait_for_console_pattern('Starting system log daemon:')
+
+if __name__ == '__main__':
+    LinuxKernelTest.main()
-- 
2.55.0

Re: [PATCH 07/42] tests/functional/arm: Add console test for `sabrelite` machine

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   MAINTAINERS                            |  1 +
>   tests/functional/arm/meson.build       |  1 +
>   tests/functional/arm/test_sabrelite.py | 46 ++++++++++++++++++++++++++
>   3 files changed, 48 insertions(+)
>   create mode 100755 tests/functional/arm/test_sabrelite.py

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 08/42] hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default

[Bernhard Beschow]

Having 512 MiB of RAM matches real hardware. Fix the machine
default to make its use more ergonomic and less error-prone.

To reproduce the old default behavior for e.g. migration purposes,
`-m 128M` needs to be added to the command line.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/mcimx6ul-evk.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index 40071d2c7b..4964cb9345 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -73,6 +73,7 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc)
     mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex-A7)";
     mc->init = mcimx6ul_evk_init;
     mc->max_cpus = FSL_IMX6UL_NUM_CPUS;
+    mc->default_ram_size = 512 * MiB;
     mc->default_ram_id = "mcimx6ul-evk.ram";
     mc->auto_create_sdcard = true;
 }
-- 
2.55.0

[PATCH 09/42] hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB of RAM by default

[Bernhard Beschow]

Having two CPUs and 1 GiB of RAM matches real hardware. Fix the machine
defaults to make its use more ergonomic and less error-prone.

To reproduce the old default behavior for e.g. migration purposes,
`-smp 1 -m 128M` needs to be passed on the command line.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/mcimx7d-sabre.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 8d223fca6c..8905bf0016 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -81,6 +81,8 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
     mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex-A7)";
     mc->init = mcimx7d_sabre_init;
     mc->max_cpus = FSL_IMX7_NUM_CPUS;
+    mc->default_cpus = FSL_IMX7_NUM_CPUS;
+    mc->default_ram_size = 2 * GiB;
     mc->default_ram_id = "mcimx7d-sabre.ram";
     mc->auto_create_sdcard = true;
     mc->ignore_memory_transaction_failures = true;
-- 
2.55.0

[PATCH 10/42] tests/functional/arm: Add console test for `mcimx7d-sabre` machine

[Bernhard Beschow]

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 MAINTAINERS                                |  1 +
 tests/functional/arm/meson.build           |  1 +
 tests/functional/arm/test_mcimx7d_sabre.py | 46 ++++++++++++++++++++++
 3 files changed, 48 insertions(+)
 create mode 100755 tests/functional/arm/test_mcimx7d_sabre.py

diff --git a/MAINTAINERS b/MAINTAINERS
index 7cc9e558f9..866983d8ee 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -932,6 +932,7 @@ F: include/hw/misc/imx7_*.h
 F: hw/pci-host/designware.c
 F: include/hw/pci-host/designware.h
 F: docs/system/arm/mcimx7d-sabre.rst
+F: tests/functional/arm/test_mcimx7d_sabre.py
 
 MCIMX8MM-EVK / iMX8MM
 M: Gaurav Sharma <gaurav.sharma_7@nxp.com>
diff --git a/tests/functional/arm/meson.build b/tests/functional/arm/meson.build
index 761b371a8d..e49a04ea6a 100644
--- a/tests/functional/arm/meson.build
+++ b/tests/functional/arm/meson.build
@@ -20,6 +20,7 @@ test_arm_timeouts = {
   'bpim2u' : 500,
   'collie' : 180,
   'cubieboard' : 360,
+  'mcimx7d-sabre' : 240,
   'orangepi' : 540,
   'quanta_gsj' : 240,
   'raspi2' : 120,
diff --git a/tests/functional/arm/test_mcimx7d_sabre.py b/tests/functional/arm/test_mcimx7d_sabre.py
new file mode 100755
index 0000000000..2894b5201f
--- /dev/null
+++ b/tests/functional/arm/test_mcimx7d_sabre.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots a Linux kernel and checks the console
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from qemu_test import LinuxKernelTest, Asset
+
+
+class Mcimx7dSabreMachine(LinuxKernelTest):
+
+    ASSET_KERNEL = Asset(
+        ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+         '20230607/images/netboot/vmlinuz'),
+        '5851e9c61465a26db810796db671c4729e66e81c365b3ebb1a4b7f772737605b')
+
+    ASSET_INITRD = Asset(
+        ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+         '20230607/images/netboot/initrd.gz'),
+        'fe33f836232a9107716d34dc56d36dea81bab039243a2a42ea6583a50c9b92ca')
+
+    ASSET_DTB = Asset(
+        ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+         '20230607/images/device-tree/imx7d-sdb.dtb'),
+        'eed45fe3ba682cc814217bc4558551d36c034ec7a7692c4eb6eaf86132baf80c')
+
+    def setUp(self):
+        super().setUp()
+
+        self.kernel_path = self.ASSET_KERNEL.fetch()
+        self.initrd_path = self.ASSET_INITRD.fetch()
+        self.dtb_path = self.ASSET_DTB.fetch()
+
+    def test_console(self):
+        self.require_accelerator("tcg")
+        self.set_machine('mcimx7d-sabre')
+        self.vm.set_console(console_index=0)
+        self.vm.add_args('-kernel', self.kernel_path,
+                         '-initrd', self.initrd_path,
+                         '-dtb', self.dtb_path)
+
+        self.vm.launch()
+        self.wait_for_console_pattern('Starting system log daemon:')
+
+if __name__ == '__main__':
+    LinuxKernelTest.main()
-- 
2.55.0

Re: [PATCH 10/42] tests/functional/arm: Add console test for `mcimx7d-sabre` machine

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   MAINTAINERS                                |  1 +
>   tests/functional/arm/meson.build           |  1 +
>   tests/functional/arm/test_mcimx7d_sabre.py | 46 ++++++++++++++++++++++
>   3 files changed, 48 insertions(+)
>   create mode 100755 tests/functional/arm/test_mcimx7d_sabre.py

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 11/42] hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE

[Bernhard Beschow]

Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon
machine reset.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 include/hw/arm/fsl-imx25.h | 5 ++---
 hw/arm/fsl-imx25.c         | 7 +------
 hw/arm/imx25_pdk.c         | 2 +-
 3 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index b68d4334a0..4bb4d5b3e5 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -29,6 +29,7 @@
 #include "hw/sd/sdhci.h"
 #include "hw/usb/chipidea.h"
 #include "hw/watchdog/wdt_imx2.h"
+#include "hw/core/sysbus.h"
 #include "system/memory.h"
 #include "target/arm/cpu.h"
 #include "qom/object.h"
@@ -45,10 +46,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslIMX25State, FSL_IMX25)
 #define FSL_IMX25_NUM_USBS 2
 
 struct FslIMX25State {
-    /*< private >*/
-    DeviceState parent_obj;
+    SysBusDevice parent_obj;
 
-    /*< public >*/
     ARMCPU         cpu;
     IMXAVICState   avic;
     IMX25CCMState  ccm;
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 7f65f4ca4b..efb22359c5 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -317,16 +317,11 @@ static void fsl_imx25_class_init(ObjectClass *oc, const void *data)
     device_class_set_props(dc, fsl_imx25_properties);
     dc->realize = fsl_imx25_realize;
     dc->desc = "i.MX25 SOC";
-    /*
-     * Reason: uses serial_hds in realize and the imx25 board does not
-     * support multiple CPUs
-     */
-    dc->user_creatable = false;
 }
 
 static const TypeInfo fsl_imx25_type_info = {
     .name = TYPE_FSL_IMX25,
-    .parent = TYPE_DEVICE,
+    .parent = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(FslIMX25State),
     .instance_init = fsl_imx25_init,
     .class_init = fsl_imx25_class_init,
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index 243c30a67e..6ce3e35ee3 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -72,7 +72,7 @@ static void imx25_pdk_init(MachineState *machine)
 
     object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX25);
 
-    qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(&s->soc), &error_fatal);
 
     /* We need to initialize our memory */
     if (machine->ram_size > (FSL_IMX25_SDRAM0_SIZE + FSL_IMX25_SDRAM1_SIZE)) {
-- 
2.55.0

Re: [PATCH 11/42] hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon
> machine reset.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   include/hw/arm/fsl-imx25.h | 5 ++---
>   hw/arm/fsl-imx25.c         | 7 +------
>   hw/arm/imx25_pdk.c         | 2 +-
>   3 files changed, 4 insertions(+), 10 deletions(-)


> diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
> index 7f65f4ca4b..efb22359c5 100644
> --- a/hw/arm/fsl-imx25.c
> +++ b/hw/arm/fsl-imx25.c
> @@ -317,16 +317,11 @@ static void fsl_imx25_class_init(ObjectClass *oc, const void *data)
>       device_class_set_props(dc, fsl_imx25_properties);
>       dc->realize = fsl_imx25_realize;
>       dc->desc = "i.MX25 SOC";
> -    /*
> -     * Reason: uses serial_hds in realize and the imx25 board does not
> -     * support multiple CPUs
> -     */
> -    dc->user_creatable = false;

Distinct logical change? Group in the same patch, same for
sysbus conversion?

>   }

[PATCH 12/42] hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE

[Bernhard Beschow]

Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon
machine reset.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 include/hw/arm/fsl-imx31.h | 5 ++---
 hw/arm/fsl-imx31.c         | 7 +------
 hw/arm/kzm.c               | 2 +-
 3 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h
index 41232a2237..ea916de15a 100644
--- a/include/hw/arm/fsl-imx31.h
+++ b/include/hw/arm/fsl-imx31.h
@@ -25,6 +25,7 @@
 #include "hw/i2c/imx_i2c.h"
 #include "hw/gpio/imx_gpio.h"
 #include "hw/watchdog/wdt_imx2.h"
+#include "hw/core/sysbus.h"
 #include "system/memory.h"
 #include "target/arm/cpu.h"
 #include "qom/object.h"
@@ -38,10 +39,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslIMX31State, FSL_IMX31)
 #define FSL_IMX31_NUM_GPIOS 3
 
 struct FslIMX31State {
-    /*< private >*/
-    DeviceState parent_obj;
+    SysBusDevice parent_obj;
 
-    /*< public >*/
     ARMCPU         cpu;
     IMXAVICState   avic;
     IMX31CCMState  ccm;
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 190f863355..dd929c1085 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -224,16 +224,11 @@ static void fsl_imx31_class_init(ObjectClass *oc, const void *data)
 
     dc->realize = fsl_imx31_realize;
     dc->desc = "i.MX31 SOC";
-    /*
-     * Reason: uses serial_hds in realize and the kzm board does not
-     * support multiple CPUs
-     */
-    dc->user_creatable = false;
 }
 
 static const TypeInfo fsl_imx31_type_info = {
     .name = TYPE_FSL_IMX31,
-    .parent = TYPE_DEVICE,
+    .parent = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(FslIMX31State),
     .instance_init = fsl_imx31_init,
     .class_init = fsl_imx31_class_init,
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 387bf54ced..1e139c2c1f 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -69,7 +69,7 @@ static void kzm_init(MachineState *machine)
 
     object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31);
 
-    qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(&s->soc), &error_fatal);
 
     /* Check the amount of memory is compatible with the SOC */
     if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) {
-- 
2.55.0

[PATCH 13/42] hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE

[Bernhard Beschow]

Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon
machine reset.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 include/hw/arm/fsl-imx6.h | 5 ++---
 hw/arm/fsl-imx6.c         | 4 +---
 hw/arm/sabrelite.c        | 2 +-
 3 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 376deea3a4..4cf26f1fbc 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -35,6 +35,7 @@
 #include "hw/usb/imx-usb-phy.h"
 #include "hw/pci-host/designware.h"
 #include "hw/core/or-irq.h"
+#include "hw/core/sysbus.h"
 #include "system/memory.h"
 #include "target/arm/cpu.h"
 #include "net/can_emu.h"
@@ -56,10 +57,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6State, FSL_IMX6)
 #define FSL_IMX6_NUM_CANS 2
 
 struct FslIMX6State {
-    /*< private >*/
-    DeviceState parent_obj;
+    SysBusDevice parent_obj;
 
-    /*< public >*/
     ARMCPU             cpu[FSL_IMX6_NUM_CPUS];
     A9MPPrivState      a9mpcore;
     IMX6CCMState       ccm;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index eec9673c6f..7ba9b85a2e 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -519,13 +519,11 @@ static void fsl_imx6_class_init(ObjectClass *oc, const void *data)
     device_class_set_props(dc, fsl_imx6_properties);
     dc->realize = fsl_imx6_realize;
     dc->desc = "i.MX6 SOC";
-    /* Reason: Uses serial_hd() in the realize() function */
-    dc->user_creatable = false;
 }
 
 static const TypeInfo fsl_imx6_type_info = {
     .name = TYPE_FSL_IMX6,
-    .parent = TYPE_DEVICE,
+    .parent = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(FslIMX6State),
     .instance_init = fsl_imx6_init,
     .class_init = fsl_imx6_class_init,
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 34f302f83c..f29443948e 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -66,7 +66,7 @@ static void sabrelite_init(MachineState *machine)
                                  OBJECT(s->canbus[i]), &error_fatal);
     }
 
-    qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(&s->soc), &error_fatal);
 
     memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR,
                                 machine->ram);
-- 
2.55.0

[PATCH 14/42] hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE

[Bernhard Beschow]

Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon
machine reset.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 include/hw/arm/fsl-imx6ul.h | 5 ++---
 hw/arm/fsl-imx6ul.c         | 4 +---
 hw/arm/mcimx6ul-evk.c       | 2 +-
 3 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index 6205fe6b77..9ae0488990 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -18,6 +18,7 @@
 #define FSL_IMX6UL_H
 
 #include "hw/cpu/a15mpcore.h"
+#include "hw/core/sysbus.h"
 #include "hw/misc/imx6ul_ccm.h"
 #include "hw/misc/imx6_src.h"
 #include "hw/misc/imx7_snvs.h"
@@ -64,10 +65,8 @@ enum FslIMX6ULConfiguration {
 };
 
 struct FslIMX6ULState {
-    /*< private >*/
-    DeviceState    parent_obj;
+    SysBusDevice   parent_obj;
 
-    /*< public >*/
     ARMCPU             cpu;
     A15MPPrivState     a7mpcore;
     IMXGPTState        gpt[FSL_IMX6UL_NUM_GPTS];
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 1863558a0d..84451c9909 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -730,13 +730,11 @@ static void fsl_imx6ul_class_init(ObjectClass *oc, const void *data)
     device_class_set_props(dc, fsl_imx6ul_properties);
     dc->realize = fsl_imx6ul_realize;
     dc->desc = "i.MX6UL SOC";
-    /* Reason: Uses serial_hds and nd_table in realize() directly */
-    dc->user_creatable = false;
 }
 
 static const TypeInfo fsl_imx6ul_type_info = {
     .name = TYPE_FSL_IMX6UL,
-    .parent = TYPE_DEVICE,
+    .parent = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(FslIMX6ULState),
     .instance_init = fsl_imx6ul_init,
     .class_init = fsl_imx6ul_class_init,
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index 4964cb9345..53d221b4a9 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -44,7 +44,7 @@ static void mcimx6ul_evk_init(MachineState *machine)
     object_property_set_uint(OBJECT(s), "fec2-phy-num", 1, &error_fatal);
     object_property_set_bool(OBJECT(s), "fec1-phy-connected", false,
                              &error_fatal);
-    qdev_realize(DEVICE(s), NULL, &error_fatal);
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
 
     memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR,
                                 machine->ram);
-- 
2.55.0

[PATCH 15/42] hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE

[Bernhard Beschow]

Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon
machine reset.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 include/hw/arm/fsl-imx7.h | 5 ++---
 hw/arm/fsl-imx7.c         | 5 +----
 hw/arm/mcimx7d-sabre.c    | 2 +-
 3 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index a573e0dd4f..945d8c5ad7 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -37,6 +37,7 @@
 #include "hw/pci-host/designware.h"
 #include "hw/usb/chipidea.h"
 #include "hw/core/or-irq.h"
+#include "hw/core/sysbus.h"
 #include "target/arm/cpu.h"
 #include "qom/object.h"
 #include "qemu/units.h"
@@ -64,10 +65,8 @@ enum FslIMX7Configuration {
 };
 
 struct FslIMX7State {
-    /*< private >*/
-    DeviceState    parent_obj;
+    SysBusDevice   parent_obj;
 
-    /*< public >*/
     ARMCPU             cpu[FSL_IMX7_NUM_CPUS];
     A15MPPrivState     a7mpcore;
     IMXGPTState        gpt[FSL_IMX7_NUM_GPTS];
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 2defa498d3..fc5d0efe06 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -753,15 +753,12 @@ static void fsl_imx7_class_init(ObjectClass *oc, const void *data)
 
     device_class_set_props(dc, fsl_imx7_properties);
     dc->realize = fsl_imx7_realize;
-
-    /* Reason: Uses serial_hds and nd_table in realize() directly */
-    dc->user_creatable = false;
     dc->desc = "i.MX7 SOC";
 }
 
 static const TypeInfo fsl_imx7_type_info = {
     .name = TYPE_FSL_IMX7,
-    .parent = TYPE_DEVICE,
+    .parent = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(FslIMX7State),
     .instance_init = fsl_imx7_init,
     .class_init = fsl_imx7_class_init,
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 8905bf0016..c0fefbf3b9 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -52,7 +52,7 @@ static void mcimx7d_sabre_init(MachineState *machine)
     object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
     object_property_set_bool(OBJECT(s), "fec2-phy-connected", false,
                              &error_fatal);
-    qdev_realize(DEVICE(s), NULL, &error_fatal);
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
 
     memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR,
                                 machine->ram);
-- 
2.55.0

[PATCH 16/42] hw/timer/imx_gpt: Wire clock control module via link property

[Bernhard Beschow]

When wiring struct IMXGPTState to the clock control module, it is
currently necessary to reach into its private data. Moreover, when
forgetting to wire the clock control module, QEMU will crash after the
guest has already started. Fix both by letting struct IMXGPTState
expose a link property which is checked at realize time.

Inspired-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/fsl-imx25.c  |  3 ++-
 hw/arm/fsl-imx31.c  |  3 ++-
 hw/arm/fsl-imx6.c   |  3 ++-
 hw/arm/fsl-imx6ul.c |  3 ++-
 hw/arm/fsl-imx7.c   |  3 ++-
 hw/arm/fsl-imx8mm.c |  3 ++-
 hw/arm/fsl-imx8mp.c |  3 ++-
 hw/timer/imx_gpt.c  | 14 ++++++++++++++
 8 files changed, 28 insertions(+), 7 deletions(-)

diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index efb22359c5..0840c2d86a 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -138,7 +138,8 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
             { FSL_IMX25_GPT4_ADDR, FSL_IMX25_GPT4_IRQ }
         };
 
-        s->gpt[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
 
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) {
             return;
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index dd929c1085..b440ad6e28 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -105,7 +105,8 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
                                             serial_table[i].irq));
     }
 
-    s->gpt.ccm = IMX_CCM(&s->ccm);
+    object_property_set_link(OBJECT(&s->gpt), "clock-control-module",
+                             OBJECT(&s->ccm), &error_abort);
 
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt), errp)) {
         return;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 7ba9b85a2e..22deb72496 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -204,7 +204,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
                            qdev_get_gpio_in(gic, serial_table[i].irq));
     }
 
-    s->gpt.ccm = IMX_CCM(&s->ccm);
+    object_property_set_link(OBJECT(&s->gpt), "clock-control-module",
+                             OBJECT(&s->ccm), &error_abort);
 
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt), errp)) {
         return;
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 84451c9909..2786889bda 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -245,7 +245,8 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
             FSL_IMX6UL_GPT2_IRQ,
         };
 
-        s->gpt[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
         sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort);
 
         sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0,
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index fc5d0efe06..9e206c59a1 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -250,7 +250,8 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
             FSL_IMX7_GPT4_IRQ,
         };
 
-        s->gpt[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
         sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort);
         sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, FSL_IMX7_GPTn_ADDR[i]);
         sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c
index 875e92bb34..37934d2951 100644
--- a/hw/arm/fsl-imx8mm.c
+++ b/hw/arm/fsl-imx8mm.c
@@ -420,7 +420,8 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
             fsl_imx8mm_memmap[FSL_IMX8MM_GPT6].addr,
         };
 
-        s->gpt[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
 
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) {
             return;
diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c
index bcd91739d9..f855378dff 100644
--- a/hw/arm/fsl-imx8mp.c
+++ b/hw/arm/fsl-imx8mp.c
@@ -447,7 +447,8 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
             fsl_imx8mp_memmap[FSL_IMX8MP_GPT6].addr,
         };
 
-        s->gpt[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
 
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) {
             return;
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index cdc0257126..22fc8203bf 100644
--- a/hw/timer/imx_gpt.c
+++ b/hw/timer/imx_gpt.c
@@ -15,8 +15,10 @@
 
 #include "qemu/osdep.h"
 #include "hw/core/irq.h"
+#include "hw/core/qdev-properties.h"
 #include "hw/timer/imx_gpt.h"
 #include "migration/vmstate.h"
+#include "qapi/error.h"
 #include "qemu/module.h"
 #include "qemu/log.h"
 #include "trace.h"
@@ -522,6 +524,12 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp)
     IMXGPTState *s = IMX_GPT(dev);
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 
+    if (!s->ccm) {
+        error_setg(errp, "%s 'clock-control-module' link property not set",
+                   dev->canonical_path);
+        return;
+    }
+
     sysbus_init_irq(sbd, &s->irq);
     memory_region_init_io(&s->iomem, OBJECT(s), &imx_gpt_ops, s, TYPE_IMX_GPT,
                           0x00001000);
@@ -530,12 +538,18 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp)
     s->timer = ptimer_init(imx_gpt_timeout, s, PTIMER_POLICY_LEGACY);
 }
 
+static const Property imx_timer_gpt_properties[] = {
+    DEFINE_PROP_LINK("clock-control-module", IMXGPTState, ccm, TYPE_IMX_CCM,
+                     IMXCCMState *),
+};
+
 static void imx_gpt_class_init(ObjectClass *klass, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
 
     dc->realize = imx_gpt_realize;
     device_class_set_legacy_reset(dc, imx_gpt_reset);
+    device_class_set_props(dc, imx_timer_gpt_properties);
     dc->vmsd = &vmstate_imx_timer_gpt;
     dc->desc = "i.MX general timer";
 }
-- 
2.55.0

Re: [PATCH 16/42] hw/timer/imx_gpt: Wire clock control module via link property

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> When wiring struct IMXGPTState to the clock control module, it is
> currently necessary to reach into its private data. Moreover, when
> forgetting to wire the clock control module, QEMU will crash after the
> guest has already started. Fix both by letting struct IMXGPTState
> expose a link property which is checked at realize time.
> 
> Inspired-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/arm/fsl-imx25.c  |  3 ++-
>   hw/arm/fsl-imx31.c  |  3 ++-
>   hw/arm/fsl-imx6.c   |  3 ++-
>   hw/arm/fsl-imx6ul.c |  3 ++-
>   hw/arm/fsl-imx7.c   |  3 ++-
>   hw/arm/fsl-imx8mm.c |  3 ++-
>   hw/arm/fsl-imx8mp.c |  3 ++-
>   hw/timer/imx_gpt.c  | 14 ++++++++++++++
>   8 files changed, 28 insertions(+), 7 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 17/42] hw/timer/imx_epit: Wire clock control module via link property

[Bernhard Beschow]

When wiring struct IMXEPITState to the clock control module, it is
currently necessary to reach into its private data. Moreover, when
forgetting to wire the clock control module, QEMU will crash after the
guest has already started. Fix both by letting struct IMXEPITState
expose a link property which is checked at realize time.

Inspired-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/fsl-imx25.c  |  3 ++-
 hw/arm/fsl-imx31.c  |  3 ++-
 hw/arm/fsl-imx6.c   |  3 ++-
 hw/arm/fsl-imx6ul.c |  3 ++-
 hw/timer/imx_epit.c | 14 ++++++++++++++
 5 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 0840c2d86a..a8745d5d1a 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -160,7 +160,8 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
             { FSL_IMX25_EPIT2_ADDR, FSL_IMX25_EPIT2_IRQ }
         };
 
-        s->epit[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
 
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) {
             return;
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index b440ad6e28..79e2f7f795 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -126,7 +126,8 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
             { FSL_IMX31_EPIT2_ADDR, FSL_IMX31_EPIT2_IRQ },
         };
 
-        s->epit[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
 
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) {
             return;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 22deb72496..5bb828fbb6 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -225,7 +225,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
             { FSL_IMX6_EPIT2_ADDR, FSL_IMX6_EPIT2_IRQ },
         };
 
-        s->epit[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
 
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) {
             return;
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 2786889bda..f72121e23d 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -270,7 +270,8 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
             FSL_IMX6UL_EPIT2_IRQ,
         };
 
-        s->epit[i].ccm = IMX_CCM(&s->ccm);
+        object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+                                 OBJECT(&s->ccm), &error_abort);
         sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &error_abort);
 
         sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0,
diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
index 374ec7d324..e1050b51d8 100644
--- a/hw/timer/imx_epit.c
+++ b/hw/timer/imx_epit.c
@@ -17,7 +17,9 @@
 #include "hw/timer/imx_epit.h"
 #include "migration/vmstate.h"
 #include "hw/core/irq.h"
+#include "hw/core/qdev-properties.h"
 #include "hw/misc/imx_ccm.h"
+#include "qapi/error.h"
 #include "qemu/module.h"
 #include "qemu/log.h"
 #include "trace.h"
@@ -386,6 +388,12 @@ static void imx_epit_realize(DeviceState *dev, Error **errp)
     IMXEPITState *s = IMX_EPIT(dev);
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 
+    if (!s->ccm) {
+        error_setg(errp, "%s 'clock-control-module' link property not set",
+                   dev->canonical_path);
+        return;
+    }
+
     sysbus_init_irq(sbd, &s->irq);
     memory_region_init_io(&s->iomem, OBJECT(s), &imx_epit_ops, s, TYPE_IMX_EPIT,
                           0x00001000);
@@ -412,12 +420,18 @@ static void imx_epit_dev_reset(DeviceState *dev)
     imx_epit_reset(s, true);
 }
 
+static const Property imx_timer_epit_properties[] = {
+    DEFINE_PROP_LINK("clock-control-module", IMXEPITState, ccm, TYPE_IMX_CCM,
+                     IMXCCMState *),
+};
+
 static void imx_epit_class_init(ObjectClass *klass, const void *data)
 {
     DeviceClass *dc  = DEVICE_CLASS(klass);
 
     dc->realize = imx_epit_realize;
     device_class_set_legacy_reset(dc, imx_epit_dev_reset);
+    device_class_set_props(dc, imx_timer_epit_properties);
     dc->vmsd = &vmstate_imx_timer_epit;
     dc->desc = "i.MX periodic timer";
 }
-- 
2.55.0

Re: [PATCH 17/42] hw/timer/imx_epit: Wire clock control module via link property

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> When wiring struct IMXEPITState to the clock control module, it is
> currently necessary to reach into its private data. Moreover, when
> forgetting to wire the clock control module, QEMU will crash after the
> guest has already started. Fix both by letting struct IMXEPITState
> expose a link property which is checked at realize time.
> 
> Inspired-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/arm/fsl-imx25.c  |  3 ++-
>   hw/arm/fsl-imx31.c  |  3 ++-
>   hw/arm/fsl-imx6.c   |  3 ++-
>   hw/arm/fsl-imx6ul.c |  3 ++-
>   hw/timer/imx_epit.c | 14 ++++++++++++++
>   5 files changed, 22 insertions(+), 4 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 18/42] hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM

[Bernhard Beschow]

TYPE_FSL_IMX8MM models the whole address space by representing
unimplemented devices with TYPE_UNIMPLEMENTED_DEVICE. This means that
UNIMP needs to be selected by config FSL_IMX8MM which is currently
missing. Fix that.

Fixes: 7bcd1f30bc83 ("hw/arm: Add the i.MX 8MM EVK(Evaluation Kit) board")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index eae06369b0..ad4b997abb 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -626,6 +626,7 @@ config FSL_IMX8MM
     select SDHCI
     select PCI_EXPRESS_DESIGNWARE
     select PCI_EXPRESS_FSL_IMX8M_PHY
+    select UNIMP
     select USB_DWC3
     select WDT_IMX2
 
-- 
2.55.0

Re: [PATCH 18/42] hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> TYPE_FSL_IMX8MM models the whole address space by representing
> unimplemented devices with TYPE_UNIMPLEMENTED_DEVICE. This means that
> UNIMP needs to be selected by config FSL_IMX8MM which is currently
> missing. Fix that.
> 
> Fixes: 7bcd1f30bc83 ("hw/arm: Add the i.MX 8MM EVK(Evaluation Kit) board")
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/arm/Kconfig | 1 +
>   1 file changed, 1 insertion(+)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 19/42] hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX

[Bernhard Beschow]

Since commit 464ce71a963b "Kconfig: Extract CONFIG_USB_CHIPIDEA from
CONFIG_IMX" all relevant i.MX SoC models select USB_CHIPIDEA such
that selecting USB_EHCI_SYSBUS became redundant in CONFIG_IMX. Remove
it.

Fixes: 464ce71a963b ("Kconfig: Extract CONFIG_USB_CHIPIDEA from CONFIG_IMX")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/misc/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 46e3c03cc8..d1711433ef 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -93,7 +93,6 @@ config IMX
     bool
     select PTIMER
     select SSI
-    select USB_EHCI_SYSBUS
 
 config FSL_IMX8MP_ANALOG
     bool
-- 
2.55.0

[PATCH 20/42] Kconfig: Extract config IMX_AVIC from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_AVIC to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 2 ++
 hw/intc/Kconfig     | 3 +++
 hw/intc/meson.build | 3 ++-
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index ad4b997abb..0b8414501c 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -479,6 +479,7 @@ config FSL_IMX25
     depends on TCG && ARM
     imply I2C_DEVICES
     select IMX
+    select IMX_AVIC
     select IMX_FEC
     select IMX_I2C
     select USB_CHIPIDEA
@@ -492,6 +493,7 @@ config FSL_IMX31
     imply I2C_DEVICES
     select SERIAL_MM
     select IMX
+    select IMX_AVIC
     select IMX_I2C
     select WDT_IMX2
     select LAN9118
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index 05e697967d..97355f9df7 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -5,6 +5,9 @@ config I8259
     bool
     select ISA_BUS
 
+config IMX_AVIC
+    bool
+
 config PL190
     bool
 
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index 0620b0792a..74d84b8ddc 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -23,7 +23,8 @@ system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos
 system_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
 system_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
 system_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c'))
+system_ss.add(when: 'CONFIG_IMX_AVIC', if_true: files('imx_avic.c'))
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpcv2.c'))
 system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'), if_false: files('ioapic-stub.c'))
 system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
 system_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
-- 
2.55.0

Re: [PATCH 20/42] Kconfig: Extract config IMX_AVIC from config IMX

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Over time, QEMU has grown a number of i.MX boards and the monolithic
> config IMX drags in unneeded dependencies into each SoC model. Extract
> config IMX_AVIC to eventually eliminate config IMX.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/arm/Kconfig      | 2 ++
>   hw/intc/Kconfig     | 3 +++
>   hw/intc/meson.build | 3 ++-
>   3 files changed, 7 insertions(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 21/42] Kconfig: Extract config IMX_GPCV2 from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_GPCV2 to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 2 ++
 hw/intc/Kconfig     | 3 +++
 hw/intc/meson.build | 2 +-
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 0b8414501c..1ea4210ccb 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -580,6 +580,7 @@ config FSL_IMX7
     select PCI
     select IMX
     select IMX_FEC
+    select IMX_GPCV2
     select IMX_I2C
     select WDT_IMX2
     select PCI_EXPRESS_DESIGNWARE
@@ -661,6 +662,7 @@ config FSL_IMX6UL
     select IMX
     select IMX6UL_LCDIF
     select IMX_FEC
+    select IMX_GPCV2
     select IMX_I2C
     select IMX_USBPHY
     select WDT_IMX2
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index 97355f9df7..98dba7efb8 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -8,6 +8,9 @@ config I8259
 config IMX_AVIC
     bool
 
+config IMX_GPCV2
+    bool
+
 config PL190
     bool
 
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index 74d84b8ddc..2ac575095f 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -24,7 +24,7 @@ system_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
 system_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
 system_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
 system_ss.add(when: 'CONFIG_IMX_AVIC', if_true: files('imx_avic.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpcv2.c'))
+system_ss.add(when: 'CONFIG_IMX_GPCV2', if_true: files('imx_gpcv2.c'))
 system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'), if_false: files('ioapic-stub.c'))
 system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
 system_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
-- 
2.55.0

Re: [PATCH 21/42] Kconfig: Extract config IMX_GPCV2 from config IMX

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Over time, QEMU has grown a number of i.MX boards and the monolithic
> config IMX drags in unneeded dependencies into each SoC model. Extract
> config IMX_GPCV2 to eventually eliminate config IMX.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/arm/Kconfig      | 2 ++
>   hw/intc/Kconfig     | 3 +++
>   hw/intc/meson.build | 2 +-
>   3 files changed, 6 insertions(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 22/42] Kconfig: Extract config IMX_RNG from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_RNG to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 1 +
 hw/misc/Kconfig     | 3 +++
 hw/misc/meson.build | 2 +-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 1ea4210ccb..1436c05c98 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -482,6 +482,7 @@ config FSL_IMX25
     select IMX_AVIC
     select IMX_FEC
     select IMX_I2C
+    select IMX_RNG
     select USB_CHIPIDEA
     select WDT_IMX2
     select SDHCI
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index d1711433ef..3f17d29053 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -94,6 +94,9 @@ config IMX
     select PTIMER
     select SSI
 
+config IMX_RNG
+    bool
+
 config FSL_IMX8MP_ANALOG
     bool
 
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 9790afa104..61e128ab7a 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -62,6 +62,7 @@ system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
 system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
+system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
 system_ss.add(when: 'CONFIG_IMX', if_true: files(
   'imx25_ccm.c',
   'imx31_ccm.c',
@@ -73,7 +74,6 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
   'imx7_gpr.c',
   'imx7_snvs.c',
   'imx_ccm.c',
-  'imx_rngc.c',
 ))
 system_ss.add(when: 'CONFIG_MAX78000_AES', if_true: files('max78000_aes.c'))
 system_ss.add(when: 'CONFIG_MAX78000_GCR', if_true: files('max78000_gcr.c'))
-- 
2.55.0

Re: [PATCH 22/42] Kconfig: Extract config IMX_RNG from config IMX

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Over time, QEMU has grown a number of i.MX boards and the monolithic
> config IMX drags in unneeded dependencies into each SoC model. Extract
> config IMX_RNG to eventually eliminate config IMX.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/arm/Kconfig      | 1 +
>   hw/misc/Kconfig     | 3 +++
>   hw/misc/meson.build | 2 +-
>   3 files changed, 5 insertions(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 23/42] Kconfig: Extract config FSL_IMX7_GPR from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config FSL_IMX7_GPR to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 1 +
 hw/misc/Kconfig     | 3 +++
 hw/misc/meson.build | 2 +-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 1436c05c98..d3dda015c4 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -578,6 +578,7 @@ config FSL_IMX7
     imply TEST_DEVICES
     imply I2C_DEVICES
     select A15MPCORE
+    select FSL_IMX7_GPR
     select PCI
     select IMX
     select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 3f17d29053..cf9ea68219 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -97,6 +97,9 @@ config IMX
 config IMX_RNG
     bool
 
+config FSL_IMX7_GPR
+    bool
+
 config FSL_IMX8MP_ANALOG
     bool
 
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 61e128ab7a..c31c173e5a 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -60,6 +60,7 @@ system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
 system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
 system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
 system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
 system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
@@ -71,7 +72,6 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
   'imx6ul_ccm.c',
   'imx7_ccm.c',
   'imx7_src.c',
-  'imx7_gpr.c',
   'imx7_snvs.c',
   'imx_ccm.c',
 ))
-- 
2.55.0

Re: [PATCH 23/42] Kconfig: Extract config FSL_IMX7_GPR from config IMX

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:
> Over time, QEMU has grown a number of i.MX boards and the monolithic
> config IMX drags in unneeded dependencies into each SoC model. Extract
> config FSL_IMX7_GPR to eventually eliminate config IMX.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/arm/Kconfig      | 1 +
>   hw/misc/Kconfig     | 3 +++
>   hw/misc/meson.build | 2 +-
>   3 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 1436c05c98..d3dda015c4 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -578,6 +578,7 @@ config FSL_IMX7
>       imply TEST_DEVICES
>       imply I2C_DEVICES
>       select A15MPCORE
> +    select FSL_IMX7_GPR

         select IMX7_SOC

>       select PCI

     config IMX7_SOC

>       select IMX
>       select IMX_FEC

         select FSL_IMX7_GPR


Machine -> SoC -> CPU & peripherals

[PATCH 24/42] Kconfig: Extract config FSL_IMX{6, 7}_SRC from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
SoC-specific config FSL_IMX{6,7}_SRC to eventually eliminate config
IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 3 +++
 hw/misc/Kconfig     | 6 ++++++
 hw/misc/meson.build | 4 ++--
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index d3dda015c4..7e909485e6 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -504,6 +504,7 @@ config FSL_IMX6
     imply PCIE_DEVICES
     imply I2C_DEVICES
     select A9MPCORE
+    select FSL_IMX6_SRC
     select IMX
     select IMX_FEC
     select IMX_I2C
@@ -579,6 +580,7 @@ config FSL_IMX7
     imply I2C_DEVICES
     select A15MPCORE
     select FSL_IMX7_GPR
+    select FSL_IMX7_SRC
     select PCI
     select IMX
     select IMX_FEC
@@ -661,6 +663,7 @@ config FSL_IMX6UL
     depends on TCG && ARM
     imply I2C_DEVICES
     select A15MPCORE
+    select FSL_IMX6_SRC
     select IMX
     select IMX6UL_LCDIF
     select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index cf9ea68219..193a6b5f56 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -97,9 +97,15 @@ config IMX
 config IMX_RNG
     bool
 
+config FSL_IMX6_SRC
+    bool
+
 config FSL_IMX7_GPR
     bool
 
+config FSL_IMX7_SRC
+    bool
+
 config FSL_IMX8MP_ANALOG
     bool
 
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index c31c173e5a..477fbd60fa 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -60,7 +60,9 @@ system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
 system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
 system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
 system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX6_SRC', if_true: files('imx6_src.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_SRC', if_true: files('imx7_src.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
 system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
@@ -68,10 +70,8 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
   'imx25_ccm.c',
   'imx31_ccm.c',
   'imx6_ccm.c',
-  'imx6_src.c',
   'imx6ul_ccm.c',
   'imx7_ccm.c',
-  'imx7_src.c',
   'imx7_snvs.c',
   'imx_ccm.c',
 ))
-- 
2.55.0

[PATCH 25/42] Kconfig: Extract config FSL_IMX7_SNVS from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config FSL_IMX7_SNVS to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 5 +++++
 hw/misc/Kconfig     | 3 +++
 hw/misc/meson.build | 2 +-
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 7e909485e6..cd9ddeb822 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -505,6 +505,7 @@ config FSL_IMX6
     imply I2C_DEVICES
     select A9MPCORE
     select FSL_IMX6_SRC
+    select FSL_IMX7_SNVS
     select IMX
     select IMX_FEC
     select IMX_I2C
@@ -580,6 +581,7 @@ config FSL_IMX7
     imply I2C_DEVICES
     select A15MPCORE
     select FSL_IMX7_GPR
+    select FSL_IMX7_SNVS
     select FSL_IMX7_SRC
     select PCI
     select IMX
@@ -599,6 +601,7 @@ config FSL_IMX8MP
     imply PCI_DEVICES
     select ARM_GIC
     select CAN_FLEXCAN
+    select FSL_IMX7_SNVS
     select FSL_IMX8MP_ANALOG
     select FSL_IMX8MP_CCM
     select IMX
@@ -624,6 +627,7 @@ config FSL_IMX8MM
     imply PCI_DEVICES
     imply I2C_DEVICES
     select ARM_GIC
+    select FSL_IMX7_SNVS
     select FSL_IMX8MP_ANALOG
     select FSL_IMX8MP_CCM
     select IMX
@@ -664,6 +668,7 @@ config FSL_IMX6UL
     imply I2C_DEVICES
     select A15MPCORE
     select FSL_IMX6_SRC
+    select FSL_IMX7_SNVS
     select IMX
     select IMX6UL_LCDIF
     select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 193a6b5f56..4d47de6a02 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -103,6 +103,9 @@ config FSL_IMX6_SRC
 config FSL_IMX7_GPR
     bool
 
+config FSL_IMX7_SNVS
+    bool
+
 config FSL_IMX7_SRC
     bool
 
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 477fbd60fa..48c5c20455 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -62,6 +62,7 @@ system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
 system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX6_SRC', if_true: files('imx6_src.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_SNVS', if_true: files('imx7_snvs.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX7_SRC', if_true: files('imx7_src.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
@@ -72,7 +73,6 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
   'imx6_ccm.c',
   'imx6ul_ccm.c',
   'imx7_ccm.c',
-  'imx7_snvs.c',
   'imx_ccm.c',
 ))
 system_ss.add(when: 'CONFIG_MAX78000_AES', if_true: files('max78000_aes.c'))
-- 
2.55.0

[PATCH 26/42] Kconfig: Extract dedicated config FSL_IMXx_CCM from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
SoC-specific config FSL_IMXx_CCM to eventually eliminate config IMX.

Note that config IMX_CCM represents a base class for i.MX clock
control modules which is used in i.MX timers and FlexCAN.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      |  5 +++++
 hw/misc/Kconfig     | 25 +++++++++++++++++++++++++
 hw/misc/meson.build | 14 ++++++--------
 hw/net/Kconfig      |  2 +-
 4 files changed, 37 insertions(+), 9 deletions(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index cd9ddeb822..0649417305 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -478,6 +478,7 @@ config FSL_IMX25
     default y
     depends on TCG && ARM
     imply I2C_DEVICES
+    select FSL_IMX25_CCM
     select IMX
     select IMX_AVIC
     select IMX_FEC
@@ -492,6 +493,7 @@ config FSL_IMX31
     default y
     depends on TCG && ARM
     imply I2C_DEVICES
+    select FSL_IMX31_CCM
     select SERIAL_MM
     select IMX
     select IMX_AVIC
@@ -504,6 +506,7 @@ config FSL_IMX6
     imply PCIE_DEVICES
     imply I2C_DEVICES
     select A9MPCORE
+    select FSL_IMX6_CCM
     select FSL_IMX6_SRC
     select FSL_IMX7_SNVS
     select IMX
@@ -580,6 +583,7 @@ config FSL_IMX7
     imply TEST_DEVICES
     imply I2C_DEVICES
     select A15MPCORE
+    select FSL_IMX7_CCM
     select FSL_IMX7_GPR
     select FSL_IMX7_SNVS
     select FSL_IMX7_SRC
@@ -668,6 +672,7 @@ config FSL_IMX6UL
     imply I2C_DEVICES
     select A15MPCORE
     select FSL_IMX6_SRC
+    select FSL_IMX6UL_CCM
     select FSL_IMX7_SNVS
     select IMX
     select IMX6UL_LCDIF
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 4d47de6a02..a2095d64ae 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -91,15 +91,39 @@ config ECCMEMCTL
 
 config IMX
     bool
+    depends on IMX_CCM
     select PTIMER
     select SSI
 
+config IMX_CCM
+    bool
+
 config IMX_RNG
     bool
 
+config FSL_IMX25_CCM
+    bool
+    select IMX_CCM
+
+config FSL_IMX31_CCM
+    bool
+    select IMX_CCM
+
+config FSL_IMX6_CCM
+    bool
+    select IMX_CCM
+
 config FSL_IMX6_SRC
     bool
 
+config FSL_IMX6UL_CCM
+    bool
+    select IMX_CCM
+
+config FSL_IMX7_CCM
+    bool
+    select IMX_CCM
+
 config FSL_IMX7_GPR
     bool
 
@@ -114,6 +138,7 @@ config FSL_IMX8MP_ANALOG
 
 config FSL_IMX8MP_CCM
     bool
+    select IMX_CCM
 
 config STM32_RCC
     bool
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 48c5c20455..6ff31183a6 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -60,21 +60,19 @@ system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
 system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
 system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
 system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX25_CCM', if_true: files('imx25_ccm.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX31_CCM', if_true: files('imx31_ccm.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX6_CCM', if_true: files('imx6_ccm.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX6_SRC', if_true: files('imx6_src.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX6UL_CCM', if_true: files('imx6ul_ccm.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_CCM', if_true: files('imx7_ccm.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX7_SNVS', if_true: files('imx7_snvs.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX7_SRC', if_true: files('imx7_src.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
 system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
+system_ss.add(when: 'CONFIG_IMX_CCM', if_true: files('imx_ccm.c'))
 system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files(
-  'imx25_ccm.c',
-  'imx31_ccm.c',
-  'imx6_ccm.c',
-  'imx6ul_ccm.c',
-  'imx7_ccm.c',
-  'imx_ccm.c',
-))
 system_ss.add(when: 'CONFIG_MAX78000_AES', if_true: files('max78000_aes.c'))
 system_ss.add(when: 'CONFIG_MAX78000_GCR', if_true: files('max78000_gcr.c'))
 system_ss.add(when: 'CONFIG_MAX78000_ICC', if_true: files('max78000_icc.c'))
diff --git a/hw/net/Kconfig b/hw/net/Kconfig
index b56a173eed..4a2cacbcd2 100644
--- a/hw/net/Kconfig
+++ b/hw/net/Kconfig
@@ -160,5 +160,5 @@ config CAN_CTUCANFD_PCI
 
 config CAN_FLEXCAN
     bool
-    depends on IMX
+    depends on IMX_CCM
     select CAN_BUS
-- 
2.55.0

[PATCH 27/42] Kconfig: Extract config IMX_GPT from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_GPT to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig       | 7 +++++++
 hw/timer/Kconfig     | 5 +++++
 hw/timer/meson.build | 2 +-
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 0649417305..e7ed5ea680 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -482,6 +482,7 @@ config FSL_IMX25
     select IMX
     select IMX_AVIC
     select IMX_FEC
+    select IMX_GPT
     select IMX_I2C
     select IMX_RNG
     select USB_CHIPIDEA
@@ -497,6 +498,7 @@ config FSL_IMX31
     select SERIAL_MM
     select IMX
     select IMX_AVIC
+    select IMX_GPT
     select IMX_I2C
     select WDT_IMX2
     select LAN9118
@@ -511,6 +513,7 @@ config FSL_IMX6
     select FSL_IMX7_SNVS
     select IMX
     select IMX_FEC
+    select IMX_GPT
     select IMX_I2C
     select IMX_USBPHY
     select CAN_FLEXCAN
@@ -591,6 +594,7 @@ config FSL_IMX7
     select IMX
     select IMX_FEC
     select IMX_GPCV2
+    select IMX_GPT
     select IMX_I2C
     select WDT_IMX2
     select PCI_EXPRESS_DESIGNWARE
@@ -610,6 +614,7 @@ config FSL_IMX8MP
     select FSL_IMX8MP_CCM
     select IMX
     select IMX_FEC
+    select IMX_GPT
     select IMX_I2C
     select OR_IRQ
     select PCI_EXPRESS_DESIGNWARE
@@ -636,6 +641,7 @@ config FSL_IMX8MM
     select FSL_IMX8MP_CCM
     select IMX
     select IMX_FEC
+    select IMX_GPT
     select IMX_I2C
     select OR_IRQ
     select SDHCI
@@ -678,6 +684,7 @@ config FSL_IMX6UL
     select IMX6UL_LCDIF
     select IMX_FEC
     select IMX_GPCV2
+    select IMX_GPT
     select IMX_I2C
     select IMX_USBPHY
     select WDT_IMX2
diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
index e1b751a54a..49a4d20e55 100644
--- a/hw/timer/Kconfig
+++ b/hw/timer/Kconfig
@@ -23,6 +23,11 @@ config I8254
     bool
     depends on ISA_BUS
 
+config IMX_GPT
+    bool
+    depends on IMX_CCM
+    select PTIMER
+
 config ALLWINNER_A10_PIT
     bool
     select PTIMER
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
index 8323efaf46..477dd47486 100644
--- a/hw/timer/meson.build
+++ b/hw/timer/meson.build
@@ -16,7 +16,7 @@ system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
 system_ss.add(when: 'CONFIG_HPET_C', if_true: files('hpet.c'))
 system_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
 system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpt.c'))
+system_ss.add(when: 'CONFIG_IMX_GPT', if_true: files('imx_gpt.c'))
 system_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
 system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
 system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_timer.c'))
-- 
2.55.0

[PATCH 28/42] Kconfig: Extract config IMX_EPIT from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_EPIT to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig       | 4 ++++
 hw/misc/Kconfig      | 2 --
 hw/timer/Kconfig     | 5 +++++
 hw/timer/meson.build | 2 +-
 4 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index e7ed5ea680..a2d94e238d 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -481,6 +481,7 @@ config FSL_IMX25
     select FSL_IMX25_CCM
     select IMX
     select IMX_AVIC
+    select IMX_EPIT
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
@@ -498,6 +499,7 @@ config FSL_IMX31
     select SERIAL_MM
     select IMX
     select IMX_AVIC
+    select IMX_EPIT
     select IMX_GPT
     select IMX_I2C
     select WDT_IMX2
@@ -512,6 +514,7 @@ config FSL_IMX6
     select FSL_IMX6_SRC
     select FSL_IMX7_SNVS
     select IMX
+    select IMX_EPIT
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
@@ -682,6 +685,7 @@ config FSL_IMX6UL
     select FSL_IMX7_SNVS
     select IMX
     select IMX6UL_LCDIF
+    select IMX_EPIT
     select IMX_FEC
     select IMX_GPCV2
     select IMX_GPT
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index a2095d64ae..dbdef58505 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -91,8 +91,6 @@ config ECCMEMCTL
 
 config IMX
     bool
-    depends on IMX_CCM
-    select PTIMER
     select SSI
 
 config IMX_CCM
diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
index 49a4d20e55..e098376d40 100644
--- a/hw/timer/Kconfig
+++ b/hw/timer/Kconfig
@@ -23,6 +23,11 @@ config I8254
     bool
     depends on ISA_BUS
 
+config IMX_EPIT
+    bool
+    depends on IMX_CCM
+    select PTIMER
+
 config IMX_GPT
     bool
     depends on IMX_CCM
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
index 477dd47486..e2bcdbdf65 100644
--- a/hw/timer/meson.build
+++ b/hw/timer/meson.build
@@ -15,7 +15,7 @@ system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pwm.c'))
 system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
 system_ss.add(when: 'CONFIG_HPET_C', if_true: files('hpet.c'))
 system_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
+system_ss.add(when: 'CONFIG_IMX_EPIT', if_true: files('imx_epit.c'))
 system_ss.add(when: 'CONFIG_IMX_GPT', if_true: files('imx_gpt.c'))
 system_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
 system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
-- 
2.55.0

[PATCH 29/42] Kconfig: Extract config GPIO_IMX from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config GPIO_IMX to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 7 +++++++
 hw/gpio/Kconfig     | 3 +++
 hw/gpio/meson.build | 2 +-
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index a2d94e238d..25eee42c52 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -479,6 +479,7 @@ config FSL_IMX25
     depends on TCG && ARM
     imply I2C_DEVICES
     select FSL_IMX25_CCM
+    select GPIO_IMX
     select IMX
     select IMX_AVIC
     select IMX_EPIT
@@ -496,6 +497,7 @@ config FSL_IMX31
     depends on TCG && ARM
     imply I2C_DEVICES
     select FSL_IMX31_CCM
+    select GPIO_IMX
     select SERIAL_MM
     select IMX
     select IMX_AVIC
@@ -513,6 +515,7 @@ config FSL_IMX6
     select FSL_IMX6_CCM
     select FSL_IMX6_SRC
     select FSL_IMX7_SNVS
+    select GPIO_IMX
     select IMX
     select IMX_EPIT
     select IMX_FEC
@@ -593,6 +596,7 @@ config FSL_IMX7
     select FSL_IMX7_GPR
     select FSL_IMX7_SNVS
     select FSL_IMX7_SRC
+    select GPIO_IMX
     select PCI
     select IMX
     select IMX_FEC
@@ -615,6 +619,7 @@ config FSL_IMX8MP
     select FSL_IMX7_SNVS
     select FSL_IMX8MP_ANALOG
     select FSL_IMX8MP_CCM
+    select GPIO_IMX
     select IMX
     select IMX_FEC
     select IMX_GPT
@@ -642,6 +647,7 @@ config FSL_IMX8MM
     select FSL_IMX7_SNVS
     select FSL_IMX8MP_ANALOG
     select FSL_IMX8MP_CCM
+    select GPIO_IMX
     select IMX
     select IMX_FEC
     select IMX_GPT
@@ -683,6 +689,7 @@ config FSL_IMX6UL
     select FSL_IMX6_SRC
     select FSL_IMX6UL_CCM
     select FSL_IMX7_SNVS
+    select GPIO_IMX
     select IMX
     select IMX6UL_LCDIF
     select IMX_EPIT
diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig
index fcc7c70bd5..6911eafbb6 100644
--- a/hw/gpio/Kconfig
+++ b/hw/gpio/Kconfig
@@ -1,6 +1,9 @@
 config PL061
     bool
 
+config GPIO_IMX
+    bool
+
 config GPIO_KEY
     bool
 
diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build
index 0555f44b6a..6d233826fc 100644
--- a/hw/gpio/meson.build
+++ b/hw/gpio/meson.build
@@ -1,3 +1,4 @@
+system_ss.add(when: 'CONFIG_GPIO_IMX', if_true: files('imx_gpio.c'))
 system_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c'))
 system_ss.add(when: 'CONFIG_GPIO_MPC8XXX', if_true: files('mpc8xxx.c'))
 system_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c'))
@@ -6,7 +7,6 @@ system_ss.add(when: 'CONFIG_PCA9554', if_true: files('pca9554.c'))
 system_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c'))
 system_ss.add(when: 'CONFIG_ZAURUS_SCOOP', if_true: files('zaurus.c'))
 
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpio.c'))
 system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_gpio.c'))
 system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_gpio.c'))
 system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gpio.c'))
-- 
2.55.0

[PATCH 30/42] Kconfig: Extract config IMX_SPI from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_SPI to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig     | 5 +++++
 hw/misc/Kconfig    | 1 -
 hw/ssi/Kconfig     | 4 ++++
 hw/ssi/meson.build | 2 +-
 4 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 25eee42c52..3510e4a6d4 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -521,6 +521,7 @@ config FSL_IMX6
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
+    select IMX_SPI
     select IMX_USBPHY
     select CAN_FLEXCAN
     select WDT_IMX2
@@ -603,6 +604,7 @@ config FSL_IMX7
     select IMX_GPCV2
     select IMX_GPT
     select IMX_I2C
+    select IMX_SPI
     select WDT_IMX2
     select PCI_EXPRESS_DESIGNWARE
     select SDHCI
@@ -624,6 +626,7 @@ config FSL_IMX8MP
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
+    select IMX_SPI
     select OR_IRQ
     select PCI_EXPRESS_DESIGNWARE
     select PCI_EXPRESS_FSL_IMX8M_PHY
@@ -652,6 +655,7 @@ config FSL_IMX8MM
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
+    select IMX_SPI
     select OR_IRQ
     select SDHCI
     select PCI_EXPRESS_DESIGNWARE
@@ -697,6 +701,7 @@ config FSL_IMX6UL
     select IMX_GPCV2
     select IMX_GPT
     select IMX_I2C
+    select IMX_SPI
     select IMX_USBPHY
     select WDT_IMX2
     select SDHCI
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index dbdef58505..ab238767b8 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -91,7 +91,6 @@ config ECCMEMCTL
 
 config IMX
     bool
-    select SSI
 
 config IMX_CCM
     bool
diff --git a/hw/ssi/Kconfig b/hw/ssi/Kconfig
index 1bd56463c1..d477d20e9b 100644
--- a/hw/ssi/Kconfig
+++ b/hw/ssi/Kconfig
@@ -32,3 +32,7 @@ config PNV_SPI
 config ALLWINNER_A10_SPI
     bool
     select SSI
+
+config IMX_SPI
+    bool
+    select SSI
diff --git a/hw/ssi/meson.build b/hw/ssi/meson.build
index 6afb1ea200..f334e48e2f 100644
--- a/hw/ssi/meson.build
+++ b/hw/ssi/meson.build
@@ -9,7 +9,7 @@ system_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c'))
 system_ss.add(when: 'CONFIG_XILINX_SPI', if_true: files('xilinx_spi.c'))
 system_ss.add(when: 'CONFIG_XILINX_SPIPS', if_true: files('xilinx_spips.c'))
 system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-ospi.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_spi.c'))
+system_ss.add(when: 'CONFIG_IMX_SPI', if_true: files('imx_spi.c'))
 system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_spi_host.c'))
 system_ss.add(when: 'CONFIG_BCM2835_SPI', if_true: files('bcm2835_spi.c'))
 system_ss.add(when: 'CONFIG_PNV_SPI', if_true: files('pnv_spi.c'))
-- 
2.55.0

[PATCH 31/42] Kconfig: Extract config IMX_SERIAL from config IMX

[Bernhard Beschow]

Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_SERIAL to eventually eliminate config IMX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig      | 7 +++++++
 hw/char/Kconfig     | 3 +++
 hw/char/meson.build | 2 +-
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 3510e4a6d4..13b29475d9 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -487,6 +487,7 @@ config FSL_IMX25
     select IMX_GPT
     select IMX_I2C
     select IMX_RNG
+    select IMX_SERIAL
     select USB_CHIPIDEA
     select WDT_IMX2
     select SDHCI
@@ -504,6 +505,7 @@ config FSL_IMX31
     select IMX_EPIT
     select IMX_GPT
     select IMX_I2C
+    select IMX_SERIAL
     select WDT_IMX2
     select LAN9118
 
@@ -521,6 +523,7 @@ config FSL_IMX6
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
+    select IMX_SERIAL
     select IMX_SPI
     select IMX_USBPHY
     select CAN_FLEXCAN
@@ -604,6 +607,7 @@ config FSL_IMX7
     select IMX_GPCV2
     select IMX_GPT
     select IMX_I2C
+    select IMX_SERIAL
     select IMX_SPI
     select WDT_IMX2
     select PCI_EXPRESS_DESIGNWARE
@@ -626,6 +630,7 @@ config FSL_IMX8MP
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
+    select IMX_SERIAL
     select IMX_SPI
     select OR_IRQ
     select PCI_EXPRESS_DESIGNWARE
@@ -655,6 +660,7 @@ config FSL_IMX8MM
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
+    select IMX_SERIAL
     select IMX_SPI
     select OR_IRQ
     select SDHCI
@@ -701,6 +707,7 @@ config FSL_IMX6UL
     select IMX_GPCV2
     select IMX_GPT
     select IMX_I2C
+    select IMX_SERIAL
     select IMX_SPI
     select IMX_USBPHY
     select WDT_IMX2
diff --git a/hw/char/Kconfig b/hw/char/Kconfig
index 020c0a84bb..54f9936534 100644
--- a/hw/char/Kconfig
+++ b/hw/char/Kconfig
@@ -48,6 +48,9 @@ config VIRTIO_SERIAL
     default y
     depends on VIRTIO
 
+config IMX_SERIAL
+    bool
+
 config MAX78000_UART
     bool
 
diff --git a/hw/char/meson.build b/hw/char/meson.build
index fc3d7ee506..65351c39de 100644
--- a/hw/char/meson.build
+++ b/hw/char/meson.build
@@ -3,7 +3,7 @@ system_ss.add(when: 'CONFIG_CMSDK_APB_UART', if_true: files('cmsdk-apb-uart.c'))
 system_ss.add(when: 'CONFIG_ESCC', if_true: files('escc.c'))
 system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_apbuart.c'))
 system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_uart.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_serial.c'))
+system_ss.add(when: 'CONFIG_IMX_SERIAL', if_true: files('imx_serial.c'))
 system_ss.add(when: 'CONFIG_IP_OCTAL_232', if_true: files('ipoctal232.c'))
 system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c'))
 system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c'))
-- 
2.55.0

[PATCH 32/42] Kconfig: Remove config IMX

[Bernhard Beschow]

The previous changes removed all uses of config IMX. Remove the now
hollow config item.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/arm/Kconfig  | 7 -------
 hw/misc/Kconfig | 3 ---
 2 files changed, 10 deletions(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 13b29475d9..860df5ba9d 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -480,7 +480,6 @@ config FSL_IMX25
     imply I2C_DEVICES
     select FSL_IMX25_CCM
     select GPIO_IMX
-    select IMX
     select IMX_AVIC
     select IMX_EPIT
     select IMX_FEC
@@ -500,7 +499,6 @@ config FSL_IMX31
     select FSL_IMX31_CCM
     select GPIO_IMX
     select SERIAL_MM
-    select IMX
     select IMX_AVIC
     select IMX_EPIT
     select IMX_GPT
@@ -518,7 +516,6 @@ config FSL_IMX6
     select FSL_IMX6_SRC
     select FSL_IMX7_SNVS
     select GPIO_IMX
-    select IMX
     select IMX_EPIT
     select IMX_FEC
     select IMX_GPT
@@ -602,7 +599,6 @@ config FSL_IMX7
     select FSL_IMX7_SRC
     select GPIO_IMX
     select PCI
-    select IMX
     select IMX_FEC
     select IMX_GPCV2
     select IMX_GPT
@@ -626,7 +622,6 @@ config FSL_IMX8MP
     select FSL_IMX8MP_ANALOG
     select FSL_IMX8MP_CCM
     select GPIO_IMX
-    select IMX
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
@@ -656,7 +651,6 @@ config FSL_IMX8MM
     select FSL_IMX8MP_ANALOG
     select FSL_IMX8MP_CCM
     select GPIO_IMX
-    select IMX
     select IMX_FEC
     select IMX_GPT
     select IMX_I2C
@@ -700,7 +694,6 @@ config FSL_IMX6UL
     select FSL_IMX6UL_CCM
     select FSL_IMX7_SNVS
     select GPIO_IMX
-    select IMX
     select IMX6UL_LCDIF
     select IMX_EPIT
     select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index ab238767b8..93666c4ac0 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -89,9 +89,6 @@ config IVSHMEM_FLAT_DEVICE
 config ECCMEMCTL
     bool
 
-config IMX
-    bool
-
 config IMX_CCM
     bool
 
-- 
2.55.0

[PATCH 33/42] hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency

[Bernhard Beschow]

The config option GPIO_PWR provides the "gpio-pwr" type which is
currently only used by the ARM virt machine. Remove this unused
dependency from config VMAPPLE.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/vmapple/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
index 2382b29767..b8aa7d8eb0 100644
--- a/hw/vmapple/Kconfig
+++ b/hw/vmapple/Kconfig
@@ -25,7 +25,6 @@ config VMAPPLE
     select PL011 # UART
     select PL031 # RTC
     select PL061 # GPIO
-    select GPIO_PWR
     select PVPANIC_MMIO
     select VMAPPLE_AES
     select VMAPPLE_BDIF
-- 
2.55.0

Re: [PATCH 33/42] hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency

[Philippe Mathieu-Daudé]

On 21/9/26 23:47, Bernhard Beschow wrote:
> The config option GPIO_PWR provides the "gpio-pwr" type which is
> currently only used by the ARM virt machine. Remove this unused
> dependency from config VMAPPLE.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/vmapple/Kconfig | 1 -
>   1 file changed, 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 34/42] hw/arm/fsl-imx8m: Fix typo

[Bernhard Beschow]

This is IMX8MP and IMX8MM, not IMX6.

Fixes: 0c105b261551 ("hw/arm/fsl-imx8mp: Add Ethernet controller")
Fixes: 857670200c51 ("hw/arm/fsl-imx8mm: Adding support for ENET ethernet controller")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 include/hw/arm/fsl-imx8mm.h | 4 ++--
 include/hw/arm/fsl-imx8mp.h | 4 ++--
 hw/arm/fsl-imx8mm.c         | 2 +-
 hw/arm/fsl-imx8mp.c         | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/hw/arm/fsl-imx8mm.h b/include/hw/arm/fsl-imx8mm.h
index 60d79a6e3c..1966fa505f 100644
--- a/include/hw/arm/fsl-imx8mm.h
+++ b/include/hw/arm/fsl-imx8mm.h
@@ -229,8 +229,8 @@ enum FslImx8mmIrqs {
     FSL_IMX8MM_WDOG2_IRQ    = 79,
     FSL_IMX8MM_WDOG3_IRQ    = 10,
 
-    FSL_IMX8MM_ENET1_MAC_IRQ    = 118,
-    FSL_IMX6_ENET1_MAC_1588_IRQ = 121,
+    FSL_IMX8MM_ENET1_MAC_IRQ      = 118,
+    FSL_IMX8MM_ENET1_MAC_1588_IRQ = 121,
 
     FSL_IMX8MM_PCI_INTA_IRQ = 122,
     FSL_IMX8MM_PCI_INTB_IRQ = 123,
diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h
index 2be3c51af5..3acfffd30f 100644
--- a/include/hw/arm/fsl-imx8mp.h
+++ b/include/hw/arm/fsl-imx8mp.h
@@ -276,8 +276,8 @@ enum FslImx8mpIrqs {
     FSL_IMX8MP_WDOG2_IRQ    = 79,
     FSL_IMX8MP_WDOG3_IRQ    = 10,
 
-    FSL_IMX8MP_ENET1_MAC_IRQ    = 118,
-    FSL_IMX6_ENET1_MAC_1588_IRQ = 121,
+    FSL_IMX8MP_ENET1_MAC_IRQ      = 118,
+    FSL_IMX8MP_ENET1_MAC_1588_IRQ = 121,
 
     FSL_IMX8MP_PCI_INTA_IRQ = 126,
     FSL_IMX8MP_PCI_INTB_IRQ = 125,
diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c
index 37934d2951..90c1673461 100644
--- a/hw/arm/fsl-imx8mm.c
+++ b/hw/arm/fsl-imx8mm.c
@@ -590,7 +590,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 0,
                        qdev_get_gpio_in(gicdev, FSL_IMX8MM_ENET1_MAC_IRQ));
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 1,
-                       qdev_get_gpio_in(gicdev, FSL_IMX6_ENET1_MAC_1588_IRQ));
+                       qdev_get_gpio_in(gicdev, FSL_IMX8MM_ENET1_MAC_1588_IRQ));
 
     /* SNVS */
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {
diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c
index f855378dff..fbc094b7db 100644
--- a/hw/arm/fsl-imx8mp.c
+++ b/hw/arm/fsl-imx8mp.c
@@ -620,7 +620,7 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 0,
                        qdev_get_gpio_in(gicdev, FSL_IMX8MP_ENET1_MAC_IRQ));
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 1,
-                       qdev_get_gpio_in(gicdev, FSL_IMX6_ENET1_MAC_1588_IRQ));
+                       qdev_get_gpio_in(gicdev, FSL_IMX8MP_ENET1_MAC_1588_IRQ));
 
     /* SNVS */
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {
-- 
2.55.0

[PATCH 35/42] hw/misc/imx6_src: Avoid casting from void *

[Bernhard Beschow]

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/misc/imx6_src.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/misc/imx6_src.c b/hw/misc/imx6_src.c
index 8d2c4175e4..5bc1318f9d 100644
--- a/hw/misc/imx6_src.c
+++ b/hw/misc/imx6_src.c
@@ -89,7 +89,7 @@ static void imx6_src_reset(DeviceState *dev)
 static uint64_t imx6_src_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value = 0;
-    IMX6SRCState *s = (IMX6SRCState *)opaque;
+    IMX6SRCState *s = opaque;
     uint32_t index = offset >> 2;
 
     if (index < SRC_MAX) {
@@ -150,7 +150,7 @@ static void imx6_defer_clear_reset_bit(int cpuid,
 static void imx6_src_write(void *opaque, hwaddr offset, uint64_t value,
                            unsigned size)
 {
-    IMX6SRCState *s = (IMX6SRCState *)opaque;
+    IMX6SRCState *s = opaque;
     uint32_t index = offset >> 2;
     unsigned long change_mask;
     unsigned long current_value = value;
-- 
2.55.0

Re: [PATCH 35/42] hw/misc/imx6_src: Avoid casting from void *

[Philippe Mathieu-Daudé]

On 21/9/26 23:47, Bernhard Beschow wrote:
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/misc/imx6_src.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 36/42] hw/char/imx_serial: Avoid casting from void *

[Bernhard Beschow]

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/char/imx_serial.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 8ac4efbb5e..8780678ea4 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -186,7 +186,7 @@ static void imx_serial_reset_at_boot(DeviceState *dev)
 static uint64_t imx_serial_read(void *opaque, hwaddr offset,
                                 unsigned size)
 {
-    IMXSerialState *s = (IMXSerialState *)opaque;
+    IMXSerialState *s = opaque;
     Chardev *chr = qemu_chr_fe_get_driver(&s->chr);
     uint32_t c, rx_used;
     uint8_t rxtl = s->ufcr & TL_MASK;
@@ -277,7 +277,7 @@ static uint64_t imx_serial_read(void *opaque, hwaddr offset,
 static void imx_serial_write(void *opaque, hwaddr offset,
                              uint64_t value, unsigned size)
 {
-    IMXSerialState *s = (IMXSerialState *)opaque;
+    IMXSerialState *s = opaque;
     g_autofree char *label = qemu_chr_fe_backend_name(&s->chr);
     unsigned char ch;
 
@@ -386,14 +386,14 @@ static void imx_serial_write(void *opaque, hwaddr offset,
 
 static int imx_can_receive(void *opaque)
 {
-    IMXSerialState *s = (IMXSerialState *)opaque;
+    IMXSerialState *s = opaque;
 
     return s->ucr2 & UCR2_RXEN ? fifo32_num_free(&s->rx_fifo) : 0;
 }
 
 static void imx_put_data(void *opaque, uint32_t value)
 {
-    IMXSerialState *s = (IMXSerialState *)opaque;
+    IMXSerialState *s = opaque;
     Chardev *chr = qemu_chr_fe_get_driver(&s->chr);
     uint8_t rxtl = s->ufcr & TL_MASK;
 
@@ -416,7 +416,7 @@ static void imx_put_data(void *opaque, uint32_t value)
 
 static void imx_receive(void *opaque, const uint8_t *buf, int size)
 {
-    IMXSerialState *s = (IMXSerialState *)opaque;
+    IMXSerialState *s = opaque;
 
     s->usr2 |= USR2_WAKE;
 
-- 
2.55.0

Re: [PATCH 36/42] hw/char/imx_serial: Avoid casting from void *

[Philippe Mathieu-Daudé]

On 21/9/26 23:47, Bernhard Beschow wrote:
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/char/imx_serial.c | 10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)

36-39:
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 37/42] hw/intc/imx_avic: Avoid casting from void *

[Bernhard Beschow]

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/intc/imx_avic.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c
index a3d71aba8e..d05c71fb39 100644
--- a/hw/intc/imx_avic.c
+++ b/hw/intc/imx_avic.c
@@ -89,7 +89,7 @@ static void imx_avic_update(IMXAVICState *s)
 
 static void imx_avic_set_irq(void *opaque, int irq, int level)
 {
-    IMXAVICState *s = (IMXAVICState *)opaque;
+    IMXAVICState *s = opaque;
 
     if (level) {
         DPRINTF("Raising IRQ %d, prio %d\n",
@@ -108,7 +108,7 @@ static void imx_avic_set_irq(void *opaque, int irq, int level)
 static uint64_t imx_avic_read(void *opaque,
                              hwaddr offset, unsigned size)
 {
-    IMXAVICState *s = (IMXAVICState *)opaque;
+    IMXAVICState *s = opaque;
 
     DPRINTF("read(offset = 0x%" HWADDR_PRIx ")\n", offset);
 
@@ -217,7 +217,7 @@ static uint64_t imx_avic_read(void *opaque,
 static void imx_avic_write(void *opaque, hwaddr offset,
                           uint64_t val, unsigned size)
 {
-    IMXAVICState *s = (IMXAVICState *)opaque;
+    IMXAVICState *s = opaque;
 
     /* Vector Registers not yet supported */
     if (offset >= 0x100 && offset <= 0x2fc) {
-- 
2.55.0

[PATCH 38/42] hw/misc/imx*_ccm: Avoid casting from void *

[Bernhard Beschow]

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/misc/imx25_ccm.c  | 4 ++--
 hw/misc/imx31_ccm.c  | 4 ++--
 hw/misc/imx6_ccm.c   | 8 ++++----
 hw/misc/imx6ul_ccm.c | 8 ++++----
 hw/misc/imx7_src.c   | 4 ++--
 5 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/hw/misc/imx25_ccm.c b/hw/misc/imx25_ccm.c
index a91b0be682..8fd2a329dd 100644
--- a/hw/misc/imx25_ccm.c
+++ b/hw/misc/imx25_ccm.c
@@ -217,7 +217,7 @@ static void imx25_ccm_reset(DeviceState *dev)
 static uint64_t imx25_ccm_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value = 0;
-    IMX25CCMState *s = (IMX25CCMState *)opaque;
+    IMX25CCMState *s = opaque;
 
     if (offset < 0x70) {
         value = s->reg[offset >> 2];
@@ -234,7 +234,7 @@ static uint64_t imx25_ccm_read(void *opaque, hwaddr offset, unsigned size)
 static void imx25_ccm_write(void *opaque, hwaddr offset, uint64_t value,
                             unsigned size)
 {
-    IMX25CCMState *s = (IMX25CCMState *)opaque;
+    IMX25CCMState *s = opaque;
 
     trace_imx25_ccm_write(imx25_ccm_reg_name(offset >> 2), value);
 
diff --git a/hw/misc/imx31_ccm.c b/hw/misc/imx31_ccm.c
index 8d620711dd..3cb9f44fab 100644
--- a/hw/misc/imx31_ccm.c
+++ b/hw/misc/imx31_ccm.c
@@ -222,7 +222,7 @@ static void imx31_ccm_reset(DeviceState *dev)
 static uint64_t imx31_ccm_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value = 0;
-    IMX31CCMState *s = (IMX31CCMState *)opaque;
+    IMX31CCMState *s = opaque;
 
     if ((offset >> 2) < IMX31_CCM_MAX_REG) {
         value = s->reg[offset >> 2];
@@ -239,7 +239,7 @@ static uint64_t imx31_ccm_read(void *opaque, hwaddr offset, unsigned size)
 static void imx31_ccm_write(void *opaque, hwaddr offset, uint64_t value,
                             unsigned size)
 {
-    IMX31CCMState *s = (IMX31CCMState *)opaque;
+    IMX31CCMState *s = opaque;
 
     trace_imx31_ccm_write(imx31_ccm_reg_name(offset >> 2), value);
 
diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index 45fdd0d5a8..4a40fe08ea 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -491,7 +491,7 @@ static uint64_t imx6_ccm_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value = 0;
     uint32_t index = offset >> 2;
-    IMX6CCMState *s = (IMX6CCMState *)opaque;
+    IMX6CCMState *s = opaque;
 
     value = s->ccm[index];
 
@@ -504,7 +504,7 @@ static void imx6_ccm_write(void *opaque, hwaddr offset, uint64_t value,
                            unsigned size)
 {
     uint32_t index = offset >> 2;
-    IMX6CCMState *s = (IMX6CCMState *)opaque;
+    IMX6CCMState *s = opaque;
 
     trace_imx6_ccm_write(imx6_ccm_reg_name(index), (uint32_t)value);
 
@@ -519,7 +519,7 @@ static uint64_t imx6_analog_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value;
     uint32_t index = offset >> 2;
-    IMX6CCMState *s = (IMX6CCMState *)opaque;
+    IMX6CCMState *s = opaque;
 
     switch (index) {
     case CCM_ANALOG_PLL_ARM_SET:
@@ -611,7 +611,7 @@ static void imx6_analog_write(void *opaque, hwaddr offset, uint64_t value,
                               unsigned size)
 {
     uint32_t index = offset >> 2;
-    IMX6CCMState *s = (IMX6CCMState *)opaque;
+    IMX6CCMState *s = opaque;
 
     trace_imx6_analog_write(imx6_analog_reg_name(index), (uint32_t)value);
 
diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c
index c4f6e372fe..f12ba6ebe2 100644
--- a/hw/misc/imx6ul_ccm.c
+++ b/hw/misc/imx6ul_ccm.c
@@ -625,7 +625,7 @@ static uint64_t imx6ul_ccm_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value = 0;
     uint32_t index = offset >> 2;
-    IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+    IMX6ULCCMState *s = opaque;
 
     assert(index < CCM_MAX);
 
@@ -640,7 +640,7 @@ static void imx6ul_ccm_write(void *opaque, hwaddr offset, uint64_t value,
                            unsigned size)
 {
     uint32_t index = offset >> 2;
-    IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+    IMX6ULCCMState *s = opaque;
 
     assert(index < CCM_MAX);
 
@@ -654,7 +654,7 @@ static uint64_t imx6ul_analog_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value;
     uint32_t index = offset >> 2;
-    IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+    IMX6ULCCMState *s = opaque;
 
     assert(index < CCM_ANALOG_MAX);
 
@@ -754,7 +754,7 @@ static void imx6ul_analog_write(void *opaque, hwaddr offset, uint64_t value,
                               unsigned size)
 {
     uint32_t index = offset >> 2;
-    IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+    IMX6ULCCMState *s = opaque;
 
     assert(index < CCM_ANALOG_MAX);
 
diff --git a/hw/misc/imx7_src.c b/hw/misc/imx7_src.c
index 77f13bd020..4a59e347c5 100644
--- a/hw/misc/imx7_src.c
+++ b/hw/misc/imx7_src.c
@@ -105,7 +105,7 @@ static void imx7_src_reset(DeviceState *dev)
 static uint64_t imx7_src_read(void *opaque, hwaddr offset, unsigned size)
 {
     uint32_t value = 0;
-    IMX7SRCState *s = (IMX7SRCState *)opaque;
+    IMX7SRCState *s = opaque;
     uint32_t index = offset >> 2;
 
     if (index < SRC_MAX) {
@@ -167,7 +167,7 @@ static void imx7_defer_clear_reset_bit(uint32_t cpuid,
 static void imx7_src_write(void *opaque, hwaddr offset, uint64_t value,
                            unsigned size)
 {
-    IMX7SRCState *s = (IMX7SRCState *)opaque;
+    IMX7SRCState *s = opaque;
     uint32_t index = offset >> 2;
     long unsigned int change_mask;
     uint32_t current_value = value;
-- 
2.55.0

[PATCH 39/42] hw/usb/imx-usb-phy: Avoid casting from void *

[Bernhard Beschow]

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/usb/imx-usb-phy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/usb/imx-usb-phy.c b/hw/usb/imx-usb-phy.c
index c25566d0fa..2b2913c387 100644
--- a/hw/usb/imx-usb-phy.c
+++ b/hw/usb/imx-usb-phy.c
@@ -49,7 +49,7 @@ static void imx_usbphy_reset(DeviceState *dev)
 
 static uint64_t imx_usbphy_read(void *opaque, hwaddr offset, unsigned size)
 {
-    IMXUSBPHYState *s = (IMXUSBPHYState *)opaque;
+    IMXUSBPHYState *s = opaque;
     uint32_t index = offset >> 2;
     uint32_t value;
 
@@ -108,7 +108,7 @@ static uint64_t imx_usbphy_read(void *opaque, hwaddr offset, unsigned size)
 static void imx_usbphy_write(void *opaque, hwaddr offset, uint64_t value,
                              unsigned size)
 {
-    IMXUSBPHYState *s = (IMXUSBPHYState *)opaque;
+    IMXUSBPHYState *s = opaque;
     uint32_t index = offset >> 2;
 
     switch (index) {
-- 
2.55.0

[PATCH 40/42] hw/net/imx_fec: Trace with QOM path where easily possible

[Bernhard Beschow]

Some i.MX SoCs have multiple i.MX network IP blocks. Allow to
distinguish them via their QOM path when tracing.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/net/imx_fec.c    | 28 +++++++++++++++-------------
 hw/net/trace-events | 24 ++++++++++++------------
 2 files changed, 27 insertions(+), 25 deletions(-)

diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index c177b7ff2b..fb8bcd52d2 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -248,7 +248,7 @@ static uint32_t imx_phy_read(IMXFECState *s, int reg)
         if (s->phy_consumer && phy == s->phy_consumer->phy_num) {
             s = s->phy_consumer;
         } else {
-            trace_imx_phy_read_num(phy, s->phy_num);
+            trace_imx_phy_read_num(DEVICE(s)->canonical_path, phy, s->phy_num);
             return 0xffff;
         }
     }
@@ -270,7 +270,7 @@ static void imx_phy_write(IMXFECState *s, int reg, uint32_t val)
         if (s->phy_consumer && phy == s->phy_consumer->phy_num) {
             s = s->phy_consumer;
         } else {
-            trace_imx_phy_write_num(phy, s->phy_num);
+            trace_imx_phy_write_num(DEVICE(s)->canonical_path, phy, s->phy_num);
             return;
         }
     }
@@ -364,7 +364,7 @@ static void imx_fec_do_tx(IMXFECState *s)
         if ((bd.flags & ENET_BD_R) == 0) {
 
             /* Run out of descriptors to transmit.  */
-            trace_imx_eth_tx_bd_busy();
+            trace_imx_eth_tx_bd_busy(DEVICE(s)->canonical_path);
 
             break;
         }
@@ -446,7 +446,7 @@ static void imx_enet_do_tx(IMXFECState *s, uint32_t index)
         if ((bd.flags & ENET_BD_R) == 0) {
             /* Run out of descriptors to transmit.  */
 
-            trace_imx_eth_tx_bd_busy();
+            trace_imx_eth_tx_bd_busy(DEVICE(s)->canonical_path);
 
             break;
         }
@@ -521,7 +521,7 @@ static void imx_eth_enable_rx(IMXFECState *s, bool flush)
     s->regs[ENET_RDAR] = (bd.flags & ENET_BD_E) ? ENET_RDAR_RDAR : 0;
 
     if (!s->regs[ENET_RDAR]) {
-        trace_imx_eth_rx_bd_full();
+        trace_imx_eth_rx_bd_full(DEVICE(s)->canonical_path);
     } else if (flush) {
         qemu_flush_queued_packets(qemu_get_queue(s->nic));
     }
@@ -659,7 +659,8 @@ static uint64_t imx_eth_read(void *opaque, hwaddr offset, unsigned size)
         break;
     }
 
-    trace_imx_eth_read(index, imx_eth_reg_name(s, index), value);
+    trace_imx_eth_read(DEVICE(s)->canonical_path, index,
+                       imx_eth_reg_name(s, index), value);
 
     return value;
 }
@@ -767,7 +768,8 @@ static void imx_eth_write(void *opaque, hwaddr offset, uint64_t value,
     const bool single_tx_ring = !imx_eth_is_multi_tx_ring(s);
     uint32_t index = offset >> 2;
 
-    trace_imx_eth_write(index, imx_eth_reg_name(s, index), value);
+    trace_imx_eth_write(DEVICE(s)->canonical_path, index,
+                        imx_eth_reg_name(s, index), value);
 
     switch (index) {
     case ENET_EIR:
@@ -951,7 +953,7 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
     unsigned int buf_len;
     size_t size = len;
 
-    trace_imx_fec_receive(size);
+    trace_imx_fec_receive(DEVICE(s)->canonical_path, size);
 
     if (!s->regs[ENET_RDAR]) {
         qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Unexpected packet\n",
@@ -993,7 +995,7 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
         bd.length = buf_len;
         size -= buf_len;
 
-        trace_imx_fec_receive_len(addr, bd.length);
+        trace_imx_fec_receive_len(DEVICE(s)->canonical_path, addr, bd.length);
 
         /* The last 4 bytes are the CRC.  */
         if (size < 4) {
@@ -1013,7 +1015,7 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
             /* Last buffer in frame.  */
             bd.flags |= flags | ENET_BD_L;
 
-            trace_imx_fec_receive_last(bd.flags);
+            trace_imx_fec_receive_last(DEVICE(s)->canonical_path, bd.flags);
 
             s->regs[ENET_EIR] |= ENET_INT_RXF;
         } else {
@@ -1047,7 +1049,7 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
     size_t size = len;
     bool shift16 = s->regs[ENET_RACC] & ENET_RACC_SHIFT16;
 
-    trace_imx_enet_receive(size);
+    trace_imx_enet_receive(DEVICE(s)->canonical_path, size);
 
     if (!s->regs[ENET_RDAR]) {
         qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Unexpected packet\n",
@@ -1093,7 +1095,7 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
         bd.length = buf_len;
         size -= buf_len;
 
-        trace_imx_enet_receive_len(addr, bd.length);
+        trace_imx_enet_receive_len(DEVICE(s)->canonical_path, addr, bd.length);
 
         /* The last 4 bytes are the CRC.  */
         if (size < 4) {
@@ -1131,7 +1133,7 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
             /* Last buffer in frame.  */
             bd.flags |= flags | ENET_BD_L;
 
-            trace_imx_enet_receive_last(bd.flags);
+            trace_imx_enet_receive_last(DEVICE(s)->canonical_path, bd.flags);
 
             /* Indicate that we've updated the last buffer descriptor. */
             bd.last_buffer = ENET_BD_BDU;
diff --git a/hw/net/trace-events b/hw/net/trace-events
index 001a20b0e2..81af808044 100644
--- a/hw/net/trace-events
+++ b/hw/net/trace-events
@@ -444,20 +444,20 @@ i82596_ca_init(uint32_t scb, uint8_t mode, uint32_t base) "CA: Init - SCB=0x%08x
 i82596_ioport_write(uint32_t addr, uint32_t val) "IO write addr=0x%08x val=0x%08x"
 
 # imx_fec.c
-imx_phy_read_num(int phy, int configured) "read request from unconfigured phy %d (configured %d)"
-imx_phy_write_num(int phy, int configured) "write request to unconfigured phy %d (configured %d)"
+imx_phy_read_num(const char *path, int phy, int configured) "%s: read request from unconfigured phy %d (configured %d)"
+imx_phy_write_num(const char *path, int phy, int configured) "%s: write request to unconfigured phy %d (configured %d)"
 imx_fec_read_bd(uint64_t addr, int flags, int len, int data) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x"
 imx_enet_read_bd(uint64_t addr, int flags, int len, int data, int options, int status) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x option 0x%04x status 0x%04x"
-imx_eth_tx_bd_busy(void) "tx_bd ran out of descriptors to transmit"
-imx_eth_rx_bd_full(void) "RX buffer is full"
-imx_eth_read(int reg, const char *reg_name, uint32_t value) "reg[%d:%s] => 0x%08"PRIx32
-imx_eth_write(int reg, const char *reg_name, uint64_t value) "reg[%d:%s] <= 0x%08"PRIx64
-imx_fec_receive(size_t size) "len %zu"
-imx_fec_receive_len(uint64_t addr, int len) "rx_bd 0x%"PRIx64" length %d"
-imx_fec_receive_last(int last) "rx frame flags 0x%04x"
-imx_enet_receive(size_t size) "len %zu"
-imx_enet_receive_len(uint64_t addr, int len) "rx_bd 0x%"PRIx64" length %d"
-imx_enet_receive_last(int last) "rx frame flags 0x%04x"
+imx_eth_tx_bd_busy(const char *path) "%s: tx_bd ran out of descriptors to transmit"
+imx_eth_rx_bd_full(const char *path) "%s: RX buffer is full"
+imx_eth_read(const char *path, int reg, const char *reg_name, uint32_t value) "%s: reg[%d:%s] => 0x%08"PRIx32
+imx_eth_write(const char *path, int reg, const char *reg_name, uint64_t value) "%s: reg[%d:%s] <= 0x%08"PRIx64
+imx_fec_receive(const char *path, size_t size) "%s: len %zu"
+imx_fec_receive_len(const char *path, uint64_t addr, int len) "%s: rx_bd 0x%"PRIx64" length %d"
+imx_fec_receive_last(const char *path, int last) "%s: rx frame flags 0x%04x"
+imx_enet_receive(const char *path, size_t size) "%s: len %zu"
+imx_enet_receive_len(const char *path, uint64_t addr, int len) "%s, rx_bd 0x%"PRIx64" length %d"
+imx_enet_receive_last(const char *path, int last) "%s: rx frame flags 0x%04x"
 
 # npcm7xx_emc.c
 npcm7xx_emc_reset(int emc_num) "Resetting emc%d"
-- 
2.55.0

Re: [PATCH 40/42] hw/net/imx_fec: Trace with QOM path where easily possible

[Philippe Mathieu-Daudé]

On 21/9/26 23:47, Bernhard Beschow wrote:
> Some i.MX SoCs have multiple i.MX network IP blocks. Allow to
> distinguish them via their QOM path when tracing.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/net/imx_fec.c    | 28 +++++++++++++++-------------
>   hw/net/trace-events | 24 ++++++++++++------------
>   2 files changed, 27 insertions(+), 25 deletions(-)

40-42:
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

[PATCH 41/42] hw/net/lan9118_phy: Trace with QOM path

[Bernhard Beschow]

Some i.MX SoCs have multiple i.MX network IP blocks which in QEMU use
the LAN9118 Phy. Allow to distinguish them via their QOM path when
tracing.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/net/lan9118_phy.c | 10 +++++-----
 hw/net/trace-events  |  9 +++++----
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/hw/net/lan9118_phy.c b/hw/net/lan9118_phy.c
index 2fc027d112..ee87a51241 100644
--- a/hw/net/lan9118_phy.c
+++ b/hw/net/lan9118_phy.c
@@ -85,14 +85,14 @@ uint16_t lan9118_phy_read(Lan9118PhyState *s, int reg)
         break;
     }
 
-    trace_lan9118_phy_read(val, reg);
+    trace_lan9118_phy_read(DEVICE(s)->canonical_path, val, reg);
 
     return val;
 }
 
 void lan9118_phy_write(Lan9118PhyState *s, int reg, uint16_t val)
 {
-    trace_lan9118_phy_write(val, reg);
+    trace_lan9118_phy_write(DEVICE(s)->canonical_path, val, reg);
 
     switch (reg) {
     case MII_BMCR:
@@ -138,11 +138,11 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down)
 
     /* Autonegotiation status mirrors link status. */
     if (link_down) {
-        trace_lan9118_phy_update_link("down");
+        trace_lan9118_phy_link_down(DEVICE(s)->canonical_path);
         s->status &= ~(MII_BMSR_AN_COMP | MII_BMSR_LINK_ST);
         s->ints |= PHY_INT_DOWN;
     } else {
-        trace_lan9118_phy_update_link("up");
+        trace_lan9118_phy_link_up(DEVICE(s)->canonical_path);
         s->status |= MII_BMSR_AN_COMP | MII_BMSR_LINK_ST;
         s->ints |= PHY_INT_ENERGYON;
         s->ints |= PHY_INT_AUTONEG_COMPLETE;
@@ -152,7 +152,7 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down)
 
 void lan9118_phy_reset(Lan9118PhyState *s)
 {
-    trace_lan9118_phy_reset();
+    trace_lan9118_phy_reset(DEVICE(s)->canonical_path);
 
     s->control = MII_BMCR_AUTOEN | MII_BMCR_SPEED100;
     s->status = MII_BMSR_100TX_FD
diff --git a/hw/net/trace-events b/hw/net/trace-events
index 81af808044..839a612d35 100644
--- a/hw/net/trace-events
+++ b/hw/net/trace-events
@@ -11,10 +11,11 @@ allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) "MMIO read: offset=0x%"
 allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64
 
 # lan9118_phy.c
-lan9118_phy_read(uint16_t val, int reg) "[0x%02x] -> 0x%04" PRIx16
-lan9118_phy_write(uint16_t val, int reg) "[0x%02x] <- 0x%04" PRIx16
-lan9118_phy_update_link(const char *s) "%s"
-lan9118_phy_reset(void) ""
+lan9118_phy_read(const char *path, uint16_t val, int reg) "%s: [0x%02x] -> 0x%04" PRIx16
+lan9118_phy_write(const char *path, uint16_t val, int reg) "%s: [0x%02x] <- 0x%04" PRIx16
+lan9118_phy_link_down(const char *path) "%s"
+lan9118_phy_link_up(const char *path) "%s"
+lan9118_phy_reset(const char *path) "%s"
 
 # lance.c
 lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x"
-- 
2.55.0

[PATCH 42/42] hw/watchdog/wdt_imx2: Trace with QOM path

[Bernhard Beschow]

SoCs such as the i.MX8M Plus have several of these watchdog devices.
Allow to distinguish the instances when tracing.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/watchdog/wdt_imx2.c   | 8 ++++----
 hw/watchdog/trace-events | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index c8ea704aa3..f5ba69ca7e 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -23,7 +23,7 @@ static void imx2_wdt_interrupt(void *opaque)
 {
     IMX2WdtState *s = IMX2_WDT(opaque);
 
-    trace_imx2_wdt_interrupt();
+    trace_imx2_wdt_interrupt(DEVICE(s)->canonical_path);
 
     s->wicr |= IMX2_WDT_WICR_WTIS;
     qemu_set_irq(s->irq, 1);
@@ -33,7 +33,7 @@ static void imx2_wdt_expired(void *opaque)
 {
     IMX2WdtState *s = IMX2_WDT(opaque);
 
-    trace_imx2_wdt_expired();
+    trace_imx2_wdt_expired(DEVICE(s)->canonical_path);
 
     s->wrsr = IMX2_WDT_WRSR_TOUT;
 
@@ -90,7 +90,7 @@ static uint64_t imx2_wdt_read(void *opaque, hwaddr addr, unsigned int size)
         break;
     }
 
-    trace_imx2_wdt_read(addr, value);
+    trace_imx2_wdt_read(DEVICE(s)->canonical_path, addr, value);
 
     return value;
 }
@@ -149,7 +149,7 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
 {
     IMX2WdtState *s = IMX2_WDT(opaque);
 
-    trace_imx2_wdt_write(addr, value);
+    trace_imx2_wdt_write(DEVICE(s)->canonical_path, addr, value);
 
     switch (addr) {
     case IMX2_WDT_WCR:
diff --git a/hw/watchdog/trace-events b/hw/watchdog/trace-events
index b388f7b250..5963943d5d 100644
--- a/hw/watchdog/trace-events
+++ b/hw/watchdog/trace-events
@@ -18,10 +18,10 @@ aspeed_wdt_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
 aspeed_wdt_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRIx64
 
 # wdt_imx2.c
-imx2_wdt_read(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] -> 0x%" PRIx16
-imx2_wdt_write(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] <- 0x%" PRIx16
-imx2_wdt_interrupt(void) ""
-imx2_wdt_expired(void) ""
+imx2_wdt_read(const char *qom_path, uint32_t addr, uint16_t data) "%s: [0x%" PRIx32 "] -> 0x%" PRIx16
+imx2_wdt_write(const char *qom_path, uint32_t addr, uint16_t data) "%s: [0x%" PRIx32 "] <- 0x%" PRIx16
+imx2_wdt_interrupt(const char *qom_path) "%s"
+imx2_wdt_expired(const char *qom_path) "%s"
 
 # spapr_watchdog.c
 spapr_watchdog_start(uint64_t flags, uint64_t num, uint64_t timeout) "Flags 0x%" PRIx64 " num=%" PRId64 " %" PRIu64 "ms"
-- 
2.55.0

Re: [PATCH 00/42] i.MX fixes and cleanup

[Philippe Mathieu-Daudé]

On 21/9/26 23:46, Bernhard Beschow wrote:

> Bernhard Beschow (42):
>    hw/watchdog/wdt_imx2: Fix handling of write-once WCR bits
>    hw/watchdog/wdt_imx2: Remove unused attributes
>    hw/arm/imx8mm-evk: Fix reference count of SoC object
>    hw/arm/mcimx7d-sabre: Ignore memory transaction failures
>    docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk
>      invocations
>    hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default
>    tests/functional/arm: Add console test for `sabrelite` machine
>    hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default
>    hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB of RAM by default
>    tests/functional/arm: Add console test for `mcimx7d-sabre` machine
>    hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE
>    hw/timer/imx_gpt: Wire clock control module via link property
>    hw/timer/imx_epit: Wire clock control module via link property
>    hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
>    hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
>    Kconfig: Extract config IMX_AVIC from config IMX
>    Kconfig: Extract config IMX_GPCV2 from config IMX
>    Kconfig: Extract config IMX_RNG from config IMX
>    Kconfig: Extract config FSL_IMX7_GPR from config IMX
>    Kconfig: Extract config FSL_IMX{6,7}_SRC from config IMX
>    Kconfig: Extract config FSL_IMX7_SNVS from config IMX
>    Kconfig: Extract dedicated config FSL_IMXx_CCM from config IMX
>    Kconfig: Extract config IMX_GPT from config IMX
>    Kconfig: Extract config IMX_EPIT from config IMX
>    Kconfig: Extract config GPIO_IMX from config IMX
>    Kconfig: Extract config IMX_SPI from config IMX
>    Kconfig: Extract config IMX_SERIAL from config IMX
>    Kconfig: Remove config IMX
>    hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
>    hw/arm/fsl-imx8m: Fix typo
>    hw/misc/imx6_src: Avoid casting from void *
>    hw/char/imx_serial: Avoid casting from void *
>    hw/intc/imx_avic: Avoid casting from void *
>    hw/misc/imx*_ccm: Avoid casting from void *
>    hw/usb/imx-usb-phy: Avoid casting from void *
>    hw/net/imx_fec: Trace with QOM path where easily possible
>    hw/net/lan9118_phy: Trace with QOM path
>    hw/watchdog/wdt_imx2: Trace with QOM path

If no objection I'm queuing the following trivial reviewed fixes
in my hw-misc tree to reduce the size of respin:

hw/watchdog/wdt_imx2: Trace with QOM path
hw/net/lan9118_phy: Trace with QOM path
hw/net/imx_fec: Trace with QOM path where easily possible
hw/usb/imx-usb-phy: Avoid casting from void *
hw/misc/imx*_ccm: Avoid casting from void *
hw/intc/imx_avic: Avoid casting from void *
hw/char/imx_serial: Avoid casting from void *
hw/misc/imx6_src: Avoid casting from void *
hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
hw/timer/imx_epit: Wire clock control module via link property
hw/timer/imx_gpt: Wire clock control module via link property

Re: [PATCH 00/42] i.MX fixes and cleanup

[Peter Maydell]

On Tue, 29 Sept 2026 at 13:39, Philippe Mathieu-Daudé
<philmd@oss.qualcomm.com> wrote:
>
> On 21/9/26 23:46, Bernhard Beschow wrote:
>
> > Bernhard Beschow (42):
> >    hw/watchdog/wdt_imx2: Fix handling of write-once WCR bits
> >    hw/watchdog/wdt_imx2: Remove unused attributes
> >    hw/arm/imx8mm-evk: Fix reference count of SoC object
> >    hw/arm/mcimx7d-sabre: Ignore memory transaction failures
> >    docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk
> >      invocations
> >    hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default
> >    tests/functional/arm: Add console test for `sabrelite` machine
> >    hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default
> >    hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB of RAM by default
> >    tests/functional/arm: Add console test for `mcimx7d-sabre` machine
> >    hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/timer/imx_gpt: Wire clock control module via link property
> >    hw/timer/imx_epit: Wire clock control module via link property
> >    hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
> >    hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
> >    Kconfig: Extract config IMX_AVIC from config IMX
> >    Kconfig: Extract config IMX_GPCV2 from config IMX
> >    Kconfig: Extract config IMX_RNG from config IMX
> >    Kconfig: Extract config FSL_IMX7_GPR from config IMX
> >    Kconfig: Extract config FSL_IMX{6,7}_SRC from config IMX
> >    Kconfig: Extract config FSL_IMX7_SNVS from config IMX
> >    Kconfig: Extract dedicated config FSL_IMXx_CCM from config IMX
> >    Kconfig: Extract config IMX_GPT from config IMX
> >    Kconfig: Extract config IMX_EPIT from config IMX
> >    Kconfig: Extract config GPIO_IMX from config IMX
> >    Kconfig: Extract config IMX_SPI from config IMX
> >    Kconfig: Extract config IMX_SERIAL from config IMX
> >    Kconfig: Remove config IMX
> >    hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
> >    hw/arm/fsl-imx8m: Fix typo
> >    hw/misc/imx6_src: Avoid casting from void *
> >    hw/char/imx_serial: Avoid casting from void *
> >    hw/intc/imx_avic: Avoid casting from void *
> >    hw/misc/imx*_ccm: Avoid casting from void *
> >    hw/usb/imx-usb-phy: Avoid casting from void *
> >    hw/net/imx_fec: Trace with QOM path where easily possible
> >    hw/net/lan9118_phy: Trace with QOM path
> >    hw/watchdog/wdt_imx2: Trace with QOM path
>
> If no objection I'm queuing the following trivial reviewed fixes
> in my hw-misc tree to reduce the size of respin:
>
> hw/watchdog/wdt_imx2: Trace with QOM path
> hw/net/lan9118_phy: Trace with QOM path
> hw/net/imx_fec: Trace with QOM path where easily possible
> hw/usb/imx-usb-phy: Avoid casting from void *
> hw/misc/imx*_ccm: Avoid casting from void *
> hw/intc/imx_avic: Avoid casting from void *
> hw/char/imx_serial: Avoid casting from void *
> hw/misc/imx6_src: Avoid casting from void *
> hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
> hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
> hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
> hw/timer/imx_epit: Wire clock control module via link property
> hw/timer/imx_gpt: Wire clock control module via link property

Fine with me -- I only reviewed the first few patches in
this series, but I think all the rest are good cleanups.

-- PMM

Re: [PATCH 00/42] i.MX fixes and cleanup

[Bernhard Beschow]

Am 29. September 2026 12:39:29 UTC schrieb "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>:
>On 21/9/26 23:46, Bernhard Beschow wrote:
>
>> Bernhard Beschow (42):
>>    hw/watchdog/wdt_imx2: Fix handling of write-once WCR bits
>>    hw/watchdog/wdt_imx2: Remove unused attributes
>>    hw/arm/imx8mm-evk: Fix reference count of SoC object
>>    hw/arm/mcimx7d-sabre: Ignore memory transaction failures
>>    docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk
>>      invocations
>>    hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default
>>    tests/functional/arm: Add console test for `sabrelite` machine
>>    hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default
>>    hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB of RAM by default
>>    tests/functional/arm: Add console test for `mcimx7d-sabre` machine
>>    hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
>>    hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
>>    hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
>>    hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
>>    hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE
>>    hw/timer/imx_gpt: Wire clock control module via link property
>>    hw/timer/imx_epit: Wire clock control module via link property
>>    hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
>>    hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
>>    Kconfig: Extract config IMX_AVIC from config IMX
>>    Kconfig: Extract config IMX_GPCV2 from config IMX
>>    Kconfig: Extract config IMX_RNG from config IMX
>>    Kconfig: Extract config FSL_IMX7_GPR from config IMX
>>    Kconfig: Extract config FSL_IMX{6,7}_SRC from config IMX
>>    Kconfig: Extract config FSL_IMX7_SNVS from config IMX
>>    Kconfig: Extract dedicated config FSL_IMXx_CCM from config IMX
>>    Kconfig: Extract config IMX_GPT from config IMX
>>    Kconfig: Extract config IMX_EPIT from config IMX
>>    Kconfig: Extract config GPIO_IMX from config IMX
>>    Kconfig: Extract config IMX_SPI from config IMX
>>    Kconfig: Extract config IMX_SERIAL from config IMX
>>    Kconfig: Remove config IMX
>>    hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
>>    hw/arm/fsl-imx8m: Fix typo
>>    hw/misc/imx6_src: Avoid casting from void *
>>    hw/char/imx_serial: Avoid casting from void *
>>    hw/intc/imx_avic: Avoid casting from void *
>>    hw/misc/imx*_ccm: Avoid casting from void *
>>    hw/usb/imx-usb-phy: Avoid casting from void *
>>    hw/net/imx_fec: Trace with QOM path where easily possible
>>    hw/net/lan9118_phy: Trace with QOM path
>>    hw/watchdog/wdt_imx2: Trace with QOM path
>
>If no objection I'm queuing the following trivial reviewed fixes
>in my hw-misc tree to reduce the size of respin:

Thanks, Phil!

>
>hw/watchdog/wdt_imx2: Trace with QOM path
>hw/net/lan9118_phy: Trace with QOM path
>hw/net/imx_fec: Trace with QOM path where easily possible
>hw/usb/imx-usb-phy: Avoid casting from void *
>hw/misc/imx*_ccm: Avoid casting from void *
>hw/intc/imx_avic: Avoid casting from void *
>hw/char/imx_serial: Avoid casting from void *
>hw/misc/imx6_src: Avoid casting from void *
>hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency

>hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX

I needed to preserve this patch in v2. Otherwise, CONFIG_IMX wasn't empty and could not be removed.

Best regards,
Bernhard

>hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
>hw/timer/imx_epit: Wire clock control module via link property
>hw/timer/imx_gpt: Wire clock control module via link property
>

SysBus reset and heterogeneous emulation

[Philippe Mathieu-Daudé]

Hi,

On 21/9/26 23:46, Bernhard Beschow wrote:

> Patches 11-15 turn the remaining i.MX SoC device models into SySBus devices
> which fixes their reset behavior.

> Bernhard Beschow (42):

>    hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
>    hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE

These patches are described as:

   ```
   Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be
   reset upon machine reset.
   ```

This is correct for the current state of the codebase. However
I'm foreseeing a problem in heterogeneous context, having 2
SoCs (like some Aspeed boards), if one SoC is locally reset
(i.e. a software reset), then sysbus will also reset objects of the
other SoC, which is unlikely expecting that.

CpuCluster are not impacted because CPU types are not sysbus
based.

Sysbus API was designed for centralized memory bus and
non-heterogenous machine. It is good enough for whole-machine
reset but does not adapt to per-SoC reset domain.

Heterogeneous machines can not reset the default sysbus or use
the current qemu_system_reset().

Not sure where to go from that. Current sysbus eases reset tree.
For heterogeneous machines, should we convert to non-qbus
resettable soc-owned subtree? This is partly what we should do
with CPU clusters.

I might start documenting the current reset scope. Last comments
on this topic are Peter's review on vIOMMU saying the three-phase
model is "not very solidly nailed down" :)
https://lore.kernel.org/qemu-devel/CAFEAcA9ETg2+Xa+e3quJhGG3KsNuH+DW3puuWaJi-q1psUdw6A@mail.gmail.com/

Re: SysBus reset and heterogeneous emulation

[Peter Maydell]

On Mon, 5 Oct 2026 at 15:35, Philippe Mathieu-Daudé
<philmd@oss.qualcomm.com> wrote:
>
> Hi,
>
> On 21/9/26 23:46, Bernhard Beschow wrote:
>
> > Patches 11-15 turn the remaining i.MX SoC device models into SySBus devices
> > which fixes their reset behavior.
>
> > Bernhard Beschow (42):
>
> >    hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
> >    hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE
>
> These patches are described as:
>
>    ```
>    Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be
>    reset upon machine reset.
>    ```
>
> This is correct for the current state of the codebase.

Yes, and I think that until/unless we sort out where we want
to go and can merge TYPE_SYS_BUS_DEVICE's features into the
base TYPE_DEVICE then we're better off having devices and SoCs
inherit from TYPE_SYS_BUS_DEVICE than from TYPE_DEVICE.

> However
> I'm foreseeing a problem in heterogeneous context, having 2
> SoCs (like some Aspeed boards), if one SoC is locally reset
> (i.e. a software reset), then sysbus will also reset objects of the
> other SoC, which is unlikely expecting that.
>
> CpuCluster are not impacted because CPU types are not sysbus
> based.
>
> Sysbus API was designed for centralized memory bus and
> non-heterogenous machine. It is good enough for whole-machine
> reset but does not adapt to per-SoC reset domain.

Yes. Even in the heterogenous context, if the only thing
guests in practice do is "reset the whole machine" it will
continue to probably be good-enough. If guests want to be
able to do "the BMC CPU resets the application-processor SoC"
then this is one of the things we'll need to fix.

Ideally our reset API would both (a) allow you to model an
SoC's reset handling correctly, whatever it was and (b) default
to something that is at least vaguely sensible behaviour
if you don't write any reset-related code. (That is, I would
hope we can avoid "every SoC object has to write extra boilerplate
to handle reset of its child devices, and if you forget it then
reset silently doesn't work right".) Figuring out how we get
from where we are now to where we want to be without breaking
all the existing machines is then the second half of the problem...

thanks
-- PMM