Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [CI v13 10/17] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
Date: Wed, 28 Nov 2018 12:26:21 -0800	[thread overview]
Message-ID: <20181128202628.20238-10-manasi.d.navare@intel.com> (raw)
In-Reply-To: <20181128202628.20238-1-manasi.d.navare@intel.com>

DSC PPS secondary data packet infoframes are filled with
DSC picure parameter set metadata according to the DSC standard.
These infoframes are sent to the sink device and used during DSC
decoding.

v3:
* Rename to intel_dp_write_pps_sdp (Ville)
* Use const intel_crtc_state (Ville)
v2:
* Rebase ond drm-tip

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_vdsc.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915/intel_vdsc.c
index a76e77a3231b..56290093d43f 100644
--- a/drivers/gpu/drm/i915/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/intel_vdsc.c
@@ -976,6 +976,25 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
 	}
 }
 
+static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
+				       const struct intel_crtc_state *crtc_state)
+{
+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg;
+	struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;
+
+	/* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */
+	drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp);
+
+	/* Fill the PPS payload bytes as per DSC spec 1.2 Table 4-1 */
+	drm_dsc_pps_infoframe_pack(&dp_dsc_pps_sdp, vdsc_cfg);
+
+	intel_dig_port->write_infoframe(encoder, crtc_state,
+					DP_SDP_PPS, &dp_dsc_pps_sdp,
+					sizeof(dp_dsc_pps_sdp));
+}
+
 void intel_dsc_enable(struct intel_encoder *encoder,
 		      const struct intel_crtc_state *crtc_state)
 {
@@ -983,4 +1002,6 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 		return;
 
 	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
+
+	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
 }
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-11-28 20:23 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-28 20:26 [CI v13 01/17] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-11-28 20:26 ` [CI v13 02/17] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-11-28 21:36   ` [PATCH v14 " Manasi Navare
2018-11-28 20:26 ` [CI v13 03/17] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-11-28 20:26 ` [CI v13 04/17] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-11-29 19:38   ` [CI v15 " Manasi Navare
2018-11-28 20:26 ` [CI v13 05/17] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-11-28 20:26 ` [CI v13 06/17] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-11-28 20:26 ` [CI v13 07/17] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-11-28 20:26 ` [CI v13 08/17] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-11-28 20:26 ` [CI v13 09/17] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-11-28 20:26 ` Manasi Navare [this message]
2018-11-28 20:26 ` [CI v13 11/17] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-11-28 20:26 ` [CI v13 12/17] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-11-28 20:26 ` [CI v13 13/17] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-11-28 20:26 ` [CI v13 14/17] i915/dp/fec: Add fec_enable to the crtc state Manasi Navare
2018-11-28 20:26 ` [CI v13 15/17] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION Manasi Navare
2018-11-28 20:26 ` [CI v13 16/17] i915/dp/fec: Configure the Forward Error Correction bits Manasi Navare
2018-11-28 20:26 ` [CI v13 17/17] drm/i915/fec: Disable FEC state Manasi Navare
2018-11-28 21:01 ` ✗ Fi.CI.BAT: failure for series starting with [CI,v13,01/17] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Patchwork
2018-11-28 22:59 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,v13,01/17] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state (rev2) Patchwork
2018-11-28 23:06 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-28 23:15 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-29 10:29 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-29 19:50 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,v13,01/17] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state (rev3) Patchwork
2018-11-29 19:56 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-29 20:08 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-29 20:52 ` [CI v13 01/17] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-11-30 12:52 ` ✗ Fi.CI.IGT: failure for series starting with [CI,v13,01/17] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state (rev3) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181128202628.20238-10-manasi.d.navare@intel.com \
    --to=manasi.d.navare@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox