From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 00/19] drm/i915: Load LUTs with DSB
Date: Tue, 6 Jun 2023 22:14:45 +0300 [thread overview]
Message-ID: <20230606191504.18099-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Another attempt at re-enabling DSB based LUT loads.
The main change from the last attempt is that we now
use the DSB's DEwake mechanism to combat PkgC latency
which was causing the LUT to not always load correctly
(due to the anti-collision logic not working correctly
for DSB LUT accesses).
I also got the non-posted writes working correctly
which lets us load the legacy LUT without the
"write each entry twice" trick I used previously.
Ville Syrjälä (19):
drm/i915: Constify LUT entries in checker
drm/i915/dsb: Use non-locked register access
drm/i915/dsb: Dump the DSB command buffer when DSB fails
drm/i915/dsb: Define more DSB bits
drm/i915/dsb: Define the contents of some intstructions bit better
drm/i915/dsb: Avoid corrupting the first register write
drm/i915/dsb: Don't use indexed writes when byte enables are not all
set
drm/i915/dsb: Introduce intel_dsb_noop()
drm/i915/dsb: Introduce intel_dsb_reg_write_masked()
drm/i915/dsb: Add support for non-posted DSB registers writes
drm/i915/dsb: Don't use DSB to load the LUTs during full modeset
drm/i915/dsb: Load LUTs using the DSB during vblank
drm/i915/dsb: Use non-posted register writes for legacy LUT
drm/i915/dsb: Evade transcoder undelayed vblank when using DSB
drm/i915: Introduce skl_watermark_max_latency()
drm/i915: Introudce intel_crtc_scanline_to_hw()
drm/i915/dsb: Use DEwake to combat PkgC latency
drm/i915/dsb: Re-instate DSB for LUT updates
drm/i915: Do state check for color management changes
drivers/gpu/drm/i915/display/intel_color.c | 58 +++--
drivers/gpu/drm/i915/display/intel_color.h | 2 +
drivers/gpu/drm/i915/display/intel_crtc.c | 10 +-
drivers/gpu/drm/i915/display/intel_display.c | 3 +
drivers/gpu/drm/i915/display/intel_dsb.c | 217 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dsb.h | 9 +-
drivers/gpu/drm/i915/display/intel_dsb_regs.h | 31 +++
.../drm/i915/display/intel_modeset_verify.c | 2 +
drivers/gpu/drm/i915/display/intel_vblank.c | 14 ++
drivers/gpu/drm/i915/display/intel_vblank.h | 1 +
drivers/gpu/drm/i915/display/skl_watermark.c | 14 ++
drivers/gpu/drm/i915/display/skl_watermark.h | 2 +
12 files changed, 317 insertions(+), 46 deletions(-)
--
2.39.3
next reply other threads:[~2023-06-06 19:15 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 19:14 Ville Syrjala [this message]
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 01/19] drm/i915: Constify LUT entries in checker Ville Syrjala
2023-07-05 9:43 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 02/19] drm/i915/dsb: Use non-locked register access Ville Syrjala
2023-06-08 11:46 ` Jani Nikula
2023-09-11 20:22 ` Shankar, Uma
2023-09-12 7:37 ` Jani Nikula
2023-09-12 7:49 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 03/19] drm/i915/dsb: Dump the DSB command buffer when DSB fails Ville Syrjala
2023-07-11 4:55 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 04/19] drm/i915/dsb: Define more DSB bits Ville Syrjala
2023-09-11 20:32 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 05/19] drm/i915/dsb: Define the contents of some intstructions bit better Ville Syrjala
2023-09-11 20:50 ` Shankar, Uma
2023-09-27 15:38 ` Ville Syrjälä
2023-09-27 16:16 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 06/19] drm/i915/dsb: Avoid corrupting the first register write Ville Syrjala
2023-07-05 9:39 ` Manna, Animesh
2023-07-05 9:46 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 07/19] drm/i915/dsb: Don't use indexed writes when byte enables are not all set Ville Syrjala
2023-07-11 5:00 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 08/19] drm/i915/dsb: Introduce intel_dsb_noop() Ville Syrjala
2023-09-11 20:52 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 09/19] drm/i915/dsb: Introduce intel_dsb_reg_write_masked() Ville Syrjala
2023-09-11 20:55 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 10/19] drm/i915/dsb: Add support for non-posted DSB registers writes Ville Syrjala
2023-07-11 5:43 ` Manna, Animesh
2023-09-11 21:04 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 11/19] drm/i915/dsb: Don't use DSB to load the LUTs during full modeset Ville Syrjala
2023-09-11 21:09 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 12/19] drm/i915/dsb: Load LUTs using the DSB during vblank Ville Syrjala
2023-09-13 16:24 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 13/19] drm/i915/dsb: Use non-posted register writes for legacy LUT Ville Syrjala
2023-09-13 17:02 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 14/19] drm/i915/dsb: Evade transcoder undelayed vblank when using DSB Ville Syrjala
2023-09-13 17:13 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 15/19] drm/i915: Introduce skl_watermark_max_latency() Ville Syrjala
2023-09-13 17:25 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 16/19] drm/i915: Introudce intel_crtc_scanline_to_hw() Ville Syrjala
2023-09-13 17:37 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 17/19] drm/i915/dsb: Use DEwake to combat PkgC latency Ville Syrjala
2023-09-13 18:08 ` Shankar, Uma
2023-09-27 15:51 ` Ville Syrjälä
2023-09-27 16:11 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 18/19] drm/i915/dsb: Re-instate DSB for LUT updates Ville Syrjala
2023-09-13 18:09 ` Shankar, Uma
2025-01-13 19:26 ` Ed Maste
2025-01-17 14:51 ` Ville Syrjälä
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 19/19] drm/i915: Do state check for color management changes Ville Syrjala
2023-06-06 22:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Load LUTs with DSB (rev2) Patchwork
2023-06-06 22:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-06-06 22:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-06-07 14:02 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-27 16:05 ` [Intel-gfx] [PATCH v2 00/19] drm/i915: Load LUTs with DSB Ville Syrjälä
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