From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ed Maste <emaste@freebsd.org>
Cc: "Shankar, Uma" <uma.shankar@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 18/19] drm/i915/dsb: Re-instate DSB for LUT updates
Date: Fri, 17 Jan 2025 16:51:27 +0200 [thread overview]
Message-ID: <Z4pubxKiwBeHsiLJ@intel.com> (raw)
In-Reply-To: <CAPyFy2CPyspxOK5H5TqnYZWuD_zXy4rz_e212eJG6Jt=DxiRzw@mail.gmail.com>
On Mon, Jan 13, 2025 at 02:26:21PM -0500, Ed Maste wrote:
> On Wed, 13 Sept 2023 at 14:11, Shankar, Uma <uma.shankar@intel.com> wrote:
> >
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > With all the known issues sorted out we can start to use DSB to load the LUTs.
>
> On FreeBSD with a port of the i915 driver from Linux kernel 6.7
> (https://github.com/freebsd/drm-kmod/pull/332) we still encounter the
> issue addressed by the workaround. I see a few commits following this
> one that look like they may be related to this issue -- do you know if
> there are required DSB fixes following this change?
You want at least
commit 41429d9b6836 ("drm/i915/dsb: Fix DSB vblank waits when using VRR")
commit 2504a316b35d ("drm/i915/color: Stop using non-posted DSB writes for legacy LUT")
commit ecba559a88ab ("drm/i915/dsb: Don't use indexed register writes needlessly")
but no idea if those backport cleanly to such an ancient baseline.
>
> We are of course continuing to move forward and will presumably bring
> in fixes (if any) in due course, but if this was not yet reliable as
> of Linux 6.7 we'll just keep the workaround in the meantime.
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2025-01-17 14:51 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 19:14 [Intel-gfx] [PATCH v2 00/19] drm/i915: Load LUTs with DSB Ville Syrjala
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 01/19] drm/i915: Constify LUT entries in checker Ville Syrjala
2023-07-05 9:43 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 02/19] drm/i915/dsb: Use non-locked register access Ville Syrjala
2023-06-08 11:46 ` Jani Nikula
2023-09-11 20:22 ` Shankar, Uma
2023-09-12 7:37 ` Jani Nikula
2023-09-12 7:49 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 03/19] drm/i915/dsb: Dump the DSB command buffer when DSB fails Ville Syrjala
2023-07-11 4:55 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 04/19] drm/i915/dsb: Define more DSB bits Ville Syrjala
2023-09-11 20:32 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 05/19] drm/i915/dsb: Define the contents of some intstructions bit better Ville Syrjala
2023-09-11 20:50 ` Shankar, Uma
2023-09-27 15:38 ` Ville Syrjälä
2023-09-27 16:16 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 06/19] drm/i915/dsb: Avoid corrupting the first register write Ville Syrjala
2023-07-05 9:39 ` Manna, Animesh
2023-07-05 9:46 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 07/19] drm/i915/dsb: Don't use indexed writes when byte enables are not all set Ville Syrjala
2023-07-11 5:00 ` Manna, Animesh
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 08/19] drm/i915/dsb: Introduce intel_dsb_noop() Ville Syrjala
2023-09-11 20:52 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 09/19] drm/i915/dsb: Introduce intel_dsb_reg_write_masked() Ville Syrjala
2023-09-11 20:55 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 10/19] drm/i915/dsb: Add support for non-posted DSB registers writes Ville Syrjala
2023-07-11 5:43 ` Manna, Animesh
2023-09-11 21:04 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 11/19] drm/i915/dsb: Don't use DSB to load the LUTs during full modeset Ville Syrjala
2023-09-11 21:09 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 12/19] drm/i915/dsb: Load LUTs using the DSB during vblank Ville Syrjala
2023-09-13 16:24 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 13/19] drm/i915/dsb: Use non-posted register writes for legacy LUT Ville Syrjala
2023-09-13 17:02 ` Shankar, Uma
2023-06-06 19:14 ` [Intel-gfx] [PATCH v2 14/19] drm/i915/dsb: Evade transcoder undelayed vblank when using DSB Ville Syrjala
2023-09-13 17:13 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 15/19] drm/i915: Introduce skl_watermark_max_latency() Ville Syrjala
2023-09-13 17:25 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 16/19] drm/i915: Introudce intel_crtc_scanline_to_hw() Ville Syrjala
2023-09-13 17:37 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 17/19] drm/i915/dsb: Use DEwake to combat PkgC latency Ville Syrjala
2023-09-13 18:08 ` Shankar, Uma
2023-09-27 15:51 ` Ville Syrjälä
2023-09-27 16:11 ` Shankar, Uma
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 18/19] drm/i915/dsb: Re-instate DSB for LUT updates Ville Syrjala
2023-09-13 18:09 ` Shankar, Uma
2025-01-13 19:26 ` Ed Maste
2025-01-17 14:51 ` Ville Syrjälä [this message]
2023-06-06 19:15 ` [Intel-gfx] [PATCH v2 19/19] drm/i915: Do state check for color management changes Ville Syrjala
2023-06-06 22:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Load LUTs with DSB (rev2) Patchwork
2023-06-06 22:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-06-06 22:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-06-07 14:02 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-27 16:05 ` [Intel-gfx] [PATCH v2 00/19] drm/i915: Load LUTs with DSB Ville Syrjälä
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