From: "Srivatsa, Anusha" <anusha.srivatsa@intel.com>
To: "Roper, Matthew D" <matthew.d.roper@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v3 28/48] drm/i915: Move intel_modeset_all_pipes()
Date: Wed, 12 May 2021 17:03:32 +0000 [thread overview]
Message-ID: <a7b01aa783ce40b4bbdba84d52cf18e3@intel.com> (raw)
In-Reply-To: <20210508022820.780227-29-matthew.d.roper@intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Matt
> Roper
> Sent: Friday, May 7, 2021 7:28 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 28/48] drm/i915: Move
> intel_modeset_all_pipes()
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move intel_modeset_all_pipes() to a central place so that we can use it
> elsewhere as well. No functional changes.
>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 38 --------------------
> drivers/gpu/drm/i915/display/intel_display.c | 38 ++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_display.h | 1 +
> 3 files changed, 39 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index d40126061038..c9f1484f3811 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -2375,44 +2375,6 @@ static int bxt_modeset_calc_cdclk(struct
> intel_cdclk_state *cdclk_state)
> return 0;
> }
>
> -static int intel_modeset_all_pipes(struct intel_atomic_state *state) -{
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - struct intel_crtc *crtc;
> -
> - /*
> - * Add all pipes to the state, and force
> - * a modeset on all the active ones.
> - */
> - for_each_intel_crtc(&dev_priv->drm, crtc) {
> - struct intel_crtc_state *crtc_state;
> - int ret;
> -
> - crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> - if (IS_ERR(crtc_state))
> - return PTR_ERR(crtc_state);
> -
> - if (!crtc_state->hw.active ||
> - drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
> - continue;
> -
> - crtc_state->uapi.mode_changed = true;
> -
> - ret = drm_atomic_add_affected_connectors(&state->base,
> - &crtc->base);
> - if (ret)
> - return ret;
> -
> - ret = intel_atomic_add_affected_planes(state, crtc);
> - if (ret)
> - return ret;
> -
> - crtc_state->update_planes |= crtc_state->active_planes;
> - }
> -
> - return 0;
> -}
> -
> static int fixed_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state) {
> int min_cdclk;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index fa57c301f96a..611ff1d9a482 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9064,6 +9064,44 @@ intel_modeset_verify_disabled(struct
> drm_i915_private *dev_priv,
> verify_disabled_dpll_state(dev_priv);
> }
>
> +int intel_modeset_all_pipes(struct intel_atomic_state *state) {
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + struct intel_crtc *crtc;
> +
> + /*
> + * Add all pipes to the state, and force
> + * a modeset on all the active ones.
> + */
> + for_each_intel_crtc(&dev_priv->drm, crtc) {
> + struct intel_crtc_state *crtc_state;
> + int ret;
> +
> + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> + if (IS_ERR(crtc_state))
> + return PTR_ERR(crtc_state);
> +
> + if (!crtc_state->hw.active ||
> + drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
> + continue;
> +
> + crtc_state->uapi.mode_changed = true;
> +
> + ret = drm_atomic_add_affected_connectors(&state->base,
> + &crtc->base);
> + if (ret)
> + return ret;
> +
> + ret = intel_atomic_add_affected_planes(state, crtc);
> + if (ret)
> + return ret;
> +
> + crtc_state->update_planes |= crtc_state->active_planes;
> + }
> +
> + return 0;
> +}
> +
> static void
> intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state) {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index bd69affc791c..c9dbaf074d77 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -646,6 +646,7 @@ void intel_modeset_driver_remove_noirq(struct
> drm_i915_private *i915); void intel_modeset_driver_remove_nogem(struct
> drm_i915_private *i915); void intel_display_resume(struct drm_device
> *dev); void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
> +int intel_modeset_all_pipes(struct intel_atomic_state *state);
>
> /* modesetting asserts */
> void assert_panel_unlocked(struct drm_i915_private *dev_priv,
> --
> 2.25.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-12 17:03 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-08 2:27 [Intel-gfx] [PATCH v3 00/48] Alder Lake-P Support Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 01/48] drm/i915/xelpd: Handle proper AUX interrupt bits Matt Roper
2021-05-12 21:37 ` Lucas De Marchi
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 02/48] drm/i915/xelpd: Enhanced pipe underrun reporting Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 03/48] drm/i915/xelpd: Define plane capabilities Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 04/48] drm/i915/xelpd: Handle new location of outputs D and E Matt Roper
2021-05-14 13:52 ` Imre Deak
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 05/48] drm/i915/xelpd: Add XE_LPD power wells Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 06/48] drm/i915/xelpd: Increase maximum watermark lines to 255 Matt Roper
2021-05-12 17:56 ` Srivatsa, Anusha
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 07/48] drm/i915/xelpd: Required bandwidth increases when VT-d is active Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 08/48] drm/i915/xelpd: Add Wa_14011503030 Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 09/48] drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp Matt Roper
2021-05-12 18:11 ` Srivatsa, Anusha
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 10/48] drm/i915/xelpd: Support DP1.4 compression BPPs Matt Roper
2021-05-13 19:18 ` Navare, Manasi
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 11/48] drm/i915: Get slice height before computing rc params Matt Roper
2021-05-13 19:20 ` Navare, Manasi
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 12/48] drm/i915/xelpd: Calculate VDSC RC parameters Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 13/48] drm/i915/xelpd: Add rc_qp_table for rcparams calculation Matt Roper
2021-05-08 2:52 ` [Intel-gfx] [PATCH v3.1 " Matt Roper
2021-05-12 22:28 ` Lucas De Marchi
2021-05-08 9:10 ` [Intel-gfx] [PATCH v3 " kernel test robot
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 14/48] drm/i915/xelpd: Add VRR guardband for VRR CTL Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 15/48] drm/i915/xelpd: Provide port/phy mapping for vbt Matt Roper
2021-05-12 19:21 ` Srivatsa, Anusha
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 16/48] drm/i915/adl_p: Add PCH support Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 17/48] drm/i915/adl_p: Add dedicated SAGV watermarks Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 18/48] drm/i915/adl_p: Extend PLANE_WM bits for blocks & lines Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 19/48] drm/i915/adl_p: Setup ports/phys Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 20/48] drm/i915/adl_p: Add cdclk support for ADL-P Matt Roper
2021-05-14 9:06 ` Kahola, Mika
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 21/48] drm/i915/display/tc: Rename safe_mode functions ownership Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 22/48] drm/i915/adl_p: Handle TC cold Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 23/48] drm/i915/adl_p: Implement TC sequences Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 24/48] drm/i915/adl_p: Enable modular fia Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 25/48] drm/i915/adl_p: Don't config MBUS and DBUF during display initialization Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 26/48] drm/i915/adl_p: Add ddb allocation support Matt Roper
2021-05-08 2:27 ` [Intel-gfx] [PATCH v3 27/48] drm/i915: Introduce MBUS relative dbuf offsets Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 28/48] drm/i915: Move intel_modeset_all_pipes() Matt Roper
2021-05-12 17:03 ` Srivatsa, Anusha [this message]
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 29/48] drm/i915/adl_p: MBUS programming Matt Roper
2021-05-14 10:09 ` Lisovskiy, Stanislav
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 30/48] drm/i915/adl_p: Tx escape clock with DSI Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 31/48] drm/i915/display: Replace dc3co_enabled with dc3co_exitline on intel_psr struct Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 32/48] drm/i915/display: Remove a redundant function argument from intel_psr_enable_source() Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 33/48] drm/i915/display: Add PSR interrupt error check function Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 34/48] drm/i915/display: Introduce new intel_psr_pause/resume function Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 35/48] drm/i915/adl_p: Define and use ADL-P specific DP translation tables Matt Roper
2021-05-12 19:49 ` Srivatsa, Anusha
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 36/48] drm/i915/adl_p: Enable/disable loadgen sharing Matt Roper
2021-05-12 23:07 ` Srivatsa, Anusha
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 37/48] drm/i915/adl_p: Add PLL Support Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 38/48] drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 39/48] drm/i915/bigjoiner: Mode validation with uncompressed pipe joiner Matt Roper
2021-05-12 22:11 ` Srivatsa, Anusha
2021-05-13 19:09 ` Navare, Manasi
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 40/48] drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed bigjoiner Matt Roper
2021-05-13 19:12 ` Navare, Manasi
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 41/48] drm/i915/bigjoiner: atomic commit changes for uncompressed joiner Matt Roper
2021-05-13 19:17 ` Navare, Manasi
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 42/48] drm/i915/adlp: Add PIPE_MISC2 programming Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 43/48] drm/i915/adl_p: Update memory bandwidth parameters Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 44/48] drm/i915/adl_p: Add IPs stepping mapping Matt Roper
2021-05-12 22:35 ` Srivatsa, Anusha
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 45/48] drm/i915/adl_p: Implement Wa_22011091694 Matt Roper
2021-05-14 9:35 ` Kahola, Mika
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 46/48] drm/i915/display/adl_p: Implement Wa_22011320316 Matt Roper
2021-05-14 11:11 ` Kahola, Mika
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 47/48] drm/i915/adl_p: Disable CCS on a-step (Wa_22011186057) Matt Roper
2021-05-08 2:28 ` [Intel-gfx] [PATCH v3 48/48] drm/i915/perf: Enable OA formats for ADL_P Matt Roper
2021-05-08 2:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Alder Lake-P Support Patchwork
2021-05-08 3:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Alder Lake-P Support (rev2) Patchwork
2021-05-08 3:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-08 3:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-08 5:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a7b01aa783ce40b4bbdba84d52cf18e3@intel.com \
--to=anusha.srivatsa@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=matthew.d.roper@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox