From: "Nilawar, Badal" <badal.nilawar@intel.com>
To: Raag Jadav <raag.jadav@intel.com>, <matthew.d.roper@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
<rodrigo.vivi@intel.com>, <daniele.ceraolospurio@intel.com>,
<riana.tauro@intel.com>, <mallesh.koujalagi@intel.com>,
<aravind.iddamsetty@intel.com>, <himal.prasad.ghimiray@intel.com>,
<arvind.yadav@intel.com>, <syed.abdul.muqthyar.ahmed@intel.com>,
<nitin.r.gote@intel.com>, <pravalika.gurram@intel.com>
Subject: Re: [PATCH v4 04/12] drm/xe/cper: Construct CPER record for hardware errors
Date: Thu, 22 Oct 2026 22:24:45 +0530 [thread overview]
Message-ID: <03767785-851a-4b84-8271-388d33d7669c@intel.com> (raw)
In-Reply-To: <332beff5-53b6-4043-8b60-7c73ca780eff@intel.com>
On 22-10-2026 19:10, Nilawar, Badal wrote:
>
>
> On 14-10-2026 16:00, Raag Jadav wrote:
>>> +static const struct xe_platform_id_entry xe_platform_ids[] = {
>>> + /* 0x674C platform/8086:674c */
>>> + { 0x674C, GUID_INIT(0x9046afe5, 0x9041, 0x5124,
>>> + 0x86, 0x14, 0x92, 0x55, 0x0d, 0x9e, 0x9d, 0xa6) },
>>> + /* 0x674D platform/8086:674d */
>>> + { 0x674D, GUID_INIT(0xf95911b8, 0x6564, 0x5905,
>>> + 0xa6, 0xa7, 0xb9, 0xbf, 0x54, 0xab, 0x6c, 0x27) },
>>> + /* 0x674E platform/8086:674e */
>>> + { 0x674E, GUID_INIT(0xb8d24106, 0x0108, 0x59f1,
>>> + 0x8f, 0xfc, 0x9f, 0xc4, 0xa9, 0xc9, 0xb7, 0xb0) },
>>> + /* 0x674F platform/8086:674f */
>>> + { 0x674F, GUID_INIT(0xdd8dd88e, 0xef2f, 0x59b1,
>>> + 0x99, 0x15, 0xdb, 0x6f, 0x1d, 0xc9, 0xb4, 0x5d) },
>>> + /* 0x6750 platform/8086:6750 */
>>> + { 0x6750, GUID_INIT(0x1dd66c44, 0x87d5, 0x524a,
>>> + 0xad, 0x6e, 0xfc, 0x18, 0x9d, 0x42, 0x6f, 0x1a) },
>>> + /* 0x6751 platform/8086:6751 */
>>> + { 0x6751, GUID_INIT(0x17d0dd04, 0x2fad, 0x5400,
>>> + 0x99, 0xc8, 0x9b, 0x45, 0x51, 0x3b, 0x67, 0xe3) },
>>> +};
>> This is unrelated to cper and shouldn't be here. I'll rely on Matt's
>> input on how to deal with these.
>
> Agreed, I don't think this is the ideal place either. For now, I'll
> keep it here and, based on Matt's input, consider moving it to
> xe_pci.c, which maintains the PCI ID list for the platforms supported
> by Xe.
>
One reason I placed the table here is that these aren’t general-purpose
platform GUIDs; they’re UUIDv5 values generated specifically for CPER’s
platform_id field, using platform/8086:<device-id> as the name.
Since CPER is their only consumer, keeping the mapping with the CPER
code seems reasonable to me. I’m happy to follow Matt’s input if
there’s a preferred place for this kind of mapping.
$ uuidgen --sha1 -n "$INTEL_NS" -N "platform/8086:674c"
9046afe5-9041-5124-8614-92550d9e9da6
$ uuidgen --sha1 -n "$INTEL_NS" -N "platform/8086:674d"
f95911b8-6564-5905-a6a7-b9bf54ab6c27
$ uuidgen --sha1 -n "$INTEL_NS" -N "platform/8086:674e"
b8d24106-0108-59f1-8ffc-9fc4a9c9b7b0
$ uuidgen --sha1 -n "$INTEL_NS" -N "platform/8086:674f"
dd8dd88e-ef2f-59b1-9915-db6f1dc9b45d
$ uuidgen --sha1 -n "$INTEL_NS" -N "platform/8086:6750"
1dd66c44-87d5-524a-ad6e-fc189d426f1a
$ uuidgen --sha1 -n "$INTEL_NS" -N "platform/8086:6751"
17d0dd04-2fad-5400-99c8-9b45513b67e3
Thanks,
Badal
>
> Thanks,
> Badal
>
>>> +static const guid_t *lookup_platform_id(const struct pci_dev *pdev)
>>> +{
>>> + unsigned int i;
>>> +
>>> + for (i = 0; i < ARRAY_SIZE(xe_platform_ids); i++)
>>> + if (xe_platform_ids[i].device_id == pdev->device)
>>> + return &xe_platform_ids[i].platform_id;
>>> + return NULL;
>>> +}
>>> +
next prev parent reply other threads:[~2026-10-22 16:55 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 10:46 [PATCH v4 00/12] Add CPER logging support for CRI Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-09 10:43 ` sashiko-bot
2026-10-09 12:17 ` Nilawar, Badal
2026-10-12 6:18 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-09 10:46 ` sashiko-bot
2026-10-09 12:27 ` Nilawar, Badal
2026-10-12 9:07 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 03/12] drm/xe/cper: Initialize Intel-specific error section header Badal Nilawar
2026-10-14 7:27 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 04/12] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-14 10:30 ` Raag Jadav
2026-10-22 13:40 ` Nilawar, Badal
2026-10-22 16:54 ` Nilawar, Badal [this message]
2026-10-23 2:32 ` Raag Jadav
2026-10-23 23:04 ` Matt Roper
2026-10-09 10:46 ` [PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-10-09 10:40 ` sashiko-bot
2026-10-09 12:45 ` Nilawar, Badal
2026-10-14 15:19 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-10-09 10:41 ` sashiko-bot
2026-10-09 13:07 ` Nilawar, Badal
2026-10-15 9:45 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 07/12] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-15 10:36 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-09 10:38 ` sashiko-bot
2026-10-09 10:46 ` [PATCH v4 09/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-10-14 9:05 ` Mallesh, Koujalagi
2026-10-09 10:46 ` [PATCH v4 10/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-14 9:28 ` Mallesh, Koujalagi
2026-10-14 9:30 ` Tauro, Riana
2026-10-16 2:55 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 11/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-14 9:31 ` Mallesh, Koujalagi
2026-10-16 3:01 ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 12/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-09 10:50 ` sashiko-bot
2026-10-16 3:05 ` Raag Jadav
2026-10-09 10:54 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev4) Patchwork
2026-10-09 10:56 ` ✓ CI.KUnit: success " Patchwork
2026-10-09 12:03 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-10-09 15:13 ` ✓ Xe.CI.FULL: success " Patchwork
2026-10-12 6:14 ` [PATCH v4 00/12] Add CPER logging support for CRI Raag Jadav
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=03767785-851a-4b84-8271-388d33d7669c@intel.com \
--to=badal.nilawar@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=aravind.iddamsetty@intel.com \
--cc=arvind.yadav@intel.com \
--cc=daniele.ceraolospurio@intel.com \
--cc=himal.prasad.ghimiray@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=mallesh.koujalagi@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=nitin.r.gote@intel.com \
--cc=pravalika.gurram@intel.com \
--cc=raag.jadav@intel.com \
--cc=riana.tauro@intel.com \
--cc=rodrigo.vivi@intel.com \
--cc=syed.abdul.muqthyar.ahmed@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox