Re: [PATCH v2 08/30] drm/xe/guc: Use scope-based cleanup

[Gustavo Sousa <gustavo.sousa@intel.com>]

Quoting Matt Roper (2025-11-10 20:20:26-03:00)
>Use scope-based cleanup for forcewake and runtime PM.
>
>Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/xe/xe_guc.c           | 13 ++++---------
> drivers/gpu/drm/xe/xe_guc_log.c       | 10 ++++------
> drivers/gpu/drm/xe/xe_guc_submit.c    | 11 +++--------
> drivers/gpu/drm/xe/xe_guc_tlb_inval.c |  4 +---
> 4 files changed, 12 insertions(+), 26 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>index ecc3e091b89e..e47292b2aab0 100644
>--- a/drivers/gpu/drm/xe/xe_guc.c
>+++ b/drivers/gpu/drm/xe/xe_guc.c
>@@ -658,11 +658,9 @@ static void guc_fini_hw(void *arg)
> {
>         struct xe_guc *guc = arg;
>         struct xe_gt *gt = guc_to_gt(guc);
>-        unsigned int fw_ref;
> 
>-        fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
>-        xe_uc_sanitize_reset(&guc_to_gt(guc)->uc);
>-        xe_force_wake_put(gt_to_fw(gt), fw_ref);
>+        xe_with_force_wake(fw_ref, gt_to_fw(gt), XE_FORCEWAKE_ALL)
>+                xe_uc_sanitize_reset(&guc_to_gt(guc)->uc);
> 
>         guc_g2g_fini(guc);
> }
>@@ -1610,15 +1608,14 @@ int xe_guc_start(struct xe_guc *guc)
> void xe_guc_print_info(struct xe_guc *guc, struct drm_printer *p)
> {
>         struct xe_gt *gt = guc_to_gt(guc);
>-        unsigned int fw_ref;
>         u32 status;
>         int i;
> 
>         xe_uc_fw_print(&guc->fw, p);
> 
>         if (!IS_SRIOV_VF(gt_to_xe(gt))) {
>-                fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>-                if (!fw_ref)
>+                CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
>+                if (!fw_ref.domains)
>                         return;
> 
>                 status = xe_mmio_read32(&gt->mmio, GUC_STATUS);
>@@ -1638,8 +1635,6 @@ void xe_guc_print_info(struct xe_guc *guc, struct drm_printer *p)
>                         drm_printf(p, "\t%2d: \t0x%x\n",
>                                    i, xe_mmio_read32(&gt->mmio, SOFT_SCRATCH(i)));
>                 }
>-
>-                xe_force_wake_put(gt_to_fw(gt), fw_ref);
>         }
> 
>         drm_puts(p, "\n");
>diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
>index c01ccb35dc75..0c704a11078a 100644
>--- a/drivers/gpu/drm/xe/xe_guc_log.c
>+++ b/drivers/gpu/drm/xe/xe_guc_log.c
>@@ -145,7 +145,6 @@ struct xe_guc_log_snapshot *xe_guc_log_snapshot_capture(struct xe_guc_log *log,
>         struct xe_device *xe = log_to_xe(log);
>         struct xe_guc *guc = log_to_guc(log);
>         struct xe_gt *gt = log_to_gt(log);
>-        unsigned int fw_ref;
>         size_t remain;
>         int i;
> 
>@@ -165,13 +164,12 @@ struct xe_guc_log_snapshot *xe_guc_log_snapshot_capture(struct xe_guc_log *log,
>                 remain -= size;
>         }
> 
>-        fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>-        if (!fw_ref) {
>+        CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
>+        if (!fw_ref.domains)
>                 snapshot->stamp = ~0ULL;
>-        } else {
>+        else
>                 snapshot->stamp = xe_mmio_read64_2x32(&gt->mmio, GUC_PMTIMESTAMP_LO);
>-                xe_force_wake_put(gt_to_fw(gt), fw_ref);
>-        }
>+
>         snapshot->ktime = ktime_get_boottime_ns();
>         snapshot->level = log->level;
>         snapshot->ver_found = guc->fw.versions.found[XE_UC_FW_VER_RELEASE];
>diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
>index d4ffdb71ef3d..7e0882074a99 100644
>--- a/drivers/gpu/drm/xe/xe_guc_submit.c
>+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>@@ -1225,7 +1225,6 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
>         struct xe_guc *guc = exec_queue_to_guc(q);
>         const char *process_name = "no process";
>         struct xe_device *xe = guc_to_xe(guc);
>-        unsigned int fw_ref;
>         int err = -ETIME;
>         pid_t pid = -1;
>         int i = 0;
>@@ -1258,13 +1257,11 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
>         if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
>             !xe_guc_capture_get_matching_and_lock(q)) {
>                 /* take force wake before engine register manual capture */
>-                fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
>-                if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL))
>+                CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
>+                if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL))
>                         xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
> 
>                 xe_engine_snapshot_capture_for_queue(q);
>-
>-                xe_force_wake_put(gt_to_fw(q->gt), fw_ref);
>         }
> 
>         /*
>@@ -1455,7 +1452,7 @@ static void __guc_exec_queue_destroy_async(struct work_struct *w)
>         struct xe_exec_queue *q = ge->q;
>         struct xe_guc *guc = exec_queue_to_guc(q);
> 
>-        xe_pm_runtime_get(guc_to_xe(guc));
>+        guard(xe_pm_runtime)(guc_to_xe(guc));
>         trace_xe_exec_queue_destroy(q);
> 
>         if (xe_exec_queue_is_lr(q))
>@@ -1464,8 +1461,6 @@ static void __guc_exec_queue_destroy_async(struct work_struct *w)
>         cancel_delayed_work_sync(&ge->sched.base.work_tdr);
> 
>         xe_exec_queue_fini(q);
>-
>-        xe_pm_runtime_put(guc_to_xe(guc));
> }
> 
> static void guc_exec_queue_destroy_async(struct xe_exec_queue *q)
>diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>index a80175c7c478..848d3493df10 100644
>--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>@@ -71,12 +71,11 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
>                 return send_tlb_inval(guc, action, ARRAY_SIZE(action));
>         } else if (xe_device_uc_enabled(xe) && !xe_device_wedged(xe)) {
>                 struct xe_mmio *mmio = &gt->mmio;
>-                unsigned int fw_ref;
> 
>                 if (IS_SRIOV_VF(xe))
>                         return -ECANCELED;
> 
>-                fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>+                CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
>                 if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) {
>                         xe_mmio_write32(mmio, PVC_GUC_TLB_INV_DESC1,
>                                         PVC_GUC_TLB_INV_DESC1_INVALIDATE);
>@@ -86,7 +85,6 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
>                         xe_mmio_write32(mmio, GUC_TLB_INV_CR,
>                                         GUC_TLB_INV_CR_INVALIDATE);
>                 }
>-                xe_force_wake_put(gt_to_fw(gt), fw_ref);
>         }
> 
>         return -ECANCELED;
>-- 
>2.51.1
>