[PATCH 00/23] drm/xe: Add Xe3p support

[Lucas De Marchi <lucas.demarchi@intel.com>]

This begins the support for the Xe3p arch - it contains generic support
for graphics version 35 and the Xe3p_xpc IP, the Xe3p_LPM IP for media
and support for Nova Lake S (NVL-S), that uses a mix of IPs - the
display side for NVL-S will be submitted separately.

Cc: Shekhar Chauhan <shekhar.chauhan@intel.com>
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
Balasubramani Vivekanandan (4):
      drm/xe/xe3p_lpm: Add special check in Media GT for Main GAMCTRL
      drm/xe/xe3p_lpm: Stop reading the CTC_MODE register
      drm/xe/xe3p_lpm: Skip disabling NOA on unsupported IPs
      drm/xe/xe3p_xpc: Add Xe3p_XPC IP definition

Brian Welty (1):
      drm/xe/xe3p_lpm: Configure MAIN_GAMCTRL_QUEUE_SELECT

Dnyaneshwar Bhadane (1):
      drm/xe/nvls: Attach MOCS table for NVL-S

Fei Yang (1):
      drm/xe/xe3p_xpc: Add L3 bank mask

Harish Chegondi (1):
      drm/xe/xe3p: Add xe3p EU stall data format

Matt Roper (8):
      drm/xe/xe3p_lpm: Handle MCR steering
      drm/xe/xe3p: Stop programming RCU_MODE's fixed slice mode setting
      drm/xe/xe3p: Determine service copy availability from fuse
      drm/xe/nvl: Define NVL-S platform
      drm/xe/nvls: Define GuC firmware for NVL-S
      drm/xe/xe3p_xpc: Add MCR steering
      drm/xe/xe3p_xpc: Skip compression tuning on platforms without flatccs
      drm/xe/xe3p_xpc: Setup PAT table

S A Muqthyar Ahmed (1):
      drm/xe/xe3p_xpc: Add support for compute walker for non-MSIx

Shekhar Chauhan (2):
      drm/xe/xe3: Add support for graphics IP versions 30.04 & 30.05
      drm/xe/xe3p_lpm: Add support for media IP versions 35.00 & 35.03

Tejas Upadhyay (3):
      drm/xe/xe3p: Skip TD flush
      drm/xe/xe3p: Enable L2 flush optimization feature
      drm/xe/xe3p: Flush userptr/shrinker bo cachelines manually

Wang Xin (1):
      drm/xe: Dump CURRENT_LRCA and CSMQDEBUG registers

 drivers/gpu/drm/xe/regs/xe_engine_regs.h |  5 ++
 drivers/gpu/drm/xe/regs/xe_gt_regs.h     | 12 ++++
 drivers/gpu/drm/xe/regs/xe_irq_regs.h    |  1 +
 drivers/gpu/drm/xe/xe_bo.c               |  3 +-
 drivers/gpu/drm/xe/xe_device.c           | 28 ++++++++++
 drivers/gpu/drm/xe/xe_device.h           |  1 +
 drivers/gpu/drm/xe/xe_eu_stall.c         | 23 ++++++++
 drivers/gpu/drm/xe/xe_gt.h               |  6 ++
 drivers/gpu/drm/xe/xe_gt_clock.c         |  4 ++
 drivers/gpu/drm/xe/xe_gt_mcr.c           | 61 ++++++++++++++++++--
 drivers/gpu/drm/xe/xe_gt_topology.c      |  6 +-
 drivers/gpu/drm/xe/xe_gt_types.h         | 15 +++++
 drivers/gpu/drm/xe/xe_guc.c              | 49 ++++++++++++++++
 drivers/gpu/drm/xe/xe_guc.h              |  1 +
 drivers/gpu/drm/xe/xe_guc_ads.c          |  6 +-
 drivers/gpu/drm/xe/xe_guc_capture.c      | 53 +++++++++++++++++-
 drivers/gpu/drm/xe/xe_guc_fwif.h         |  2 +
 drivers/gpu/drm/xe/xe_hw_engine.c        | 50 ++++++++++++++---
 drivers/gpu/drm/xe/xe_irq.c              |  4 ++
 drivers/gpu/drm/xe/xe_mocs.c             |  1 +
 drivers/gpu/drm/xe/xe_oa.c               |  3 +-
 drivers/gpu/drm/xe/xe_pat.c              | 96 +++++++++++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_pci.c              | 23 ++++++++
 drivers/gpu/drm/xe/xe_platform_types.h   |  1 +
 drivers/gpu/drm/xe/xe_rtp.c              |  6 ++
 drivers/gpu/drm/xe/xe_rtp.h              | 10 ++++
 drivers/gpu/drm/xe/xe_tuning.c           |  9 ++-
 drivers/gpu/drm/xe/xe_uc_fw.c            |  1 +
 drivers/gpu/drm/xe/xe_userptr.c          |  3 +-
 drivers/gpu/drm/xe/xe_wa.c               |  6 +-
 drivers/gpu/drm/xe/xe_wa_oob.rules       |  7 ++-
 include/drm/intel/pciids.h               |  9 +++
 32 files changed, 477 insertions(+), 28 deletions(-)

base-commit: c917f7d11493984be9f381ca0a7667bd3e587ada
change-id: 20251013-xe3p-81bb749e9de0

Lucas De Marchi