Re: [PATCH 05/23] drm/xe/xe3p_lpm: Stop reading the CTC_MODE register

[Shekhar Chauhan <shekhar.chauhan@intel.com>]

On 10/14/2025 8:54, Lucas De Marchi wrote:
> From: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
>
> CTC_MODE register is removed by Xe3p.  Stop reading that register on
> Xe3p and later platforms.
>
> Bspec: 62395

Again, maybe I'm referencing the Bspec in a wrong way, but I do see this 
register existing for IP 35. Maybe a possible tagging issue in the 
Bspec? Can someone comment here, if I'm missing something.

-shekhar

> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_gt_clock.c | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_clock.c b/drivers/gpu/drm/xe/xe_gt_clock.c
> index 4f011d1573c65..26052710be8a7 100644
> --- a/drivers/gpu/drm/xe/xe_gt_clock.c
> +++ b/drivers/gpu/drm/xe/xe_gt_clock.c
> @@ -57,6 +57,10 @@ static void read_crystal_clock(struct xe_gt *gt, u32 rpm_config_reg, u32 *freq,
>   
>   static void check_ctc_mode(struct xe_gt *gt)
>   {
> +	/* CTC_MODE register is removed by Xe3p */
> +	if (GT_VER(gt) >= 35)
> +		return;
> +
>   	/*
>   	 * CTC_MODE[0] = 1 is definitely not supported for Xe2 and later
>   	 * platforms.  In theory it could be a valid setting for pre-Xe2
>