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From: Shekhar Chauhan <shekhar.chauhan@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>,
	"Matt Roper" <matthew.d.roper@intel.com>,
	Tejas Upadhyay <tejas.upadhyay@intel.com>
Subject: Re: [PATCH 14/23] drm/xe/nvl: Define NVL-S platform
Date: Tue, 14 Oct 2025 13:04:06 +0530	[thread overview]
Message-ID: <a8d6ecba-4e87-4835-a294-23302bf3ee98@intel.com> (raw)
In-Reply-To: <20251013-xe3p-v1-14-bfb74f038215@intel.com>


On 10/14/2025 8:54, Lucas De Marchi wrote:
> From: Matt Roper <matthew.d.roper@intel.com>
>
> Provide the basic platform definitions and PCI IDs for NVL-S.
>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

LGTM,

Reviewed-by: Shekhar Chauhan <shekhar.chauhan@intel.com>

> ---
>   drivers/gpu/drm/xe/xe_pci.c            | 9 +++++++++
>   drivers/gpu/drm/xe/xe_platform_types.h | 1 +
>   include/drm/intel/pciids.h             | 9 +++++++++
>   3 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 8480e53990031..aa8359a4c5594 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -354,6 +354,14 @@ static const struct xe_device_desc ptl_desc = {
>   	.needs_shared_vf_gt_wq = true,
>   };
>   
> +static const struct xe_device_desc nvls_desc = {
> +	PLATFORM(NOVALAKE_S),
> +	.dma_mask_size = 46,
> +	.has_display = true,
> +	.max_gt_per_tile = 2,
> +	.require_force_probe = true,
> +};
> +
>   #undef PLATFORM
>   __diag_pop();
>   
> @@ -382,6 +390,7 @@ static const struct pci_device_id pciidlist[] = {
>   	INTEL_BMG_IDS(INTEL_VGA_DEVICE, &bmg_desc),
>   	INTEL_PTL_IDS(INTEL_VGA_DEVICE, &ptl_desc),
>   	INTEL_WCL_IDS(INTEL_VGA_DEVICE, &ptl_desc),
> +	INTEL_NVLS_IDS(INTEL_VGA_DEVICE, &nvls_desc),
>   	{ }
>   };
>   MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/drivers/gpu/drm/xe/xe_platform_types.h b/drivers/gpu/drm/xe/xe_platform_types.h
> index d08574c4cdb8b..f5140a244daf3 100644
> --- a/drivers/gpu/drm/xe/xe_platform_types.h
> +++ b/drivers/gpu/drm/xe/xe_platform_types.h
> @@ -24,6 +24,7 @@ enum xe_platform {
>   	XE_LUNARLAKE,
>   	XE_BATTLEMAGE,
>   	XE_PANTHERLAKE,
> +	XE_NOVALAKE_S,
>   };
>   
>   enum xe_subplatform {
> diff --git a/include/drm/intel/pciids.h b/include/drm/intel/pciids.h
> index 69d4ae92d822a..00dd007f538ff 100644
> --- a/include/drm/intel/pciids.h
> +++ b/include/drm/intel/pciids.h
> @@ -884,4 +884,13 @@
>   	MACRO__(0xFD80, ## __VA_ARGS__), \
>   	MACRO__(0xFD81, ## __VA_ARGS__)
>   
> +/* NVL-S */
> +#define INTEL_NVLS_IDS(MACRO__, ...) \
> +	MACRO__(0xD740, ## __VA_ARGS__), \
> +	MACRO__(0xD741, ## __VA_ARGS__), \
> +	MACRO__(0xD742, ## __VA_ARGS__), \
> +	MACRO__(0xD743, ## __VA_ARGS__), \
> +	MACRO__(0xD744, ## __VA_ARGS__), \
> +	MACRO__(0xD745, ## __VA_ARGS__)
> +
>   #endif /* __PCIIDS_H__ */
>

  reply	other threads:[~2025-10-14  7:34 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-14  3:24 [PATCH 00/23] drm/xe: Add Xe3p support Lucas De Marchi
2025-10-14  3:24 ` [PATCH 01/23] drm/xe/xe3: Add support for graphics IP versions 30.04 & 30.05 Lucas De Marchi
2025-10-14  6:17   ` Shekhar Chauhan
2025-10-14 16:11   ` Matt Roper
2025-10-14  3:24 ` [PATCH 02/23] drm/xe/xe3p_lpm: Add support for media IP versions 35.00 & 35.03 Lucas De Marchi
2025-10-14  6:22   ` Shekhar Chauhan
2025-10-14 16:14   ` Matt Roper
2025-10-14  3:24 ` [PATCH 03/23] drm/xe/xe3p_lpm: Configure MAIN_GAMCTRL_QUEUE_SELECT Lucas De Marchi
2025-10-14 16:34   ` Matt Roper
2025-10-15  2:28     ` Lucas De Marchi
2025-10-15  6:36       ` Vivekanandan, Balasubramani
2025-10-15 14:03         ` Lucas De Marchi
2025-10-16 14:20           ` Vivekanandan, Balasubramani
2025-10-15 14:59       ` Matt Roper
2025-10-14  3:24 ` [PATCH 04/23] drm/xe/xe3p_lpm: Add special check in Media GT for Main GAMCTRL Lucas De Marchi
2025-10-14 16:36   ` Matt Roper
2025-10-14  3:24 ` [PATCH 05/23] drm/xe/xe3p_lpm: Stop reading the CTC_MODE register Lucas De Marchi
2025-10-14 11:58   ` Shekhar Chauhan
2025-10-14 16:52     ` Matt Roper
2025-10-15  3:41       ` Lucas De Marchi
2025-10-15  9:19         ` Vivekanandan, Balasubramani
2025-10-15 15:04           ` Matt Roper
2025-10-14 16:40   ` Matt Roper
2025-10-14 16:53     ` Matt Roper
2025-10-14  3:24 ` [PATCH 06/23] drm/xe/xe3p_lpm: Skip disabling NOA on unsupported IPs Lucas De Marchi
2025-10-14 17:04   ` Matt Roper
2025-10-14  3:24 ` [PATCH 07/23] drm/xe/xe3p_lpm: Handle MCR steering Lucas De Marchi
2025-10-15  9:56   ` Vivekanandan, Balasubramani
2025-10-14  3:24 ` [PATCH 08/23] drm/xe/xe3p: Stop programming RCU_MODE's fixed slice mode setting Lucas De Marchi
2025-10-15 12:24   ` Vivekanandan, Balasubramani
2025-10-14  3:24 ` [PATCH 09/23] drm/xe/xe3p: Determine service copy availability from fuse Lucas De Marchi
2025-10-15 20:14   ` Gustavo Sousa
2025-10-14  3:24 ` [PATCH 10/23] drm/xe/xe3p: Skip TD flush Lucas De Marchi
2025-10-14 19:35   ` Matt Roper
2025-10-14  3:24 ` [PATCH 11/23] drm/xe/xe3p: Enable L2 flush optimization feature Lucas De Marchi
2025-10-14 19:43   ` Matt Roper
2025-10-15  4:02     ` Lucas De Marchi
2025-10-14  3:24 ` [PATCH 12/23] drm/xe/xe3p: Flush userptr/shrinker bo cachelines manually Lucas De Marchi
2025-10-14 12:58   ` Thomas Hellström
2025-10-15 18:42     ` Lucas De Marchi
2025-10-14  3:24 ` [PATCH 13/23] drm/xe: Dump CURRENT_LRCA and CSMQDEBUG registers Lucas De Marchi
2025-10-14 17:24   ` Matt Roper
2025-10-15  4:07     ` Lucas De Marchi
2025-10-14  3:24 ` [PATCH 14/23] drm/xe/nvl: Define NVL-S platform Lucas De Marchi
2025-10-14  7:34   ` Shekhar Chauhan [this message]
2025-10-14  3:24 ` [PATCH 15/23] drm/xe/nvls: Define GuC firmware for NVL-S Lucas De Marchi
2025-10-15 18:49   ` Lucas De Marchi
2025-10-14  3:24 ` [PATCH 16/23] drm/xe/nvls: Attach MOCS table " Lucas De Marchi
2025-10-14  7:45   ` Shekhar Chauhan
2025-10-14  3:24 ` [PATCH 17/23] drm/xe/xe3p_xpc: Add Xe3p_XPC IP definition Lucas De Marchi
2025-10-14  8:04   ` Shekhar Chauhan
2025-10-14  8:12     ` Shekhar Chauhan
2025-10-14 17:33     ` Matt Roper
2025-10-15  2:47       ` Shekhar Chauhan
2025-10-14 17:36   ` Matt Roper
2025-10-14  3:24 ` [PATCH 18/23] drm/xe/xe3p_xpc: Add L3 bank mask Lucas De Marchi
2025-10-14 17:46   ` Matt Roper
2025-10-14  3:24 ` [PATCH 19/23] drm/xe/xe3p_xpc: Add MCR steering Lucas De Marchi
2025-10-14  3:24 ` [PATCH 20/23] drm/xe/xe3p_xpc: Add support for compute walker for non-MSIx Lucas De Marchi
2025-10-14 18:07   ` Matt Roper
2025-10-15 17:07     ` Lucas De Marchi
2025-10-15 17:12       ` Matt Roper
2025-10-14  3:24 ` [PATCH 21/23] drm/xe/xe3p_xpc: Skip compression tuning on platforms without flatccs Lucas De Marchi
2025-10-14  8:09   ` Shekhar Chauhan
2025-10-14  8:13     ` Shekhar Chauhan
2025-10-14 18:14     ` Matt Roper
2025-10-15  2:52       ` Shekhar Chauhan
2025-10-15 14:38         ` Lucas De Marchi
2025-10-15 15:34           ` Shekhar Chauhan
2025-10-14  3:24 ` [PATCH 22/23] drm/xe/xe3p_xpc: Setup PAT table Lucas De Marchi
2025-10-16 14:07   ` Vivekanandan, Balasubramani
2025-10-14  3:24 ` [PATCH 23/23] drm/xe/xe3p: Add xe3p EU stall data format Lucas De Marchi
2025-10-14 19:11   ` Matt Roper
2025-10-15 23:05     ` Harish Chegondi
2025-10-14  3:45 ` ✗ CI.checkpatch: warning for drm/xe: Add Xe3p support Patchwork
2025-10-14  3:47 ` ✓ CI.KUnit: success " Patchwork
2025-10-14  4:22 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-14 12:06 ` ✓ Xe.CI.Full: " Patchwork

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