* [PATCH v12 00/13] AuxCCS handling and render compression modifiers
@ 2025-09-23 10:07 Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 01/13] drm/xe/xelpg: Flush CCS when flushing caches Tvrtko Ursulin
` (21 more replies)
0 siblings, 22 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:07 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
A series to fix and add xe support for AuxCSS framebuffers via DPT.
Currently the auxiliary buffer data isn't mapped into the page tables at all so
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
had to disable the support.
On top of that there are missing flushes, invalidations and similar.
Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
[PLANE:32:plane 1A]: type=PRI
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
Display working fine - no artefacts, no DMAR/PIPE faults.
All IGTs pass for me locally.
v2:
* More patches added to fix kms_flip_tiling.
v3:
* Rebased after some cleanup patches from v2 were merged.
* Added people to Cc as suggested by Rodrigo.
* Adjusted last patch title. (Rodrigo)
* Apply GGTT flushing only to iomapped system memory buffers.
v4:
* Added patch for potentially misplaced Wa_14016712196.
* Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.
v5:
* Split out ring emission changes to smaller patches.
* Fixed MAX_JOB_SIZE_DW even more.
* Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.
v6:
* Added AuxCCS invalidation to indirect context workarounds.
* Also added the indirect context handling and some other workarounds. They are
unrelated but the series depends on it.
* Dropped DPT pin alignment reduction since BMG appears not to be liking it for
some reason.
v7:
* Rebased on top of recent xe_fb_pin.c refactoring and also the indirect
context workarounds series.
v8:
* Rebased for bo->size removal.
* Corrected PIPE_CONTROL_FLUSH_L3 to bit 30. (Jose)
v9:
* Fixed fb remapping changes.
* Dropped two not required patches from the series.
* Fixed criteria for GGTT flushing.
* Limit clflush to the compression metadata area.
* Rebased for indirect context workarounds landing upstream.
v10:
* Rebase for XE_GT_WA().
v11:
* Do not use stolen for DPT on IGFX + AuxCCS.
v12:
* Rebased for some ringbuf and LRC code changes.
Tvrtko Ursulin (13):
drm/xe/xelpg: Flush CCS when flushing caches
drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
drm/xe/xelp: Support auxccs invalidation on blitter
drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms
drm/xe/xelp: Wait for AuxCCS invalidation to complete
drm/xe: Export xe_emit_aux_table_inv
drm/xe/xelp: Add AuxCCS invalidation to the indirect context
workarounds
drm/xe: Flush GGTT writes after populating DPT
drm/xe: Handle DPT in system memory
drm/xe/display: Add support for AuxCCS
drm/xe: Force flush system memory AuxCCS framebuffers before scan out
drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS
drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
.../drm/i915/display/skl_universal_plane.c | 6 -
drivers/gpu/drm/xe/display/xe_fb_pin.c | 189 +++++++++++++++---
.../gpu/drm/xe/instructions/xe_gpu_commands.h | 1 +
.../gpu/drm/xe/instructions/xe_mi_commands.h | 6 +
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
drivers/gpu/drm/xe/xe_bo_types.h | 14 +-
drivers/gpu/drm/xe/xe_lrc.c | 38 ++++
drivers/gpu/drm/xe/xe_ring_ops.c | 164 ++++++++-------
drivers/gpu/drm/xe/xe_ring_ops.h | 3 +
drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +-
10 files changed, 304 insertions(+), 120 deletions(-)
--
2.48.0
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v12 01/13] drm/xe/xelpg: Flush CCS when flushing caches
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
@ 2025-09-23 10:07 ` Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 02/13] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
` (20 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:07 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin, Rodrigo Vivi
According to i915 PIPE_CONTROL0_CCS_FLUSH needs to be set when flushing
render caches on gfx ip 12.70+.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/instructions/xe_gpu_commands.h | 1 +
drivers/gpu/drm/xe/xe_ring_ops.c | 7 ++++++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
index 8cfcd3360896..78c0e87dbd37 100644
--- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
@@ -43,6 +43,7 @@
#define PIPE_CONTROL0_L3_READ_ONLY_CACHE_INVALIDATE BIT(10) /* gen12 */
#define PIPE_CONTROL0_HDC_PIPELINE_FLUSH BIT(9) /* gen12 */
+#define PIPE_CONTROL0_CCS_FLUSH BIT(13) /* MTL+ */
#define PIPE_CONTROL_COMMAND_CACHE_INVALIDATE (1<<29)
#define PIPE_CONTROL_TILE_CACHE_FLUSH (1<<28)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index d71837773d6c..25259b2784bc 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -176,13 +176,18 @@ static int emit_store_imm_ppgtt_posted(u64 addr, u64 value,
static int emit_render_cache_flush(struct xe_sched_job *job, u32 *dw, int i)
{
struct xe_gt *gt = job->q->gt;
+ struct xe_device *xe = gt_to_xe(gt);
bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
+ u32 bit_group_0 = PIPE_CONTROL0_HDC_PIPELINE_FLUSH;
u32 flags;
if (XE_GT_WA(gt, 14016712196))
i = emit_pipe_control(dw, i, 0, PIPE_CONTROL_DEPTH_CACHE_FLUSH,
LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR, 0);
+ if (GRAPHICS_VERx100(xe) >= 1270)
+ bit_group_0 |= PIPE_CONTROL0_CCS_FLUSH;
+
flags = (PIPE_CONTROL_CS_STALL |
PIPE_CONTROL_TILE_CACHE_FLUSH |
PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
@@ -198,7 +203,7 @@ static int emit_render_cache_flush(struct xe_sched_job *job, u32 *dw, int i)
else if (job->q->class == XE_ENGINE_CLASS_COMPUTE)
flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
- return emit_pipe_control(dw, i, PIPE_CONTROL0_HDC_PIPELINE_FLUSH, flags, 0, 0);
+ return emit_pipe_control(dw, i, bit_group_0, flags, 0, 0);
}
static int emit_pipe_control_to_ring_end(struct xe_hw_engine *hwe, u32 *dw, int i)
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 02/13] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 01/13] drm/xe/xelpg: Flush CCS when flushing caches Tvrtko Ursulin
@ 2025-09-23 10:07 ` Tvrtko Ursulin
2025-10-01 15:47 ` Rodrigo Vivi
2025-09-23 10:07 ` [PATCH v12 03/13] drm/xe/xelp: Support auxccs invalidation on blitter Tvrtko Ursulin
` (19 subsequent siblings)
21 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:07 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin, Rodrigo Vivi
According to i915 commit
ad8ebf12217e ("drm/i915/gt: Ensure memory quiesced before invalidation")
quiescing of the memory traffic is required before invalidating the AuxCCS
tables.
Add an extra pipe control flush to achieve that.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_ring_ops.c | 10 +++++++++-
drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 25259b2784bc..af0141c6f809 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -358,10 +358,18 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
struct xe_gt *gt = job->q->gt;
struct xe_device *xe = gt_to_xe(gt);
bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
+ const bool aux_ccs = has_aux_ccs(xe);
u32 mask_flags = 0;
i = emit_copy_timestamp(lrc, dw, i);
+ /*
+ * On AuxCCS platforms the invalidation of the Aux table requires
+ * quiescing the memory traffic beforehand.
+ */
+ if (aux_ccs)
+ i = emit_render_cache_flush(job, dw, i);
+
dw[i++] = preparser_disable(true);
if (lacks_render)
mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS;
@@ -372,7 +380,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
i = emit_pipe_invalidate(mask_flags, job->ring_ops_flush_tlb, dw, i);
/* hsdes: 1809175790 */
- if (has_aux_ccs(xe))
+ if (aux_ccs)
i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
dw[i++] = preparser_disable(false);
diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
index d7e3e150a9a5..477dc7defd72 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
@@ -8,7 +8,7 @@
struct xe_sched_job;
-#define MAX_JOB_SIZE_DW 58
+#define MAX_JOB_SIZE_DW 70
#define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
/**
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 03/13] drm/xe/xelp: Support auxccs invalidation on blitter
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 01/13] drm/xe/xelpg: Flush CCS when flushing caches Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 02/13] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
@ 2025-09-23 10:07 ` Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 04/13] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms Tvrtko Ursulin
` (18 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:07 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
Auxccs platforms need to be able to invalidate auxccs on the blitter
engine.
Add the relevant mmio register and enable this by refactoring the ring
emission a bit to consolidate all non-render engines.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
drivers/gpu/drm/xe/xe_ring_ops.c | 104 +++++++++++----------------
2 files changed, 41 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 06cb6b02ec64..9eec8cfc98f3 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -88,6 +88,7 @@
#define CCS_AUX_INV XE_REG(0x4208)
#define VD0_AUX_INV XE_REG(0x4218)
+#define BCS_AUX_INV XE_REG(0x4248)
#define VE0_AUX_INV XE_REG(0x4238)
#define VE1_AUX_INV XE_REG(0x42b8)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index af0141c6f809..bb6fa56bd48e 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -248,44 +248,6 @@ static int emit_copy_timestamp(struct xe_lrc *lrc, u32 *dw, int i)
return i;
}
-/* for engines that don't require any special HW handling (no EUs, no aux inval, etc) */
-static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc,
- u64 batch_addr, u32 seqno)
-{
- u32 dw[MAX_JOB_SIZE_DW], i = 0;
- u32 ppgtt_flag = get_ppgtt_flag(job);
- struct xe_gt *gt = job->q->gt;
-
- i = emit_copy_timestamp(lrc, dw, i);
-
- if (job->ring_ops_flush_tlb) {
- dw[i++] = preparser_disable(true);
- i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
- seqno, MI_INVALIDATE_TLB, dw, i);
- dw[i++] = preparser_disable(false);
- } else {
- i = emit_store_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
- seqno, dw, i);
- }
-
- i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);
-
- if (job->user_fence.used) {
- i = emit_flush_dw(dw, i);
- i = emit_store_imm_ppgtt_posted(job->user_fence.addr,
- job->user_fence.value,
- dw, i);
- }
-
- i = emit_flush_imm_ggtt(xe_lrc_seqno_ggtt_addr(lrc), seqno, 0, dw, i);
-
- i = emit_user_interrupt(dw, i);
-
- xe_gt_assert(gt, i <= MAX_JOB_SIZE_DW);
-
- xe_lrc_write_ring(lrc, dw, i * sizeof(*dw));
-}
-
static bool has_aux_ccs(struct xe_device *xe)
{
/*
@@ -300,36 +262,50 @@ static bool has_aux_ccs(struct xe_device *xe)
return !xe->info.has_flat_ccs;
}
-static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
- u64 batch_addr, u32 seqno)
+static void __emit_job_gen12_xcs(struct xe_sched_job *job, struct xe_lrc *lrc,
+ u64 batch_addr, u32 seqno)
{
u32 dw[MAX_JOB_SIZE_DW], i = 0;
u32 ppgtt_flag = get_ppgtt_flag(job);
struct xe_gt *gt = job->q->gt;
struct xe_device *xe = gt_to_xe(gt);
- bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
+ const unsigned int class = job->q->class;
+ const bool aux_ccs = has_aux_ccs(xe) &&
+ (class == XE_ENGINE_CLASS_COPY ||
+ class == XE_ENGINE_CLASS_VIDEO_DECODE ||
+ class == XE_ENGINE_CLASS_VIDEO_ENHANCE);
+ const bool invalidate_tlb = aux_ccs || job->ring_ops_flush_tlb;
i = emit_copy_timestamp(lrc, dw, i);
- dw[i++] = preparser_disable(true);
-
- /* hsdes: 1809175790 */
- if (has_aux_ccs(xe)) {
- if (decode)
- i = emit_aux_table_inv(gt, VD0_AUX_INV, dw, i);
- else
- i = emit_aux_table_inv(gt, VE0_AUX_INV, dw, i);
- }
-
- if (job->ring_ops_flush_tlb)
+ if (invalidate_tlb) {
+ dw[i++] = preparser_disable(true);
i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
- seqno, MI_INVALIDATE_TLB, dw, i);
+ seqno,
+ MI_INVALIDATE_TLB,
+ dw, i);
+ /* hsdes: 1809175790 */
+ if (aux_ccs) {
+ struct xe_reg reg;
- dw[i++] = preparser_disable(false);
+ switch (job->q->class) {
+ case XE_ENGINE_CLASS_COPY:
+ reg = BCS_AUX_INV;
+ break;
+ case XE_ENGINE_CLASS_VIDEO_DECODE:
+ reg = VD0_AUX_INV;
+ break;
+ default:
+ reg = VE0_AUX_INV;
+ };
- if (!job->ring_ops_flush_tlb)
+ i = emit_aux_table_inv(gt, reg, dw, i);
+ }
+ dw[i++] = preparser_disable(false);
+ } else {
i = emit_store_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
seqno, dw, i);
+ }
i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);
@@ -445,9 +421,9 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
xe_gt_assert(gt, job->q->width <= 1); /* no parallel submission for GSCCS */
- __emit_job_gen12_simple(job, job->q->lrc[0],
- job->ptrs[0].batch_addr,
- xe_sched_job_lrc_seqno(job));
+ __emit_job_gen12_xcs(job, job->q->lrc[0],
+ job->ptrs[0].batch_addr,
+ xe_sched_job_lrc_seqno(job));
}
static void emit_job_gen12_copy(struct xe_sched_job *job)
@@ -461,9 +437,9 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
}
for (i = 0; i < job->q->width; ++i)
- __emit_job_gen12_simple(job, job->q->lrc[i],
- job->ptrs[i].batch_addr,
- xe_sched_job_lrc_seqno(job));
+ __emit_job_gen12_xcs(job, job->q->lrc[i],
+ job->ptrs[i].batch_addr,
+ xe_sched_job_lrc_seqno(job));
}
static void emit_job_gen12_video(struct xe_sched_job *job)
@@ -472,9 +448,9 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
/* FIXME: Not doing parallel handshake for now */
for (i = 0; i < job->q->width; ++i)
- __emit_job_gen12_video(job, job->q->lrc[i],
- job->ptrs[i].batch_addr,
- xe_sched_job_lrc_seqno(job));
+ __emit_job_gen12_xcs(job, job->q->lrc[i],
+ job->ptrs[i].batch_addr,
+ xe_sched_job_lrc_seqno(job));
}
static void emit_job_gen12_render_compute(struct xe_sched_job *job)
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 04/13] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (2 preceding siblings ...)
2025-09-23 10:07 ` [PATCH v12 03/13] drm/xe/xelp: Support auxccs invalidation on blitter Tvrtko Ursulin
@ 2025-09-23 10:07 ` Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 05/13] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
` (17 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:07 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin, Rodrigo Vivi
Emit MI_FLUSH_DW_CCS when invalidating on auxccs platforms.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_ring_ops.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index bb6fa56bd48e..2436ca40baa1 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -275,15 +275,16 @@ static void __emit_job_gen12_xcs(struct xe_sched_job *job, struct xe_lrc *lrc,
class == XE_ENGINE_CLASS_VIDEO_DECODE ||
class == XE_ENGINE_CLASS_VIDEO_ENHANCE);
const bool invalidate_tlb = aux_ccs || job->ring_ops_flush_tlb;
+ const u32 flags = aux_ccs && class == XE_ENGINE_CLASS_COPY ?
+ MI_FLUSH_DW_CCS : 0;
i = emit_copy_timestamp(lrc, dw, i);
if (invalidate_tlb) {
dw[i++] = preparser_disable(true);
i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
- seqno,
- MI_INVALIDATE_TLB,
- dw, i);
+ seqno, MI_INVALIDATE_TLB | flags, dw,
+ i);
/* hsdes: 1809175790 */
if (aux_ccs) {
struct xe_reg reg;
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 05/13] drm/xe/xelp: Wait for AuxCCS invalidation to complete
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (3 preceding siblings ...)
2025-09-23 10:07 ` [PATCH v12 04/13] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms Tvrtko Ursulin
@ 2025-09-23 10:07 ` Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 06/13] drm/xe: Export xe_emit_aux_table_inv Tvrtko Ursulin
` (16 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:07 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin, Rodrigo Vivi
On AuxCCS platforms we need to wait for AuxCCS invalidations to complete.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/instructions/xe_mi_commands.h | 6 ++++++
drivers/gpu/drm/xe/xe_ring_ops.c | 9 ++++++++-
drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +-
3 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
index c47b290e0e9f..49d8ffd026d5 100644
--- a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
@@ -81,4 +81,10 @@
#define MI_SET_APPID_SESSION_ID_MASK REG_GENMASK(6, 0)
#define MI_SET_APPID_SESSION_ID(x) REG_FIELD_PREP(MI_SET_APPID_SESSION_ID_MASK, x)
+#define MI_SEMAPHORE_WAIT_TOKEN (__MI_INSTR(0x1c) | XE_INSTR_NUM_DW(5)) /* XeLP+ */
+#define MI_SEMAPHORE_REGISTER_POLL REG_BIT(16)
+#define MI_SEMAPHORE_POLL REG_BIT(15)
+#define MI_SEMAPHORE_CMP_OP_MASK REG_GENMASK(14, 12)
+#define MI_SEMAPHORE_SAD_EQ_SDD REG_FIELD_PREP(MI_SEMAPHORE_CMP_OP_MASK, 4)
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 2436ca40baa1..d45aba5a382a 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -56,7 +56,14 @@ static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
dw[i++] = reg.addr + gt->mmio.adj_offset;
dw[i++] = AUX_INV;
- dw[i++] = MI_NOOP;
+ dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
+ MI_SEMAPHORE_REGISTER_POLL |
+ MI_SEMAPHORE_POLL |
+ MI_SEMAPHORE_SAD_EQ_SDD;
+ dw[i++] = 0;
+ dw[i++] = reg.addr + gt->mmio.adj_offset;
+ dw[i++] = 0;
+ dw[i++] = 0;
return i;
}
diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
index 477dc7defd72..1197fc0bf2af 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
@@ -8,7 +8,7 @@
struct xe_sched_job;
-#define MAX_JOB_SIZE_DW 70
+#define MAX_JOB_SIZE_DW 74
#define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
/**
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 06/13] drm/xe: Export xe_emit_aux_table_inv
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (4 preceding siblings ...)
2025-09-23 10:07 ` [PATCH v12 05/13] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
@ 2025-09-23 10:07 ` Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 07/13] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
` (15 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:07 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
Export the existing AuxCCS invalidation ring buffer programming helper
which we will need to use to setup the indirect context workaround in the
next patch.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/xe_ring_ops.c | 77 +++++++++++++++++++-------------
drivers/gpu/drm/xe/xe_ring_ops.h | 3 ++
2 files changed, 49 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index d45aba5a382a..9df99b8d2397 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -50,22 +50,51 @@ static u32 preparser_disable(bool state)
return MI_ARB_CHECK | BIT(8) | state;
}
-static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
- u32 *dw, int i)
+u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd)
{
- dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
- dw[i++] = reg.addr + gt->mmio.adj_offset;
- dw[i++] = AUX_INV;
- dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
- MI_SEMAPHORE_REGISTER_POLL |
- MI_SEMAPHORE_POLL |
- MI_SEMAPHORE_SAD_EQ_SDD;
- dw[i++] = 0;
- dw[i++] = reg.addr + gt->mmio.adj_offset;
- dw[i++] = 0;
- dw[i++] = 0;
+ struct xe_gt *gt = hwe->gt;
+ struct xe_reg reg;
- return i;
+ switch (hwe->class) {
+ case XE_ENGINE_CLASS_RENDER:
+ case XE_ENGINE_CLASS_COMPUTE:
+ reg = CCS_AUX_INV;
+ break;
+ case XE_ENGINE_CLASS_COPY:
+ reg = BCS_AUX_INV;
+ break;
+ case XE_ENGINE_CLASS_VIDEO_DECODE:
+ reg = VD0_AUX_INV;
+ break;
+ case XE_ENGINE_CLASS_VIDEO_ENHANCE:
+ reg = VE0_AUX_INV;
+ break;
+ default:
+ return cmd;
+ };
+
+ *cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) |
+ MI_LRI_MMIO_REMAP_EN;
+ *cmd++ = reg.addr + gt->mmio.adj_offset;
+ *cmd++ = AUX_INV;
+ *cmd++ = MI_SEMAPHORE_WAIT_TOKEN | MI_SEMAPHORE_REGISTER_POLL |
+ MI_SEMAPHORE_POLL | MI_SEMAPHORE_SAD_EQ_SDD;
+ *cmd++ = 0;
+ *cmd++ = reg.addr + gt->mmio.adj_offset;
+ *cmd++ = 0;
+ *cmd++ = 0;
+
+ return cmd;
+}
+
+static int emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *dw, int i)
+{
+ u32 *start, *end;
+
+ start = dw + i;
+ end = xe_emit_aux_table_inv(hwe, start);
+
+ return i + (end - start);
}
static int emit_user_interrupt(u32 *dw, int i)
@@ -293,22 +322,8 @@ static void __emit_job_gen12_xcs(struct xe_sched_job *job, struct xe_lrc *lrc,
seqno, MI_INVALIDATE_TLB | flags, dw,
i);
/* hsdes: 1809175790 */
- if (aux_ccs) {
- struct xe_reg reg;
-
- switch (job->q->class) {
- case XE_ENGINE_CLASS_COPY:
- reg = BCS_AUX_INV;
- break;
- case XE_ENGINE_CLASS_VIDEO_DECODE:
- reg = VD0_AUX_INV;
- break;
- default:
- reg = VE0_AUX_INV;
- };
-
- i = emit_aux_table_inv(gt, reg, dw, i);
- }
+ if (aux_ccs)
+ i = emit_aux_table_inv(job->q->hwe, dw, i);
dw[i++] = preparser_disable(false);
} else {
i = emit_store_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
@@ -365,7 +380,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
/* hsdes: 1809175790 */
if (aux_ccs)
- i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
+ i = emit_aux_table_inv(job->q->hwe, dw, i);
dw[i++] = preparser_disable(false);
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.h b/drivers/gpu/drm/xe/xe_ring_ops.h
index e942735d76a6..5a2d32f9bb25 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops.h
@@ -10,8 +10,11 @@
#include "xe_ring_ops_types.h"
struct xe_gt;
+struct xe_hw_engine;
const struct xe_ring_ops *
xe_ring_ops_get(struct xe_gt *gt, enum xe_engine_class class);
+u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd);
+
#endif
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 07/13] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (5 preceding siblings ...)
2025-09-23 10:07 ` [PATCH v12 06/13] drm/xe: Export xe_emit_aux_table_inv Tvrtko Ursulin
@ 2025-09-23 10:08 ` Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 08/13] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
` (14 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:08 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
Following from the i915 reference implementation, we add the AuxCCS
invalidation to the indirect context workarounds page.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/xe_lrc.c | 38 +++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 47e9df775072..4204d5811254 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -27,6 +27,7 @@
#include "xe_map.h"
#include "xe_memirq.h"
#include "xe_mmio.h"
+#include "xe_ring_ops.h"
#include "xe_sriov.h"
#include "xe_trace_lrc.h"
#include "xe_vm.h"
@@ -88,6 +89,16 @@ gt_engine_needs_indirect_ctx(struct xe_gt *gt, enum xe_engine_class class)
class, NULL))
return true;
+ /* AuxCCS invalidation */
+ if (GRAPHICS_VERx100(xe) >= 1200 &&
+ GRAPHICS_VERx100(xe) <= 1210 &&
+ (class == XE_ENGINE_CLASS_RENDER ||
+ class == XE_ENGINE_CLASS_COMPUTE ||
+ class == XE_ENGINE_CLASS_COPY ||
+ class == XE_ENGINE_CLASS_VIDEO_DECODE ||
+ class == XE_ENGINE_CLASS_VIDEO_ENHANCE))
+ return true;
+
return false;
}
@@ -1188,6 +1199,31 @@ static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
return cmd - batch;
}
+static ssize_t setup_invalidate_auxccs_wa(struct xe_lrc *lrc,
+ struct xe_hw_engine *hwe,
+ u32 *batch, size_t max_len)
+{
+ struct xe_gt *gt = lrc->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+ const unsigned int class = hwe->class;
+ u32 *cmd;
+
+ if (GRAPHICS_VERx100(xe) < 1200 || GRAPHICS_VERx100(xe) > 1210 ||
+ !(class == XE_ENGINE_CLASS_RENDER ||
+ class == XE_ENGINE_CLASS_COMPUTE ||
+ class == XE_ENGINE_CLASS_COPY ||
+ class == XE_ENGINE_CLASS_VIDEO_DECODE ||
+ class == XE_ENGINE_CLASS_VIDEO_ENHANCE))
+ return 0;
+
+ if (xe_gt_WARN_ON(gt, max_len < 8))
+ return -ENOSPC;
+
+ cmd = xe_emit_aux_table_inv(hwe, batch);
+
+ return cmd - batch;
+}
+
struct bo_setup {
ssize_t (*setup)(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
u32 *batch, size_t max_size);
@@ -1319,9 +1355,11 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
static const struct bo_setup rcs_funcs[] = {
{ .setup = setup_timestamp_wa },
{ .setup = setup_configfs_mid_ctx_restore_bb },
+ { .setup = setup_invalidate_auxccs_wa },
};
static const struct bo_setup xcs_funcs[] = {
{ .setup = setup_configfs_mid_ctx_restore_bb },
+ { .setup = setup_invalidate_auxccs_wa },
};
struct bo_setup_state state = {
.lrc = lrc,
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 08/13] drm/xe: Flush GGTT writes after populating DPT
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (6 preceding siblings ...)
2025-09-23 10:08 ` [PATCH v12 07/13] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
@ 2025-09-23 10:08 ` Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 09/13] drm/xe: Handle DPT in system memory Tvrtko Ursulin
` (13 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:08 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin, Ville Syrjälä
When DPT is placed in stolen it is populated using ioremap_wc() via GGTT.
I915 has established that on modern platforms a small flush and delay is
required for those writes to reliably land so lets add the same logic
(simplified by removing impossible platforms) to xe as well.
v2:
* Do it only for system memory buffers.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 45 ++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 1fd4a815e784..8ee0e6ff323c 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -12,9 +12,11 @@
#include "intel_fb.h"
#include "intel_fb_pin.h"
#include "intel_fbdev.h"
+#include "regs/xe_engine_regs.h"
#include "xe_bo.h"
#include "xe_device.h"
#include "xe_ggtt.h"
+#include "xe_mmio.h"
#include "xe_pm.h"
#include "xe_vram_types.h"
@@ -79,6 +81,46 @@ write_dpt_remapped(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
*dpt_ofs = ALIGN(*dpt_ofs, 4096);
}
+static void gt_flush_ggtt_writes(struct xe_gt *gt)
+{
+ if (!gt)
+ return;
+
+ xe_mmio_read32(>->mmio, RING_TAIL(RENDER_RING_BASE));
+}
+
+static void ggtt_flush_writes(struct xe_ggtt *ggtt)
+{
+ struct xe_device *xe = tile_to_xe(ggtt->tile);
+
+ /*
+ * No actual flushing is required for the GTT write domain for reads
+ * from the GTT domain. Writes to it "immediately" go to main memory
+ * as far as we know, so there's no chipset flush. It also doesn't
+ * land in the GPU render cache.
+ *
+ * However, we do have to enforce the order so that all writes through
+ * the GTT land before any writes to the device, such as updates to
+ * the GATT itself.
+ *
+ * We also have to wait a bit for the writes to land from the GTT.
+ * An uncached read (i.e. mmio) seems to be ideal for the round-trip
+ * timing. This issue has only been observed when switching quickly
+ * between GTT writes and CPU reads from inside the kernel on recent hw,
+ * and it appears to only affect discrete GTT blocks (i.e. on LLC
+ * system agents we cannot reproduce this behaviour, until Cannonlake
+ * that was!).
+ */
+
+ wmb();
+
+ if (xe_pm_runtime_get_if_active(xe)) {
+ gt_flush_ggtt_writes(ggtt->tile->primary_gt);
+ gt_flush_ggtt_writes(ggtt->tile->media_gt);
+ xe_pm_runtime_put(xe);
+ }
+}
+
static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
const struct i915_gtt_view *view,
struct i915_vma *vma,
@@ -162,6 +204,9 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
rot_info->plane[i].dst_stride);
}
+ if (dpt->vmap.is_iomem && !xe_bo_is_vram(dpt))
+ ggtt_flush_writes(tile0->mem.ggtt);
+
vma->dpt = dpt;
vma->node = dpt->ggtt_node[tile0->id];
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 09/13] drm/xe: Handle DPT in system memory
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (7 preceding siblings ...)
2025-09-23 10:08 ` [PATCH v12 08/13] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
@ 2025-09-23 10:08 ` Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 10/13] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
` (12 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:08 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
If DPT is allocated from system memory it will be created in the default
write-back cached mode. This means we need to flush it after populating
otherwise nothing works.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 8ee0e6ff323c..fa62312ed9fe 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -3,6 +3,7 @@
* Copyright © 2021 Intel Corporation
*/
+#include <drm/drm_cache.h>
#include <drm/ttm/ttm_bo.h>
#include "i915_vma.h"
@@ -206,6 +207,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
if (dpt->vmap.is_iomem && !xe_bo_is_vram(dpt))
ggtt_flush_writes(tile0->mem.ggtt);
+ else if (!xe_bo_is_vram(dpt) && !xe_bo_is_stolen(dpt))
+ drm_clflush_virt_range(dpt->vmap.vaddr, dpt_size);
vma->dpt = dpt;
vma->node = dpt->ggtt_node[tile0->id];
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 10/13] drm/xe/display: Add support for AuxCCS
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (8 preceding siblings ...)
2025-09-23 10:08 ` [PATCH v12 09/13] drm/xe: Handle DPT in system memory Tvrtko Ursulin
@ 2025-09-23 10:08 ` Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
` (11 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:08 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin, Juha-Pekka Heikkila, Michael J. Ruhl
Add support for mapping the auxiliary CCS buffer into the DPT page tables.
This will allow for more power efficiency by enabling the render
compression frame buffer modifiers such as
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS in a following patch.
We do this by refactoring the code a bit so handling for the linear
auxiliary frame buffer can be added in a tidy way. Also replace some
hardcoded constants.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 111 ++++++++++++++++++-------
1 file changed, 81 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index fa62312ed9fe..d8aa23b8cf14 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -53,33 +53,94 @@ write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_
*dpt_ofs = ALIGN(*dpt_ofs, 4096);
}
+static unsigned int
+write_dpt_padding(struct iosys_map *map, unsigned int dest, unsigned int pad)
+{
+ /* The DE ignores the PTEs for the padding tiles */
+ return dest + pad * sizeof(u64);
+}
+
+static unsigned int
+write_dpt_remapped_linear(struct xe_bo *bo, struct iosys_map *map,
+ unsigned int dest,
+ const struct intel_remapped_plane_info *plane)
+{
+ struct xe_device *xe = xe_bo_device(bo);
+ struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+ const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
+ xe->pat.idx[XE_CACHE_NONE]);
+ unsigned int offset = plane->offset * XE_PAGE_SIZE;
+ unsigned int size = plane->size;
+
+ while (size--) {
+ u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
+
+ iosys_map_wr(map, dest, u64, addr | pte);
+ dest += sizeof(u64);
+ offset += XE_PAGE_SIZE;
+ }
+
+ return dest;
+}
+
+static unsigned int
+write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map,
+ unsigned int dest,
+ const struct intel_remapped_plane_info *plane)
+{
+ struct xe_device *xe = xe_bo_device(bo);
+ struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+ const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
+ xe->pat.idx[XE_CACHE_NONE]);
+ unsigned int offset, column, row;
+
+ for (row = 0; row < plane->height; row++) {
+ offset = (plane->offset + plane->src_stride * row) *
+ XE_PAGE_SIZE;
+
+ for (column = 0; column < plane->width; column++) {
+ u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
+
+ iosys_map_wr(map, dest, u64, addr | pte);
+ dest += sizeof(u64);
+ offset += XE_PAGE_SIZE;
+ }
+
+ dest = write_dpt_padding(map, dest,
+ plane->dst_stride - plane->width);
+ }
+
+ return dest;
+}
+
static void
-write_dpt_remapped(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
- u32 bo_ofs, u32 width, u32 height, u32 src_stride,
- u32 dst_stride)
+write_dpt_remapped(struct xe_bo *bo,
+ const struct intel_remapped_info *remap_info,
+ struct iosys_map *map)
{
- struct xe_device *xe = xe_bo_device(bo);
- struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
- u32 column, row;
- u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo, xe->pat.idx[XE_CACHE_NONE]);
+ unsigned int i, dest = 0;
- for (row = 0; row < height; row++) {
- u32 src_idx = src_stride * row + bo_ofs;
+ for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++) {
+ const struct intel_remapped_plane_info *plane =
+ &remap_info->plane[i];
- for (column = 0; column < width; column++) {
- u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
- iosys_map_wr(map, *dpt_ofs, u64, pte | addr);
+ if (!plane->width && !plane->height && !plane->linear)
+ continue;
- *dpt_ofs += 8;
- src_idx++;
+ if (remap_info->plane_alignment) {
+ const unsigned int index = dest / sizeof(u64);
+ const unsigned int pad =
+ ALIGN(index, remap_info->plane_alignment) -
+ index;
+
+ dest = write_dpt_padding(map, dest, pad);
}
- /* The DE ignores the PTEs for the padding tiles */
- *dpt_ofs += (dst_stride - width) * 8;
+ if (plane->linear)
+ dest = write_dpt_remapped_linear(bo, map, dest, plane);
+ else
+ dest = write_dpt_remapped_tiled(bo, map, dest, plane);
}
-
- /* Align to next page */
- *dpt_ofs = ALIGN(*dpt_ofs, 4096);
}
static void gt_flush_ggtt_writes(struct xe_gt *gt)
@@ -181,17 +242,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
iosys_map_wr(&dpt->vmap, x * 8, u64, pte | addr);
}
} else if (view->type == I915_GTT_VIEW_REMAPPED) {
- const struct intel_remapped_info *remap_info = &view->remapped;
- u32 i, dpt_ofs = 0;
-
- for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++)
- write_dpt_remapped(bo, &dpt->vmap, &dpt_ofs,
- remap_info->plane[i].offset,
- remap_info->plane[i].width,
- remap_info->plane[i].height,
- remap_info->plane[i].src_stride,
- remap_info->plane[i].dst_stride);
-
+ write_dpt_remapped(bo, &view->remapped, &dpt->vmap);
} else {
const struct intel_rotation_info *rot_info = &view->rotated;
u32 i, dpt_ofs = 0;
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (9 preceding siblings ...)
2025-09-23 10:08 ` [PATCH v12 10/13] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
@ 2025-09-23 10:08 ` Tvrtko Ursulin
2025-09-23 10:19 ` Ville Syrjälä
2025-09-23 10:44 ` [PATCH v13 " Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 12/13] drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS Tvrtko Ursulin
` (10 subsequent siblings)
21 siblings, 2 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:08 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
Even though frame buffer objects are created as write-combined, in
practice, on top of all the ring buffer flushing, an additional clflush
seems to be needed before display engine can coherently scan out the
AuxCCS compressed data without transient artifacts.
If for comparison we look at how i915 handles things (where AuxCCS works
fine), as it happens it has this same clflush before a frame buffer is
pinned for display for the first time, courtesy the dynamic tracking of
the buffer cache mode and setting the latter to uncached before handing
to display.
Since xe considers the buffer object caching mode as static we can
implement the same approach by adding a flag telling us if the buffer
was ever pinned for display and flush on the first pin. Subsequent re-pins
will not repeat the clflush but so far I have not observed any glitching
after the first pin.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
2 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index d8aa23b8cf14..f247c0da6b9e 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
struct xe_bo *bo = gem_to_xe_bo(obj);
struct xe_validation_ctx ctx;
struct drm_exec exec;
+ bool first_pin;
int ret = 0;
if (!vma)
@@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
ret = xe_bo_validate(bo, NULL, true, &exec);
drm_exec_retry_on_contention(&exec);
xe_validation_retry_on_oom(&ctx, &ret);
- if (!ret)
+ if (!ret) {
ttm_bo_pin(&bo->ttm);
+ first_pin = !bo->display_pin;
+ bo->display_pin = true;
+ }
}
if (ret)
goto err;
@@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
if (ret)
goto err_unpin;
+ /*
+ * Force flush frame buffer data for non-coherent display access when
+ * AuxCCS formats are used.
+ */
+ if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
+ intel_fb_is_ccs_modifier(fb->base.modifier))
+ drm_clflush_sg(xe_bo_sg(bo));
+
return vma;
err_unpin:
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index d4fe3c8dca5b..8119d8d6d174 100644
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@ -81,11 +81,6 @@ struct xe_bo {
struct llist_node freed;
/** @update_index: Update index if PT BO */
int update_index;
- /** @created: Whether the bo has passed initial creation */
- bool created;
-
- /** @ccs_cleared: true means that CCS region of BO is already cleared */
- bool ccs_cleared;
/** @bb_ccs: BB instructions of CCS read/write. Valid only for VF */
struct xe_bb *bb_ccs[XE_SRIOV_VF_CCS_CTX_COUNT];
@@ -100,6 +95,15 @@ struct xe_bo {
/** @devmem_allocation: SVM device memory allocation */
struct drm_pagemap_devmem devmem_allocation;
+ /** @created: Whether the bo has passed initial creation */
+ bool created : 1;
+
+ /** @ccs_cleared */
+ bool ccs_cleared : 1;
+
+ /** @display_pin: Was it ever pinned to display */
+ bool display_pin : 1;
+
/** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
struct list_head vram_userfault_link;
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 12/13] drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (10 preceding siblings ...)
2025-09-23 10:08 ` [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
@ 2025-09-23 10:08 ` Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 13/13] drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe Tvrtko Ursulin
` (9 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:08 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
With DPT in stolen memory there are occasional pipe crc IGT failures in
tests such as kms_flip_tiling. Allocate a normal system memory object
instead.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index f247c0da6b9e..9fb2ec1d5677 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -183,6 +183,20 @@ static void ggtt_flush_writes(struct xe_ggtt *ggtt)
}
}
+static bool try_dpt_stolen(const struct intel_framebuffer *fb, struct xe_bo *bo)
+{
+ /*
+ * XXX: DPT in stolen memory on IGFX platforms (at least Alderlake)
+ * suffers from occasional pipe crc IGT failures in tests such as
+ * kms_flip_tiling.
+ */
+ if (intel_fb_is_ccs_modifier(fb->base.modifier) &&
+ !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo))
+ return false;
+
+ return true;
+}
+
static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
const struct i915_gtt_view *view,
struct i915_vma *vma,
@@ -192,7 +206,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
struct xe_tile *tile0 = xe_device_get_root_tile(xe);
struct xe_ggtt *ggtt = tile0->mem.ggtt;
struct drm_gem_object *obj = intel_fb_bo(&fb->base);
- struct xe_bo *bo = gem_to_xe_bo(obj), *dpt;
+ struct xe_bo *bo = gem_to_xe_bo(obj), *dpt = ERR_PTR(-EINVAL);
u32 dpt_size, size = bo->ttm.base.size;
if (view->type == I915_GTT_VIEW_NORMAL)
@@ -213,7 +227,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
XE_BO_FLAG_GGTT |
XE_BO_FLAG_PAGETABLE,
alignment, false);
- else
+ else if (try_dpt_stolen(fb, bo))
dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
dpt_size, ~0ull,
ttm_bo_type_kernel,
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v12 13/13] drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (11 preceding siblings ...)
2025-09-23 10:08 ` [PATCH v12 12/13] drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS Tvrtko Ursulin
@ 2025-09-23 10:08 ` Tvrtko Ursulin
2025-09-23 10:15 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev15) Patchwork
` (8 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:08 UTC (permalink / raw)
To: intel-xe
Cc: kernel-dev, Tvrtko Ursulin, José Roberto de Souza,
Juha-Pekka Heikkila, Rodrigo Vivi
Now that we have fixed the DPT handling we can undo the nerf which was
done in cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if
built for Xe").
Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
[PLANE:32:plane 1A]: type=PRI
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
Display working fine - no artefacts, no DMAR/PIPE faults.
v2:
* Adjust patch title. (Rodrigo)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index e13fb781e7b2..068c44de2965 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2929,12 +2929,6 @@ skl_universal_plane_create(struct intel_display *display,
else
caps = skl_plane_caps(display, pipe, plane_id);
- /* FIXME: xe has problems with AUX */
- if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(to_i915(display->drm)))
- caps &= ~(INTEL_PLANE_CAP_CCS_RC |
- INTEL_PLANE_CAP_CCS_RC_CC |
- INTEL_PLANE_CAP_CCS_MC);
-
modifiers = intel_fb_plane_get_modifiers(display, caps);
ret = drm_universal_plane_init(display->drm, &plane->base,
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev15)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (12 preceding siblings ...)
2025-09-23 10:08 ` [PATCH v12 13/13] drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe Tvrtko Ursulin
@ 2025-09-23 10:15 ` Patchwork
2025-09-23 10:16 ` ✓ CI.KUnit: success " Patchwork
` (7 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 10:15 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev15)
URL : https://patchwork.freedesktop.org/series/144186/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 6b35aff7342a65d4021d778154346840480fea93
Author: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Date: Tue Sep 23 11:08:06 2025 +0100
drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
Now that we have fixed the DPT handling we can undo the nerf which was
done in cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if
built for Xe").
Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
[PLANE:32:plane 1A]: type=PRI
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
Display working fine - no artefacts, no DMAR/PIPE faults.
v2:
* Adjust patch title. (Rodrigo)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+ /mt/dim checkpatch d2f002c868da5926fabd73b1ba2ab7a2b66d81dc drm-intel
3ddaf658183d drm/xe/xelpg: Flush CCS when flushing caches
8a578cff792e drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
867eb7521a02 drm/xe/xelp: Support auxccs invalidation on blitter
b85de452bf2a drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms
d45b23dfe779 drm/xe/xelp: Wait for AuxCCS invalidation to complete
c57d62ce4c30 drm/xe: Export xe_emit_aux_table_inv
2384cefe2429 drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds
e179e5248979 drm/xe: Flush GGTT writes after populating DPT
-:72: WARNING:MEMORY_BARRIER: memory barrier without comment
#72: FILE: drivers/gpu/drm/xe/display/xe_fb_pin.c:115:
+ wmb();
total: 0 errors, 1 warnings, 0 checks, 66 lines checked
cee1a19d14ff drm/xe: Handle DPT in system memory
3311b308d2b8 drm/xe/display: Add support for AuxCCS
b010a90fe7d6 drm/xe: Force flush system memory AuxCCS framebuffers before scan out
a16b2c8c7c81 drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS
6b35aff7342a drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
-:10: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")'
#10:
done in cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if
-:16: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#16:
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
total: 1 errors, 1 warnings, 0 checks, 12 lines checked
^ permalink raw reply [flat|nested] 45+ messages in thread
* ✓ CI.KUnit: success for AuxCCS handling and render compression modifiers (rev15)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (13 preceding siblings ...)
2025-09-23 10:15 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev15) Patchwork
@ 2025-09-23 10:16 ` Patchwork
2025-09-23 11:15 ` ✓ Xe.CI.BAT: " Patchwork
` (6 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 10:16 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev15)
URL : https://patchwork.freedesktop.org/series/144186/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:15:21] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:15:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:15:54] Starting KUnit Kernel (1/1)...
[10:15:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:15:55] ================== guc_buf (11 subtests) ===================
[10:15:55] [PASSED] test_smallest
[10:15:55] [PASSED] test_largest
[10:15:55] [PASSED] test_granular
[10:15:55] [PASSED] test_unique
[10:15:55] [PASSED] test_overlap
[10:15:55] [PASSED] test_reusable
[10:15:55] [PASSED] test_too_big
[10:15:55] [PASSED] test_flush
[10:15:55] [PASSED] test_lookup
[10:15:55] [PASSED] test_data
[10:15:55] [PASSED] test_class
[10:15:55] ===================== [PASSED] guc_buf =====================
[10:15:55] =================== guc_dbm (7 subtests) ===================
[10:15:55] [PASSED] test_empty
[10:15:55] [PASSED] test_default
[10:15:55] ======================== test_size ========================
[10:15:55] [PASSED] 4
[10:15:55] [PASSED] 8
[10:15:55] [PASSED] 32
[10:15:55] [PASSED] 256
[10:15:55] ==================== [PASSED] test_size ====================
[10:15:55] ======================= test_reuse ========================
[10:15:55] [PASSED] 4
[10:15:55] [PASSED] 8
[10:15:55] [PASSED] 32
[10:15:55] [PASSED] 256
[10:15:55] =================== [PASSED] test_reuse ====================
[10:15:55] =================== test_range_overlap ====================
[10:15:55] [PASSED] 4
[10:15:55] [PASSED] 8
[10:15:55] [PASSED] 32
[10:15:55] [PASSED] 256
[10:15:55] =============== [PASSED] test_range_overlap ================
[10:15:55] =================== test_range_compact ====================
[10:15:55] [PASSED] 4
[10:15:55] [PASSED] 8
[10:15:55] [PASSED] 32
[10:15:55] [PASSED] 256
[10:15:55] =============== [PASSED] test_range_compact ================
[10:15:55] ==================== test_range_spare =====================
[10:15:55] [PASSED] 4
[10:15:55] [PASSED] 8
[10:15:55] [PASSED] 32
[10:15:55] [PASSED] 256
[10:15:55] ================ [PASSED] test_range_spare =================
[10:15:55] ===================== [PASSED] guc_dbm =====================
[10:15:55] =================== guc_idm (6 subtests) ===================
[10:15:55] [PASSED] bad_init
[10:15:55] [PASSED] no_init
[10:15:55] [PASSED] init_fini
[10:15:55] [PASSED] check_used
[10:15:55] [PASSED] check_quota
[10:15:55] [PASSED] check_all
[10:15:55] ===================== [PASSED] guc_idm =====================
[10:15:55] ================== no_relay (3 subtests) ===================
[10:15:55] [PASSED] xe_drops_guc2pf_if_not_ready
[10:15:55] [PASSED] xe_drops_guc2vf_if_not_ready
[10:15:55] [PASSED] xe_rejects_send_if_not_ready
[10:15:55] ==================== [PASSED] no_relay =====================
[10:15:55] ================== pf_relay (14 subtests) ==================
[10:15:55] [PASSED] pf_rejects_guc2pf_too_short
[10:15:55] [PASSED] pf_rejects_guc2pf_too_long
[10:15:55] [PASSED] pf_rejects_guc2pf_no_payload
[10:15:55] [PASSED] pf_fails_no_payload
[10:15:55] [PASSED] pf_fails_bad_origin
[10:15:55] [PASSED] pf_fails_bad_type
[10:15:55] [PASSED] pf_txn_reports_error
[10:15:55] [PASSED] pf_txn_sends_pf2guc
[10:15:55] [PASSED] pf_sends_pf2guc
[10:15:55] [SKIPPED] pf_loopback_nop
[10:15:55] [SKIPPED] pf_loopback_echo
[10:15:55] [SKIPPED] pf_loopback_fail
[10:15:55] [SKIPPED] pf_loopback_busy
[10:15:55] [SKIPPED] pf_loopback_retry
[10:15:55] ==================== [PASSED] pf_relay =====================
[10:15:55] ================== vf_relay (3 subtests) ===================
[10:15:55] [PASSED] vf_rejects_guc2vf_too_short
[10:15:55] [PASSED] vf_rejects_guc2vf_too_long
[10:15:55] [PASSED] vf_rejects_guc2vf_no_payload
[10:15:55] ==================== [PASSED] vf_relay =====================
[10:15:55] ===================== lmtt (1 subtest) =====================
[10:15:55] ======================== test_ops =========================
[10:15:55] [PASSED] 2-level
[10:15:55] [PASSED] multi-level
[10:15:55] ==================== [PASSED] test_ops =====================
[10:15:55] ====================== [PASSED] lmtt =======================
[10:15:55] ================= pf_service (11 subtests) =================
[10:15:55] [PASSED] pf_negotiate_any
[10:15:55] [PASSED] pf_negotiate_base_match
[10:15:55] [PASSED] pf_negotiate_base_newer
[10:15:55] [PASSED] pf_negotiate_base_next
[10:15:55] [SKIPPED] pf_negotiate_base_older
[10:15:55] [PASSED] pf_negotiate_base_prev
[10:15:55] [PASSED] pf_negotiate_latest_match
[10:15:55] [PASSED] pf_negotiate_latest_newer
[10:15:55] [PASSED] pf_negotiate_latest_next
[10:15:55] [SKIPPED] pf_negotiate_latest_older
[10:15:55] [SKIPPED] pf_negotiate_latest_prev
[10:15:55] =================== [PASSED] pf_service ====================
[10:15:55] ================= xe_guc_g2g (2 subtests) ==================
[10:15:55] ============== xe_live_guc_g2g_kunit_default ==============
[10:15:55] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:15:55] ============== xe_live_guc_g2g_kunit_allmem ===============
[10:15:55] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:15:55] =================== [SKIPPED] xe_guc_g2g ===================
[10:15:55] =================== xe_mocs (2 subtests) ===================
[10:15:55] ================ xe_live_mocs_kernel_kunit ================
[10:15:55] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:15:55] ================ xe_live_mocs_reset_kunit =================
[10:15:55] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:15:55] ==================== [SKIPPED] xe_mocs =====================
[10:15:55] ================= xe_migrate (2 subtests) ==================
[10:15:55] ================= xe_migrate_sanity_kunit =================
[10:15:55] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:15:55] ================== xe_validate_ccs_kunit ==================
[10:15:55] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:15:55] =================== [SKIPPED] xe_migrate ===================
[10:15:55] ================== xe_dma_buf (1 subtest) ==================
[10:15:55] ==================== xe_dma_buf_kunit =====================
[10:15:55] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:15:55] =================== [SKIPPED] xe_dma_buf ===================
[10:15:55] ================= xe_bo_shrink (1 subtest) =================
[10:15:55] =================== xe_bo_shrink_kunit ====================
[10:15:55] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:15:55] ================== [SKIPPED] xe_bo_shrink ==================
[10:15:55] ==================== xe_bo (2 subtests) ====================
[10:15:55] ================== xe_ccs_migrate_kunit ===================
[10:15:55] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:15:55] ==================== xe_bo_evict_kunit ====================
[10:15:55] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:15:55] ===================== [SKIPPED] xe_bo ======================
[10:15:55] ==================== args (11 subtests) ====================
[10:15:55] [PASSED] count_args_test
[10:15:55] [PASSED] call_args_example
[10:15:55] [PASSED] call_args_test
[10:15:55] [PASSED] drop_first_arg_example
[10:15:55] [PASSED] drop_first_arg_test
[10:15:55] [PASSED] first_arg_example
[10:15:55] [PASSED] first_arg_test
[10:15:55] [PASSED] last_arg_example
[10:15:55] [PASSED] last_arg_test
[10:15:55] [PASSED] pick_arg_example
[10:15:55] [PASSED] sep_comma_example
[10:15:55] ====================== [PASSED] args =======================
[10:15:55] =================== xe_pci (3 subtests) ====================
[10:15:55] ==================== check_graphics_ip ====================
[10:15:55] [PASSED] 12.00 Xe_LP
[10:15:55] [PASSED] 12.10 Xe_LP+
[10:15:55] [PASSED] 12.55 Xe_HPG
[10:15:55] [PASSED] 12.60 Xe_HPC
[10:15:55] [PASSED] 12.70 Xe_LPG
[10:15:55] [PASSED] 12.71 Xe_LPG
[10:15:55] [PASSED] 12.74 Xe_LPG+
[10:15:55] [PASSED] 20.01 Xe2_HPG
[10:15:55] [PASSED] 20.02 Xe2_HPG
[10:15:55] [PASSED] 20.04 Xe2_LPG
[10:15:55] [PASSED] 30.00 Xe3_LPG
[10:15:55] [PASSED] 30.01 Xe3_LPG
[10:15:55] [PASSED] 30.03 Xe3_LPG
[10:15:55] ================ [PASSED] check_graphics_ip ================
[10:15:55] ===================== check_media_ip ======================
[10:15:55] [PASSED] 12.00 Xe_M
[10:15:55] [PASSED] 12.55 Xe_HPM
[10:15:55] [PASSED] 13.00 Xe_LPM+
[10:15:55] [PASSED] 13.01 Xe2_HPM
[10:15:55] [PASSED] 20.00 Xe2_LPM
[10:15:55] [PASSED] 30.00 Xe3_LPM
[10:15:55] [PASSED] 30.02 Xe3_LPM
[10:15:55] ================= [PASSED] check_media_ip ==================
[10:15:55] ================= check_platform_gt_count =================
[10:15:55] [PASSED] 0x9A60 (TIGERLAKE)
[10:15:55] [PASSED] 0x9A68 (TIGERLAKE)
[10:15:55] [PASSED] 0x9A70 (TIGERLAKE)
[10:15:55] [PASSED] 0x9A40 (TIGERLAKE)
[10:15:55] [PASSED] 0x9A49 (TIGERLAKE)
[10:15:55] [PASSED] 0x9A59 (TIGERLAKE)
[10:15:55] [PASSED] 0x9A78 (TIGERLAKE)
[10:15:55] [PASSED] 0x9AC0 (TIGERLAKE)
[10:15:55] [PASSED] 0x9AC9 (TIGERLAKE)
[10:15:55] [PASSED] 0x9AD9 (TIGERLAKE)
[10:15:55] [PASSED] 0x9AF8 (TIGERLAKE)
[10:15:55] [PASSED] 0x4C80 (ROCKETLAKE)
[10:15:55] [PASSED] 0x4C8A (ROCKETLAKE)
[10:15:55] [PASSED] 0x4C8B (ROCKETLAKE)
[10:15:55] [PASSED] 0x4C8C (ROCKETLAKE)
[10:15:55] [PASSED] 0x4C90 (ROCKETLAKE)
[10:15:55] [PASSED] 0x4C9A (ROCKETLAKE)
[10:15:55] [PASSED] 0x4680 (ALDERLAKE_S)
[10:15:55] [PASSED] 0x4682 (ALDERLAKE_S)
[10:15:55] [PASSED] 0x4688 (ALDERLAKE_S)
[10:15:55] [PASSED] 0x468A (ALDERLAKE_S)
[10:15:55] [PASSED] 0x468B (ALDERLAKE_S)
[10:15:55] [PASSED] 0x4690 (ALDERLAKE_S)
[10:15:55] [PASSED] 0x4692 (ALDERLAKE_S)
[10:15:55] [PASSED] 0x4693 (ALDERLAKE_S)
[10:15:55] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46AA (ALDERLAKE_P)
[10:15:55] [PASSED] 0x462A (ALDERLAKE_P)
[10:15:55] [PASSED] 0x4626 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x4628 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:15:55] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:15:55] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:15:55] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:15:55] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:15:55] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:15:55] [PASSED] 0xA721 (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA720 (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:15:55] [PASSED] 0xA780 (ALDERLAKE_S)
[10:15:55] [PASSED] 0xA781 (ALDERLAKE_S)
[10:15:55] [PASSED] 0xA782 (ALDERLAKE_S)
[10:15:55] [PASSED] 0xA783 (ALDERLAKE_S)
[10:15:55] [PASSED] 0xA788 (ALDERLAKE_S)
[10:15:55] [PASSED] 0xA789 (ALDERLAKE_S)
[10:15:55] [PASSED] 0xA78A (ALDERLAKE_S)
[10:15:55] [PASSED] 0xA78B (ALDERLAKE_S)
[10:15:55] [PASSED] 0x4905 (DG1)
[10:15:55] [PASSED] 0x4906 (DG1)
[10:15:55] [PASSED] 0x4907 (DG1)
[10:15:55] [PASSED] 0x4908 (DG1)
[10:15:55] [PASSED] 0x4909 (DG1)
[10:15:55] [PASSED] 0x56C0 (DG2)
[10:15:55] [PASSED] 0x56C2 (DG2)
[10:15:55] [PASSED] 0x56C1 (DG2)
[10:15:55] [PASSED] 0x7D51 (METEORLAKE)
[10:15:55] [PASSED] 0x7DD1 (METEORLAKE)
[10:15:55] [PASSED] 0x7D41 (METEORLAKE)
[10:15:55] [PASSED] 0x7D67 (METEORLAKE)
[10:15:55] [PASSED] 0xB640 (METEORLAKE)
[10:15:55] [PASSED] 0x56A0 (DG2)
[10:15:55] [PASSED] 0x56A1 (DG2)
[10:15:55] [PASSED] 0x56A2 (DG2)
[10:15:55] [PASSED] 0x56BE (DG2)
[10:15:55] [PASSED] 0x56BF (DG2)
[10:15:55] [PASSED] 0x5690 (DG2)
[10:15:55] [PASSED] 0x5691 (DG2)
[10:15:55] [PASSED] 0x5692 (DG2)
[10:15:55] [PASSED] 0x56A5 (DG2)
[10:15:55] [PASSED] 0x56A6 (DG2)
[10:15:55] [PASSED] 0x56B0 (DG2)
[10:15:55] [PASSED] 0x56B1 (DG2)
[10:15:55] [PASSED] 0x56BA (DG2)
[10:15:55] [PASSED] 0x56BB (DG2)
[10:15:55] [PASSED] 0x56BC (DG2)
[10:15:55] [PASSED] 0x56BD (DG2)
[10:15:55] [PASSED] 0x5693 (DG2)
[10:15:55] [PASSED] 0x5694 (DG2)
[10:15:55] [PASSED] 0x5695 (DG2)
[10:15:55] [PASSED] 0x56A3 (DG2)
[10:15:55] [PASSED] 0x56A4 (DG2)
[10:15:55] [PASSED] 0x56B2 (DG2)
[10:15:55] [PASSED] 0x56B3 (DG2)
[10:15:55] [PASSED] 0x5696 (DG2)
[10:15:55] [PASSED] 0x5697 (DG2)
[10:15:55] [PASSED] 0xB69 (PVC)
[10:15:55] [PASSED] 0xB6E (PVC)
[10:15:55] [PASSED] 0xBD4 (PVC)
[10:15:55] [PASSED] 0xBD5 (PVC)
[10:15:55] [PASSED] 0xBD6 (PVC)
[10:15:55] [PASSED] 0xBD7 (PVC)
[10:15:55] [PASSED] 0xBD8 (PVC)
[10:15:55] [PASSED] 0xBD9 (PVC)
[10:15:55] [PASSED] 0xBDA (PVC)
[10:15:55] [PASSED] 0xBDB (PVC)
[10:15:55] [PASSED] 0xBE0 (PVC)
[10:15:55] [PASSED] 0xBE1 (PVC)
[10:15:55] [PASSED] 0xBE5 (PVC)
[10:15:55] [PASSED] 0x7D40 (METEORLAKE)
[10:15:55] [PASSED] 0x7D45 (METEORLAKE)
[10:15:55] [PASSED] 0x7D55 (METEORLAKE)
[10:15:55] [PASSED] 0x7D60 (METEORLAKE)
[10:15:55] [PASSED] 0x7DD5 (METEORLAKE)
[10:15:55] [PASSED] 0x6420 (LUNARLAKE)
[10:15:55] [PASSED] 0x64A0 (LUNARLAKE)
[10:15:55] [PASSED] 0x64B0 (LUNARLAKE)
[10:15:55] [PASSED] 0xE202 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE209 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE20B (BATTLEMAGE)
[10:15:55] [PASSED] 0xE20C (BATTLEMAGE)
[10:15:55] [PASSED] 0xE20D (BATTLEMAGE)
[10:15:55] [PASSED] 0xE210 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE211 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE212 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE216 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE220 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE221 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE222 (BATTLEMAGE)
[10:15:55] [PASSED] 0xE223 (BATTLEMAGE)
[10:15:55] [PASSED] 0xB080 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB081 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB082 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB083 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB084 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB085 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB086 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB087 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB08F (PANTHERLAKE)
[10:15:55] [PASSED] 0xB090 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:15:55] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:15:55] [PASSED] 0xFD80 (PANTHERLAKE)
[10:15:55] [PASSED] 0xFD81 (PANTHERLAKE)
[10:15:55] ============= [PASSED] check_platform_gt_count =============
[10:15:55] ===================== [PASSED] xe_pci ======================
[10:15:55] =================== xe_rtp (2 subtests) ====================
[10:15:55] =============== xe_rtp_process_to_sr_tests ================
[10:15:55] [PASSED] coalesce-same-reg
[10:15:55] [PASSED] no-match-no-add
[10:15:55] [PASSED] match-or
[10:15:55] [PASSED] match-or-xfail
[10:15:55] [PASSED] no-match-no-add-multiple-rules
[10:15:55] [PASSED] two-regs-two-entries
[10:15:55] [PASSED] clr-one-set-other
[10:15:55] [PASSED] set-field
[10:15:55] [PASSED] conflict-duplicate
[10:15:55] [PASSED] conflict-not-disjoint
[10:15:55] [PASSED] conflict-reg-type
[10:15:55] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:15:55] ================== xe_rtp_process_tests ===================
[10:15:55] [PASSED] active1
[10:15:55] [PASSED] active2
[10:15:55] [PASSED] active-inactive
[10:15:55] [PASSED] inactive-active
[10:15:55] [PASSED] inactive-1st_or_active-inactive
[10:15:55] [PASSED] inactive-2nd_or_active-inactive
[10:15:55] [PASSED] inactive-last_or_active-inactive
[10:15:55] [PASSED] inactive-no_or_active-inactive
[10:15:55] ============== [PASSED] xe_rtp_process_tests ===============
[10:15:55] ===================== [PASSED] xe_rtp ======================
[10:15:55] ==================== xe_wa (1 subtest) =====================
[10:15:55] ======================== xe_wa_gt =========================
[10:15:55] [PASSED] TIGERLAKE B0
[10:15:55] [PASSED] DG1 A0
[10:15:55] [PASSED] DG1 B0
[10:15:55] [PASSED] ALDERLAKE_S A0
[10:15:55] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[10:15:55] [PASSED] ALDERLAKE_S C0
[10:15:55] [PASSED] ALDERLAKE_S D0
[10:15:55] [PASSED] ALDERLAKE_P A0
[10:15:55] [PASSED] ALDERLAKE_P B0
[10:15:55] [PASSED] ALDERLAKE_P C0
[10:15:55] [PASSED] ALDERLAKE_S RPLS D0
[10:15:55] [PASSED] ALDERLAKE_P RPLU E0
[10:15:55] [PASSED] DG2 G10 C0
[10:15:55] [PASSED] DG2 G11 B1
[10:15:55] [PASSED] DG2 G12 A1
[10:15:55] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:15:55] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:15:55] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:15:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:15:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:15:55] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:15:55] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:15:55] ==================== [PASSED] xe_wa_gt =====================
[10:15:55] ====================== [PASSED] xe_wa ======================
[10:15:55] ============================================================
[10:15:55] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[10:15:55] Elapsed time: 33.609s total, 4.281s configuring, 28.962s building, 0.322s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:15:55] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:15:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:16:20] Starting KUnit Kernel (1/1)...
[10:16:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:16:20] ============ drm_test_pick_cmdline (2 subtests) ============
[10:16:20] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:16:20] =============== drm_test_pick_cmdline_named ===============
[10:16:20] [PASSED] NTSC
[10:16:20] [PASSED] NTSC-J
[10:16:20] [PASSED] PAL
[10:16:20] [PASSED] PAL-M
[10:16:20] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:16:20] ============== [PASSED] drm_test_pick_cmdline ==============
[10:16:20] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:16:20] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:16:20] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:16:20] =========== drm_validate_clone_mode (2 subtests) ===========
[10:16:20] ============== drm_test_check_in_clone_mode ===============
[10:16:20] [PASSED] in_clone_mode
[10:16:20] [PASSED] not_in_clone_mode
[10:16:20] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:16:20] =============== drm_test_check_valid_clones ===============
[10:16:20] [PASSED] not_in_clone_mode
[10:16:20] [PASSED] valid_clone
[10:16:20] [PASSED] invalid_clone
[10:16:20] =========== [PASSED] drm_test_check_valid_clones ===========
[10:16:20] ============= [PASSED] drm_validate_clone_mode =============
[10:16:20] ============= drm_validate_modeset (1 subtest) =============
[10:16:20] [PASSED] drm_test_check_connector_changed_modeset
[10:16:20] ============== [PASSED] drm_validate_modeset ===============
[10:16:20] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:16:20] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:16:20] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:16:20] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:16:20] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:16:20] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:16:20] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:16:20] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:16:20] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:16:20] ============== drm_bridge_alloc (2 subtests) ===============
[10:16:20] [PASSED] drm_test_drm_bridge_alloc_basic
[10:16:20] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:16:20] ================ [PASSED] drm_bridge_alloc =================
[10:16:20] ================== drm_buddy (7 subtests) ==================
[10:16:20] [PASSED] drm_test_buddy_alloc_limit
[10:16:20] [PASSED] drm_test_buddy_alloc_optimistic
[10:16:20] [PASSED] drm_test_buddy_alloc_pessimistic
[10:16:20] [PASSED] drm_test_buddy_alloc_pathological
[10:16:21] [PASSED] drm_test_buddy_alloc_contiguous
[10:16:21] [PASSED] drm_test_buddy_alloc_clear
[10:16:21] [PASSED] drm_test_buddy_alloc_range_bias
[10:16:21] ==================== [PASSED] drm_buddy ====================
[10:16:21] ============= drm_cmdline_parser (40 subtests) =============
[10:16:21] [PASSED] drm_test_cmdline_force_d_only
[10:16:21] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:16:21] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:16:21] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:16:21] [PASSED] drm_test_cmdline_force_e_only
[10:16:21] [PASSED] drm_test_cmdline_res
[10:16:21] [PASSED] drm_test_cmdline_res_vesa
[10:16:21] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:16:21] [PASSED] drm_test_cmdline_res_rblank
[10:16:21] [PASSED] drm_test_cmdline_res_bpp
[10:16:21] [PASSED] drm_test_cmdline_res_refresh
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:16:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:16:21] [PASSED] drm_test_cmdline_res_margins_force_on
[10:16:21] [PASSED] drm_test_cmdline_res_vesa_margins
[10:16:21] [PASSED] drm_test_cmdline_name
[10:16:21] [PASSED] drm_test_cmdline_name_bpp
[10:16:21] [PASSED] drm_test_cmdline_name_option
[10:16:21] [PASSED] drm_test_cmdline_name_bpp_option
[10:16:21] [PASSED] drm_test_cmdline_rotate_0
[10:16:21] [PASSED] drm_test_cmdline_rotate_90
[10:16:21] [PASSED] drm_test_cmdline_rotate_180
[10:16:21] [PASSED] drm_test_cmdline_rotate_270
[10:16:21] [PASSED] drm_test_cmdline_hmirror
[10:16:21] [PASSED] drm_test_cmdline_vmirror
[10:16:21] [PASSED] drm_test_cmdline_margin_options
[10:16:21] [PASSED] drm_test_cmdline_multiple_options
[10:16:21] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:16:21] [PASSED] drm_test_cmdline_extra_and_option
[10:16:21] [PASSED] drm_test_cmdline_freestanding_options
[10:16:21] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:16:21] [PASSED] drm_test_cmdline_panel_orientation
[10:16:21] ================ drm_test_cmdline_invalid =================
[10:16:21] [PASSED] margin_only
[10:16:21] [PASSED] interlace_only
[10:16:21] [PASSED] res_missing_x
[10:16:21] [PASSED] res_missing_y
[10:16:21] [PASSED] res_bad_y
[10:16:21] [PASSED] res_missing_y_bpp
[10:16:21] [PASSED] res_bad_bpp
[10:16:21] [PASSED] res_bad_refresh
[10:16:21] [PASSED] res_bpp_refresh_force_on_off
[10:16:21] [PASSED] res_invalid_mode
[10:16:21] [PASSED] res_bpp_wrong_place_mode
[10:16:21] [PASSED] name_bpp_refresh
[10:16:21] [PASSED] name_refresh
[10:16:21] [PASSED] name_refresh_wrong_mode
[10:16:21] [PASSED] name_refresh_invalid_mode
[10:16:21] [PASSED] rotate_multiple
[10:16:21] [PASSED] rotate_invalid_val
[10:16:21] [PASSED] rotate_truncated
[10:16:21] [PASSED] invalid_option
[10:16:21] [PASSED] invalid_tv_option
[10:16:21] [PASSED] truncated_tv_option
[10:16:21] ============ [PASSED] drm_test_cmdline_invalid =============
[10:16:21] =============== drm_test_cmdline_tv_options ===============
[10:16:21] [PASSED] NTSC
[10:16:21] [PASSED] NTSC_443
[10:16:21] [PASSED] NTSC_J
[10:16:21] [PASSED] PAL
[10:16:21] [PASSED] PAL_M
[10:16:21] [PASSED] PAL_N
[10:16:21] [PASSED] SECAM
[10:16:21] [PASSED] MONO_525
[10:16:21] [PASSED] MONO_625
[10:16:21] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:16:21] =============== [PASSED] drm_cmdline_parser ================
[10:16:21] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:16:21] [PASSED] drm_test_connector_hdmi_init_valid
[10:16:21] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:16:21] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:16:21] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:16:21] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:16:21] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:16:21] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:16:21] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:16:21] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:16:21] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:16:21] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:16:21] [PASSED] supported_formats=0x3 yuv420_allowed=1
[10:16:21] [PASSED] supported_formats=0x3 yuv420_allowed=0
[10:16:21] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:16:21] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:16:21] [PASSED] drm_test_connector_hdmi_init_null_product
[10:16:21] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:16:21] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:16:21] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:16:21] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:16:21] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:16:21] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:16:21] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:16:21] ========= drm_test_connector_hdmi_init_type_valid =========
[10:16:21] [PASSED] HDMI-A
[10:16:21] [PASSED] HDMI-B
[10:16:21] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:16:21] ======== drm_test_connector_hdmi_init_type_invalid ========
[10:16:21] [PASSED] Unknown
[10:16:21] [PASSED] VGA
[10:16:21] [PASSED] DVI-I
[10:16:21] [PASSED] DVI-D
[10:16:21] [PASSED] DVI-A
[10:16:21] [PASSED] Composite
[10:16:21] [PASSED] SVIDEO
[10:16:21] [PASSED] LVDS
[10:16:21] [PASSED] Component
[10:16:21] [PASSED] DIN
[10:16:21] [PASSED] DP
[10:16:21] [PASSED] TV
[10:16:21] [PASSED] eDP
[10:16:21] [PASSED] Virtual
[10:16:21] [PASSED] DSI
[10:16:21] [PASSED] DPI
[10:16:21] [PASSED] Writeback
[10:16:21] [PASSED] SPI
[10:16:21] [PASSED] USB
[10:16:21] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:16:21] ============ [PASSED] drmm_connector_hdmi_init =============
[10:16:21] ============= drmm_connector_init (3 subtests) =============
[10:16:21] [PASSED] drm_test_drmm_connector_init
[10:16:21] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:16:21] ========= drm_test_drmm_connector_init_type_valid =========
[10:16:21] [PASSED] Unknown
[10:16:21] [PASSED] VGA
[10:16:21] [PASSED] DVI-I
[10:16:21] [PASSED] DVI-D
[10:16:21] [PASSED] DVI-A
[10:16:21] [PASSED] Composite
[10:16:21] [PASSED] SVIDEO
[10:16:21] [PASSED] LVDS
[10:16:21] [PASSED] Component
[10:16:21] [PASSED] DIN
[10:16:21] [PASSED] DP
[10:16:21] [PASSED] HDMI-A
[10:16:21] [PASSED] HDMI-B
[10:16:21] [PASSED] TV
[10:16:21] [PASSED] eDP
[10:16:21] [PASSED] Virtual
[10:16:21] [PASSED] DSI
[10:16:21] [PASSED] DPI
[10:16:21] [PASSED] Writeback
[10:16:21] [PASSED] SPI
[10:16:21] [PASSED] USB
[10:16:21] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:16:21] =============== [PASSED] drmm_connector_init ===============
[10:16:21] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_init
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:16:21] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[10:16:21] [PASSED] Unknown
[10:16:21] [PASSED] VGA
[10:16:21] [PASSED] DVI-I
[10:16:21] [PASSED] DVI-D
[10:16:21] [PASSED] DVI-A
[10:16:21] [PASSED] Composite
[10:16:21] [PASSED] SVIDEO
[10:16:21] [PASSED] LVDS
[10:16:21] [PASSED] Component
[10:16:21] [PASSED] DIN
[10:16:21] [PASSED] DP
[10:16:21] [PASSED] HDMI-A
[10:16:21] [PASSED] HDMI-B
[10:16:21] [PASSED] TV
[10:16:21] [PASSED] eDP
[10:16:21] [PASSED] Virtual
[10:16:21] [PASSED] DSI
[10:16:21] [PASSED] DPI
[10:16:21] [PASSED] Writeback
[10:16:21] [PASSED] SPI
[10:16:21] [PASSED] USB
[10:16:21] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:16:21] ======== drm_test_drm_connector_dynamic_init_name =========
[10:16:21] [PASSED] Unknown
[10:16:21] [PASSED] VGA
[10:16:21] [PASSED] DVI-I
[10:16:21] [PASSED] DVI-D
[10:16:21] [PASSED] DVI-A
[10:16:21] [PASSED] Composite
[10:16:21] [PASSED] SVIDEO
[10:16:21] [PASSED] LVDS
[10:16:21] [PASSED] Component
[10:16:21] [PASSED] DIN
[10:16:21] [PASSED] DP
[10:16:21] [PASSED] HDMI-A
[10:16:21] [PASSED] HDMI-B
[10:16:21] [PASSED] TV
[10:16:21] [PASSED] eDP
[10:16:21] [PASSED] Virtual
[10:16:21] [PASSED] DSI
[10:16:21] [PASSED] DPI
[10:16:21] [PASSED] Writeback
[10:16:21] [PASSED] SPI
[10:16:21] [PASSED] USB
[10:16:21] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:16:21] =========== [PASSED] drm_connector_dynamic_init ============
[10:16:21] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:16:21] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:16:21] ======= drm_connector_dynamic_register (7 subtests) ========
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:16:21] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:16:21] ========= [PASSED] drm_connector_dynamic_register ==========
[10:16:21] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:16:21] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:16:21] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:16:21] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:16:21] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:16:21] ========== drm_test_get_tv_mode_from_name_valid ===========
[10:16:21] [PASSED] NTSC
[10:16:21] [PASSED] NTSC-443
[10:16:21] [PASSED] NTSC-J
[10:16:21] [PASSED] PAL
[10:16:21] [PASSED] PAL-M
[10:16:21] [PASSED] PAL-N
[10:16:21] [PASSED] SECAM
[10:16:21] [PASSED] Mono
[10:16:21] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:16:21] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:16:21] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:16:21] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:16:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:16:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:16:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:16:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:16:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:16:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:16:21] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[10:16:21] [PASSED] VIC 96
[10:16:21] [PASSED] VIC 97
[10:16:21] [PASSED] VIC 101
[10:16:21] [PASSED] VIC 102
[10:16:21] [PASSED] VIC 106
[10:16:21] [PASSED] VIC 107
[10:16:21] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:16:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:16:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:16:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:16:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:16:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:16:21] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:16:21] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:16:21] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[10:16:21] [PASSED] Automatic
[10:16:21] [PASSED] Full
[10:16:21] [PASSED] Limited 16:235
[10:16:21] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:16:21] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:16:21] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:16:21] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:16:21] === drm_test_drm_hdmi_connector_get_output_format_name ====
[10:16:21] [PASSED] RGB
[10:16:21] [PASSED] YUV 4:2:0
[10:16:21] [PASSED] YUV 4:2:2
[10:16:21] [PASSED] YUV 4:4:4
[10:16:21] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:16:21] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:16:21] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:16:21] ============= drm_damage_helper (21 subtests) ==============
[10:16:21] [PASSED] drm_test_damage_iter_no_damage
[10:16:21] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:16:21] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:16:21] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:16:21] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:16:21] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:16:21] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:16:21] [PASSED] drm_test_damage_iter_simple_damage
[10:16:21] [PASSED] drm_test_damage_iter_single_damage
[10:16:21] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:16:21] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:16:21] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:16:21] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:16:21] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:16:21] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:16:21] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:16:21] [PASSED] drm_test_damage_iter_damage
[10:16:21] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:16:21] [PASSED] drm_test_damage_iter_damage_one_outside
[10:16:21] [PASSED] drm_test_damage_iter_damage_src_moved
[10:16:21] [PASSED] drm_test_damage_iter_damage_not_visible
[10:16:21] ================ [PASSED] drm_damage_helper ================
[10:16:21] ============== drm_dp_mst_helper (3 subtests) ==============
[10:16:21] ============== drm_test_dp_mst_calc_pbn_mode ==============
[10:16:21] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:16:21] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:16:21] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:16:21] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:16:21] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:16:21] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:16:21] ============== drm_test_dp_mst_calc_pbn_div ===============
[10:16:21] [PASSED] Link rate 2000000 lane count 4
[10:16:21] [PASSED] Link rate 2000000 lane count 2
[10:16:21] [PASSED] Link rate 2000000 lane count 1
[10:16:21] [PASSED] Link rate 1350000 lane count 4
[10:16:21] [PASSED] Link rate 1350000 lane count 2
[10:16:21] [PASSED] Link rate 1350000 lane count 1
[10:16:21] [PASSED] Link rate 1000000 lane count 4
[10:16:21] [PASSED] Link rate 1000000 lane count 2
[10:16:21] [PASSED] Link rate 1000000 lane count 1
[10:16:21] [PASSED] Link rate 810000 lane count 4
[10:16:21] [PASSED] Link rate 810000 lane count 2
[10:16:21] [PASSED] Link rate 810000 lane count 1
[10:16:21] [PASSED] Link rate 540000 lane count 4
[10:16:21] [PASSED] Link rate 540000 lane count 2
[10:16:21] [PASSED] Link rate 540000 lane count 1
[10:16:21] [PASSED] Link rate 270000 lane count 4
[10:16:21] [PASSED] Link rate 270000 lane count 2
[10:16:21] [PASSED] Link rate 270000 lane count 1
[10:16:21] [PASSED] Link rate 162000 lane count 4
[10:16:21] [PASSED] Link rate 162000 lane count 2
[10:16:21] [PASSED] Link rate 162000 lane count 1
[10:16:21] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:16:21] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[10:16:21] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:16:21] [PASSED] DP_POWER_UP_PHY with port number
[10:16:21] [PASSED] DP_POWER_DOWN_PHY with port number
[10:16:21] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:16:21] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:16:21] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:16:21] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:16:21] [PASSED] DP_QUERY_PAYLOAD with port number
[10:16:21] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:16:21] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:16:21] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:16:21] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:16:21] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:16:21] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:16:21] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:16:21] [PASSED] DP_REMOTE_I2C_READ with port number
[10:16:21] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:16:21] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:16:21] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:16:21] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:16:21] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:16:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:16:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:16:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:16:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:16:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:16:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:16:21] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:16:21] ================ [PASSED] drm_dp_mst_helper ================
[10:16:21] ================== drm_exec (7 subtests) ===================
[10:16:21] [PASSED] sanitycheck
[10:16:21] [PASSED] test_lock
[10:16:21] [PASSED] test_lock_unlock
[10:16:21] [PASSED] test_duplicates
[10:16:21] [PASSED] test_prepare
[10:16:21] [PASSED] test_prepare_array
[10:16:21] [PASSED] test_multiple_loops
[10:16:21] ==================== [PASSED] drm_exec =====================
[10:16:21] =========== drm_format_helper_test (17 subtests) ===========
[10:16:21] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:16:21] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:16:21] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:16:21] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:16:21] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:16:21] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:16:21] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:16:21] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:16:21] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:16:21] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:16:21] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:16:21] ============== drm_test_fb_xrgb8888_to_mono ===============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:16:21] ==================== drm_test_fb_swab =====================
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ================ [PASSED] drm_test_fb_swab =================
[10:16:21] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:16:21] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[10:16:21] [PASSED] single_pixel_source_buffer
[10:16:21] [PASSED] single_pixel_clip_rectangle
[10:16:21] [PASSED] well_known_colors
[10:16:21] [PASSED] destination_pitch
[10:16:21] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:16:21] ================= drm_test_fb_clip_offset =================
[10:16:21] [PASSED] pass through
[10:16:21] [PASSED] horizontal offset
[10:16:21] [PASSED] vertical offset
[10:16:21] [PASSED] horizontal and vertical offset
[10:16:21] [PASSED] horizontal offset (custom pitch)
[10:16:21] [PASSED] vertical offset (custom pitch)
[10:16:21] [PASSED] horizontal and vertical offset (custom pitch)
[10:16:21] ============= [PASSED] drm_test_fb_clip_offset =============
[10:16:21] =================== drm_test_fb_memcpy ====================
[10:16:21] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:16:21] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:16:21] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:16:21] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:16:21] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:16:21] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:16:21] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:16:21] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:16:21] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:16:21] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:16:21] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:16:21] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:16:21] =============== [PASSED] drm_test_fb_memcpy ================
[10:16:21] ============= [PASSED] drm_format_helper_test ==============
[10:16:21] ================= drm_format (18 subtests) =================
[10:16:21] [PASSED] drm_test_format_block_width_invalid
[10:16:21] [PASSED] drm_test_format_block_width_one_plane
[10:16:21] [PASSED] drm_test_format_block_width_two_plane
[10:16:21] [PASSED] drm_test_format_block_width_three_plane
[10:16:21] [PASSED] drm_test_format_block_width_tiled
[10:16:21] [PASSED] drm_test_format_block_height_invalid
[10:16:21] [PASSED] drm_test_format_block_height_one_plane
[10:16:21] [PASSED] drm_test_format_block_height_two_plane
[10:16:21] [PASSED] drm_test_format_block_height_three_plane
[10:16:21] [PASSED] drm_test_format_block_height_tiled
[10:16:21] [PASSED] drm_test_format_min_pitch_invalid
[10:16:21] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:16:21] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:16:21] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:16:21] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:16:21] [PASSED] drm_test_format_min_pitch_two_plane
[10:16:21] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:16:21] [PASSED] drm_test_format_min_pitch_tiled
[10:16:21] =================== [PASSED] drm_format ====================
[10:16:21] ============== drm_framebuffer (10 subtests) ===============
[10:16:21] ========== drm_test_framebuffer_check_src_coords ==========
[10:16:21] [PASSED] Success: source fits into fb
[10:16:21] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:16:21] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:16:21] [PASSED] Fail: overflowing fb with source width
[10:16:21] [PASSED] Fail: overflowing fb with source height
[10:16:21] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:16:21] [PASSED] drm_test_framebuffer_cleanup
[10:16:21] =============== drm_test_framebuffer_create ===============
[10:16:21] [PASSED] ABGR8888 normal sizes
[10:16:21] [PASSED] ABGR8888 max sizes
[10:16:21] [PASSED] ABGR8888 pitch greater than min required
[10:16:21] [PASSED] ABGR8888 pitch less than min required
[10:16:21] [PASSED] ABGR8888 Invalid width
[10:16:21] [PASSED] ABGR8888 Invalid buffer handle
[10:16:21] [PASSED] No pixel format
[10:16:21] [PASSED] ABGR8888 Width 0
[10:16:21] [PASSED] ABGR8888 Height 0
[10:16:21] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:16:21] [PASSED] ABGR8888 Large buffer offset
[10:16:21] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:16:21] [PASSED] ABGR8888 Invalid flag
[10:16:21] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:16:21] [PASSED] ABGR8888 Valid buffer modifier
[10:16:21] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:16:21] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:16:21] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:16:21] [PASSED] NV12 Normal sizes
[10:16:21] [PASSED] NV12 Max sizes
[10:16:21] [PASSED] NV12 Invalid pitch
[10:16:21] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:16:21] [PASSED] NV12 different modifier per-plane
[10:16:21] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:16:21] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:16:21] [PASSED] NV12 Modifier for inexistent plane
[10:16:21] [PASSED] NV12 Handle for inexistent plane
[10:16:21] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:16:21] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:16:21] [PASSED] YVU420 Normal sizes
[10:16:21] [PASSED] YVU420 Max sizes
[10:16:21] [PASSED] YVU420 Invalid pitch
[10:16:21] [PASSED] YVU420 Different pitches
[10:16:21] [PASSED] YVU420 Different buffer offsets/pitches
[10:16:21] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:16:21] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:16:21] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:16:21] [PASSED] YVU420 Valid modifier
[10:16:21] [PASSED] YVU420 Different modifiers per plane
[10:16:21] [PASSED] YVU420 Modifier for inexistent plane
[10:16:21] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:16:21] [PASSED] X0L2 Normal sizes
[10:16:21] [PASSED] X0L2 Max sizes
[10:16:21] [PASSED] X0L2 Invalid pitch
[10:16:21] [PASSED] X0L2 Pitch greater than minimum required
[10:16:21] [PASSED] X0L2 Handle for inexistent plane
[10:16:21] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:16:21] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:16:21] [PASSED] X0L2 Valid modifier
[10:16:21] [PASSED] X0L2 Modifier for inexistent plane
[10:16:21] =========== [PASSED] drm_test_framebuffer_create ===========
[10:16:21] [PASSED] drm_test_framebuffer_free
[10:16:21] [PASSED] drm_test_framebuffer_init
[10:16:21] [PASSED] drm_test_framebuffer_init_bad_format
[10:16:21] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:16:21] [PASSED] drm_test_framebuffer_lookup
[10:16:21] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:16:21] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:16:21] ================= [PASSED] drm_framebuffer =================
[10:16:21] ================ drm_gem_shmem (8 subtests) ================
[10:16:21] [PASSED] drm_gem_shmem_test_obj_create
[10:16:21] [PASSED] drm_gem_shmem_test_obj_create_private
[10:16:21] [PASSED] drm_gem_shmem_test_pin_pages
[10:16:21] [PASSED] drm_gem_shmem_test_vmap
[10:16:21] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:16:21] [PASSED] drm_gem_shmem_test_get_sg_table
[10:16:21] [PASSED] drm_gem_shmem_test_madvise
[10:16:21] [PASSED] drm_gem_shmem_test_purge
[10:16:21] ================== [PASSED] drm_gem_shmem ==================
[10:16:21] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:16:21] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[10:16:21] [PASSED] Automatic
[10:16:21] [PASSED] Full
[10:16:21] [PASSED] Limited 16:235
[10:16:21] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:16:21] [PASSED] drm_test_check_disable_connector
[10:16:21] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:16:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:16:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:16:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:16:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:16:21] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:16:21] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:16:21] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:16:21] [PASSED] drm_test_check_output_bpc_dvi
[10:16:21] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:16:21] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:16:21] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:16:21] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:16:21] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:16:21] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:16:21] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:16:21] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:16:21] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:16:21] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:16:21] [PASSED] drm_test_check_broadcast_rgb_value
[10:16:21] [PASSED] drm_test_check_bpc_8_value
[10:16:21] [PASSED] drm_test_check_bpc_10_value
[10:16:21] [PASSED] drm_test_check_bpc_12_value
[10:16:21] [PASSED] drm_test_check_format_value
[10:16:21] [PASSED] drm_test_check_tmds_char_value
[10:16:21] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:16:21] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:16:21] [PASSED] drm_test_check_mode_valid
[10:16:21] [PASSED] drm_test_check_mode_valid_reject
[10:16:21] [PASSED] drm_test_check_mode_valid_reject_rate
[10:16:21] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:16:21] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:16:21] ================= drm_managed (2 subtests) =================
[10:16:21] [PASSED] drm_test_managed_release_action
[10:16:21] [PASSED] drm_test_managed_run_action
[10:16:21] =================== [PASSED] drm_managed ===================
[10:16:21] =================== drm_mm (6 subtests) ====================
[10:16:21] [PASSED] drm_test_mm_init
[10:16:21] [PASSED] drm_test_mm_debug
[10:16:21] [PASSED] drm_test_mm_align32
[10:16:21] [PASSED] drm_test_mm_align64
[10:16:21] [PASSED] drm_test_mm_lowest
[10:16:21] [PASSED] drm_test_mm_highest
[10:16:21] ===================== [PASSED] drm_mm ======================
[10:16:21] ============= drm_modes_analog_tv (5 subtests) =============
[10:16:21] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:16:21] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:16:21] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:16:21] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:16:21] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:16:21] =============== [PASSED] drm_modes_analog_tv ===============
[10:16:21] ============== drm_plane_helper (2 subtests) ===============
[10:16:21] =============== drm_test_check_plane_state ================
[10:16:21] [PASSED] clipping_simple
[10:16:21] [PASSED] clipping_rotate_reflect
[10:16:21] [PASSED] positioning_simple
[10:16:21] [PASSED] upscaling
[10:16:21] [PASSED] downscaling
[10:16:21] [PASSED] rounding1
[10:16:21] [PASSED] rounding2
[10:16:21] [PASSED] rounding3
[10:16:21] [PASSED] rounding4
[10:16:21] =========== [PASSED] drm_test_check_plane_state ============
[10:16:21] =========== drm_test_check_invalid_plane_state ============
[10:16:21] [PASSED] positioning_invalid
[10:16:21] [PASSED] upscaling_invalid
[10:16:21] [PASSED] downscaling_invalid
[10:16:21] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:16:21] ================ [PASSED] drm_plane_helper =================
[10:16:21] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:16:21] ====== drm_test_connector_helper_tv_get_modes_check =======
[10:16:21] [PASSED] None
[10:16:21] [PASSED] PAL
[10:16:21] [PASSED] NTSC
[10:16:21] [PASSED] Both, NTSC Default
[10:16:21] [PASSED] Both, PAL Default
[10:16:21] [PASSED] Both, NTSC Default, with PAL on command-line
[10:16:21] [PASSED] Both, PAL Default, with NTSC on command-line
[10:16:21] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:16:21] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:16:21] ================== drm_rect (9 subtests) ===================
[10:16:21] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:16:21] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:16:21] [PASSED] drm_test_rect_clip_scaled_clipped
[10:16:21] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:16:21] ================= drm_test_rect_intersect =================
[10:16:21] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:16:21] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:16:21] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:16:21] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:16:21] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:16:21] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:16:21] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:16:21] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:16:21] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:16:21] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:16:21] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:16:21] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:16:21] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:16:21] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:16:21] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:16:21] ============= [PASSED] drm_test_rect_intersect =============
[10:16:21] ================ drm_test_rect_calc_hscale ================
[10:16:21] [PASSED] normal use
[10:16:21] [PASSED] out of max range
[10:16:21] [PASSED] out of min range
[10:16:21] [PASSED] zero dst
[10:16:21] [PASSED] negative src
[10:16:21] [PASSED] negative dst
[10:16:21] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:16:21] ================ drm_test_rect_calc_vscale ================
[10:16:21] [PASSED] normal use
[10:16:21] [PASSED] out of max range
[10:16:21] [PASSED] out of min range
[10:16:21] [PASSED] zero dst
[10:16:21] [PASSED] negative src
stty: 'standard input': Inappropriate ioctl for device
[10:16:21] [PASSED] negative dst
[10:16:21] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:16:21] ================== drm_test_rect_rotate ===================
[10:16:21] [PASSED] reflect-x
[10:16:21] [PASSED] reflect-y
[10:16:21] [PASSED] rotate-0
[10:16:21] [PASSED] rotate-90
[10:16:21] [PASSED] rotate-180
[10:16:21] [PASSED] rotate-270
[10:16:21] ============== [PASSED] drm_test_rect_rotate ===============
[10:16:21] ================ drm_test_rect_rotate_inv =================
[10:16:21] [PASSED] reflect-x
[10:16:21] [PASSED] reflect-y
[10:16:21] [PASSED] rotate-0
[10:16:21] [PASSED] rotate-90
[10:16:21] [PASSED] rotate-180
[10:16:21] [PASSED] rotate-270
[10:16:21] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:16:21] ==================== [PASSED] drm_rect =====================
[10:16:21] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:16:21] ============ drm_test_sysfb_build_fourcc_list =============
[10:16:21] [PASSED] no native formats
[10:16:21] [PASSED] XRGB8888 as native format
[10:16:21] [PASSED] remove duplicates
[10:16:21] [PASSED] convert alpha formats
[10:16:21] [PASSED] random formats
[10:16:21] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:16:21] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:16:21] ============================================================
[10:16:21] Testing complete. Ran 621 tests: passed: 621
[10:16:21] Elapsed time: 25.738s total, 1.782s configuring, 23.785s building, 0.156s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:16:21] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:16:22] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:16:32] Starting KUnit Kernel (1/1)...
[10:16:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:16:32] ================= ttm_device (5 subtests) ==================
[10:16:32] [PASSED] ttm_device_init_basic
[10:16:32] [PASSED] ttm_device_init_multiple
[10:16:32] [PASSED] ttm_device_fini_basic
[10:16:32] [PASSED] ttm_device_init_no_vma_man
[10:16:32] ================== ttm_device_init_pools ==================
[10:16:32] [PASSED] No DMA allocations, no DMA32 required
[10:16:32] [PASSED] DMA allocations, DMA32 required
[10:16:32] [PASSED] No DMA allocations, DMA32 required
[10:16:32] [PASSED] DMA allocations, no DMA32 required
[10:16:32] ============== [PASSED] ttm_device_init_pools ==============
[10:16:32] =================== [PASSED] ttm_device ====================
[10:16:32] ================== ttm_pool (8 subtests) ===================
[10:16:32] ================== ttm_pool_alloc_basic ===================
[10:16:32] [PASSED] One page
[10:16:32] [PASSED] More than one page
[10:16:32] [PASSED] Above the allocation limit
[10:16:32] [PASSED] One page, with coherent DMA mappings enabled
[10:16:32] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:16:32] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:16:32] ============== ttm_pool_alloc_basic_dma_addr ==============
[10:16:32] [PASSED] One page
[10:16:32] [PASSED] More than one page
[10:16:32] [PASSED] Above the allocation limit
[10:16:32] [PASSED] One page, with coherent DMA mappings enabled
[10:16:32] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:16:32] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:16:32] [PASSED] ttm_pool_alloc_order_caching_match
[10:16:32] [PASSED] ttm_pool_alloc_caching_mismatch
[10:16:32] [PASSED] ttm_pool_alloc_order_mismatch
[10:16:32] [PASSED] ttm_pool_free_dma_alloc
[10:16:32] [PASSED] ttm_pool_free_no_dma_alloc
[10:16:32] [PASSED] ttm_pool_fini_basic
[10:16:32] ==================== [PASSED] ttm_pool =====================
[10:16:32] ================ ttm_resource (8 subtests) =================
[10:16:32] ================= ttm_resource_init_basic =================
[10:16:32] [PASSED] Init resource in TTM_PL_SYSTEM
[10:16:32] [PASSED] Init resource in TTM_PL_VRAM
[10:16:32] [PASSED] Init resource in a private placement
[10:16:32] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:16:32] ============= [PASSED] ttm_resource_init_basic =============
[10:16:32] [PASSED] ttm_resource_init_pinned
[10:16:32] [PASSED] ttm_resource_fini_basic
[10:16:32] [PASSED] ttm_resource_manager_init_basic
[10:16:32] [PASSED] ttm_resource_manager_usage_basic
[10:16:32] [PASSED] ttm_resource_manager_set_used_basic
[10:16:32] [PASSED] ttm_sys_man_alloc_basic
[10:16:32] [PASSED] ttm_sys_man_free_basic
[10:16:32] ================== [PASSED] ttm_resource ===================
[10:16:32] =================== ttm_tt (15 subtests) ===================
[10:16:32] ==================== ttm_tt_init_basic ====================
[10:16:32] [PASSED] Page-aligned size
[10:16:32] [PASSED] Extra pages requested
[10:16:32] ================ [PASSED] ttm_tt_init_basic ================
[10:16:32] [PASSED] ttm_tt_init_misaligned
[10:16:32] [PASSED] ttm_tt_fini_basic
[10:16:32] [PASSED] ttm_tt_fini_sg
[10:16:32] [PASSED] ttm_tt_fini_shmem
[10:16:32] [PASSED] ttm_tt_create_basic
[10:16:32] [PASSED] ttm_tt_create_invalid_bo_type
[10:16:32] [PASSED] ttm_tt_create_ttm_exists
[10:16:32] [PASSED] ttm_tt_create_failed
[10:16:32] [PASSED] ttm_tt_destroy_basic
[10:16:32] [PASSED] ttm_tt_populate_null_ttm
[10:16:32] [PASSED] ttm_tt_populate_populated_ttm
[10:16:32] [PASSED] ttm_tt_unpopulate_basic
[10:16:32] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:16:32] [PASSED] ttm_tt_swapin_basic
[10:16:32] ===================== [PASSED] ttm_tt ======================
[10:16:32] =================== ttm_bo (14 subtests) ===================
[10:16:32] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[10:16:32] [PASSED] Cannot be interrupted and sleeps
[10:16:32] [PASSED] Cannot be interrupted, locks straight away
[10:16:32] [PASSED] Can be interrupted, sleeps
[10:16:32] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:16:32] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:16:32] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:16:32] [PASSED] ttm_bo_reserve_double_resv
[10:16:32] [PASSED] ttm_bo_reserve_interrupted
[10:16:32] [PASSED] ttm_bo_reserve_deadlock
[10:16:32] [PASSED] ttm_bo_unreserve_basic
[10:16:32] [PASSED] ttm_bo_unreserve_pinned
[10:16:32] [PASSED] ttm_bo_unreserve_bulk
[10:16:32] [PASSED] ttm_bo_fini_basic
[10:16:32] [PASSED] ttm_bo_fini_shared_resv
[10:16:32] [PASSED] ttm_bo_pin_basic
[10:16:32] [PASSED] ttm_bo_pin_unpin_resource
[10:16:32] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:16:32] ===================== [PASSED] ttm_bo ======================
[10:16:32] ============== ttm_bo_validate (21 subtests) ===============
[10:16:32] ============== ttm_bo_init_reserved_sys_man ===============
[10:16:32] [PASSED] Buffer object for userspace
[10:16:32] [PASSED] Kernel buffer object
[10:16:32] [PASSED] Shared buffer object
[10:16:32] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:16:32] ============== ttm_bo_init_reserved_mock_man ==============
[10:16:32] [PASSED] Buffer object for userspace
[10:16:32] [PASSED] Kernel buffer object
[10:16:32] [PASSED] Shared buffer object
[10:16:32] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:16:32] [PASSED] ttm_bo_init_reserved_resv
[10:16:32] ================== ttm_bo_validate_basic ==================
[10:16:32] [PASSED] Buffer object for userspace
[10:16:32] [PASSED] Kernel buffer object
[10:16:32] [PASSED] Shared buffer object
[10:16:32] ============== [PASSED] ttm_bo_validate_basic ==============
[10:16:32] [PASSED] ttm_bo_validate_invalid_placement
[10:16:32] ============= ttm_bo_validate_same_placement ==============
[10:16:32] [PASSED] System manager
[10:16:32] [PASSED] VRAM manager
[10:16:32] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:16:32] [PASSED] ttm_bo_validate_failed_alloc
[10:16:32] [PASSED] ttm_bo_validate_pinned
[10:16:32] [PASSED] ttm_bo_validate_busy_placement
[10:16:32] ================ ttm_bo_validate_multihop =================
[10:16:32] [PASSED] Buffer object for userspace
[10:16:32] [PASSED] Kernel buffer object
[10:16:32] [PASSED] Shared buffer object
[10:16:32] ============ [PASSED] ttm_bo_validate_multihop =============
[10:16:32] ========== ttm_bo_validate_no_placement_signaled ==========
[10:16:32] [PASSED] Buffer object in system domain, no page vector
[10:16:32] [PASSED] Buffer object in system domain with an existing page vector
[10:16:32] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:16:32] ======== ttm_bo_validate_no_placement_not_signaled ========
[10:16:32] [PASSED] Buffer object for userspace
[10:16:32] [PASSED] Kernel buffer object
[10:16:32] [PASSED] Shared buffer object
[10:16:32] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:16:32] [PASSED] ttm_bo_validate_move_fence_signaled
[10:16:32] ========= ttm_bo_validate_move_fence_not_signaled =========
[10:16:32] [PASSED] Waits for GPU
[10:16:32] [PASSED] Tries to lock straight away
[10:16:32] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:16:32] [PASSED] ttm_bo_validate_happy_evict
[10:16:32] [PASSED] ttm_bo_validate_all_pinned_evict
[10:16:32] [PASSED] ttm_bo_validate_allowed_only_evict
[10:16:32] [PASSED] ttm_bo_validate_deleted_evict
[10:16:32] [PASSED] ttm_bo_validate_busy_domain_evict
[10:16:32] [PASSED] ttm_bo_validate_evict_gutting
[10:16:32] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:16:32] ================= [PASSED] ttm_bo_validate =================
[10:16:32] ============================================================
[10:16:32] Testing complete. Ran 101 tests: passed: 101
[10:16:32] Elapsed time: 11.050s total, 1.703s configuring, 9.130s building, 0.189s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 10:08 ` [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
@ 2025-09-23 10:19 ` Ville Syrjälä
2025-09-23 10:48 ` Tvrtko Ursulin
2025-09-23 10:44 ` [PATCH v13 " Tvrtko Ursulin
1 sibling, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-23 10:19 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
> Even though frame buffer objects are created as write-combined, in
> practice, on top of all the ring buffer flushing, an additional clflush
> seems to be needed before display engine can coherently scan out the
> AuxCCS compressed data without transient artifacts.
>
> If for comparison we look at how i915 handles things (where AuxCCS works
> fine), as it happens it has this same clflush before a frame buffer is
> pinned for display for the first time, courtesy the dynamic tracking of
> the buffer cache mode and setting the latter to uncached before handing
> to display.
>
> Since xe considers the buffer object caching mode as static we can
> implement the same approach by adding a flag telling us if the buffer
> was ever pinned for display and flush on the first pin. Subsequent re-pins
> will not repeat the clflush but so far I have not observed any glitching
> after the first pin.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
> 2 files changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index d8aa23b8cf14..f247c0da6b9e 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> struct xe_bo *bo = gem_to_xe_bo(obj);
> struct xe_validation_ctx ctx;
> struct drm_exec exec;
> + bool first_pin;
> int ret = 0;
>
> if (!vma)
> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> ret = xe_bo_validate(bo, NULL, true, &exec);
> drm_exec_retry_on_contention(&exec);
> xe_validation_retry_on_oom(&ctx, &ret);
> - if (!ret)
> + if (!ret) {
> ttm_bo_pin(&bo->ttm);
> + first_pin = !bo->display_pin;
> + bo->display_pin = true;
> + }
> }
> if (ret)
> goto err;
> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> if (ret)
> goto err_unpin;
>
> + /*
> + * Force flush frame buffer data for non-coherent display access when
> + * AuxCCS formats are used.
> + */
> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
> + intel_fb_is_ccs_modifier(fb->base.modifier))
> + drm_clflush_sg(xe_bo_sg(bo));
You still haven't found the actual bug that causes the dirty cache?
> +
> return vma;
>
> err_unpin:
> diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
> index d4fe3c8dca5b..8119d8d6d174 100644
> --- a/drivers/gpu/drm/xe/xe_bo_types.h
> +++ b/drivers/gpu/drm/xe/xe_bo_types.h
> @@ -81,11 +81,6 @@ struct xe_bo {
> struct llist_node freed;
> /** @update_index: Update index if PT BO */
> int update_index;
> - /** @created: Whether the bo has passed initial creation */
> - bool created;
> -
> - /** @ccs_cleared: true means that CCS region of BO is already cleared */
> - bool ccs_cleared;
>
> /** @bb_ccs: BB instructions of CCS read/write. Valid only for VF */
> struct xe_bb *bb_ccs[XE_SRIOV_VF_CCS_CTX_COUNT];
> @@ -100,6 +95,15 @@ struct xe_bo {
> /** @devmem_allocation: SVM device memory allocation */
> struct drm_pagemap_devmem devmem_allocation;
>
> + /** @created: Whether the bo has passed initial creation */
> + bool created : 1;
> +
> + /** @ccs_cleared */
> + bool ccs_cleared : 1;
> +
> + /** @display_pin: Was it ever pinned to display */
> + bool display_pin : 1;
> +
> /** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
> struct list_head vram_userfault_link;
>
> --
> 2.48.0
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v13 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 10:08 ` [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-09-23 10:19 ` Ville Syrjälä
@ 2025-09-23 10:44 ` Tvrtko Ursulin
1 sibling, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:44 UTC (permalink / raw)
To: intel-xe; +Cc: kernel-dev, Tvrtko Ursulin
Even though frame buffer objects are created as write-combined, in
practice, on top of all the ring buffer flushing, an additional clflush
seems to be needed before display engine can coherently scan out the
AuxCCS compressed data without transient artifacts.
If for comparison we look at how i915 handles things (where AuxCCS works
fine), as it happens it has this same clflush before a frame buffer is
pinned for display for the first time, courtesy the dynamic tracking of
the buffer cache mode and setting the latter to uncached before handing
to display.
Since xe considers the buffer object caching mode as static we can
implement the same approach by adding a flag telling us if the buffer
was ever pinned for display and flush on the first pin. Subsequent re-pins
will not repeat the clflush but so far I have not observed any glitching
after the first pin.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
2 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index d8aa23b8cf14..f247c0da6b9e 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
struct xe_bo *bo = gem_to_xe_bo(obj);
struct xe_validation_ctx ctx;
struct drm_exec exec;
+ bool first_pin;
int ret = 0;
if (!vma)
@@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
ret = xe_bo_validate(bo, NULL, true, &exec);
drm_exec_retry_on_contention(&exec);
xe_validation_retry_on_oom(&ctx, &ret);
- if (!ret)
+ if (!ret) {
ttm_bo_pin(&bo->ttm);
+ first_pin = !bo->display_pin;
+ bo->display_pin = true;
+ }
}
if (ret)
goto err;
@@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
if (ret)
goto err_unpin;
+ /*
+ * Force flush frame buffer data for non-coherent display access when
+ * AuxCCS formats are used.
+ */
+ if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
+ intel_fb_is_ccs_modifier(fb->base.modifier))
+ drm_clflush_sg(xe_bo_sg(bo));
+
return vma;
err_unpin:
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index d4fe3c8dca5b..8ebe14a76cee 100644
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@ -81,11 +81,6 @@ struct xe_bo {
struct llist_node freed;
/** @update_index: Update index if PT BO */
int update_index;
- /** @created: Whether the bo has passed initial creation */
- bool created;
-
- /** @ccs_cleared: true means that CCS region of BO is already cleared */
- bool ccs_cleared;
/** @bb_ccs: BB instructions of CCS read/write. Valid only for VF */
struct xe_bb *bb_ccs[XE_SRIOV_VF_CCS_CTX_COUNT];
@@ -97,6 +92,15 @@ struct xe_bo {
*/
u16 cpu_caching;
+ /** @created: Whether the bo has passed initial creation */
+ bool created : 1;
+
+ /** @ccs_cleared: true means that CCS region of BO is already cleared */
+ bool ccs_cleared : 1;
+
+ /** @display_pin: Was it ever pinned to display */
+ bool display_pin : 1;
+
/** @devmem_allocation: SVM device memory allocation */
struct drm_pagemap_devmem devmem_allocation;
--
2.48.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 10:19 ` Ville Syrjälä
@ 2025-09-23 10:48 ` Tvrtko Ursulin
2025-09-23 12:01 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 10:48 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 23/09/2025 11:19, Ville Syrjälä wrote:
> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
>> Even though frame buffer objects are created as write-combined, in
>> practice, on top of all the ring buffer flushing, an additional clflush
>> seems to be needed before display engine can coherently scan out the
>> AuxCCS compressed data without transient artifacts.
>>
>> If for comparison we look at how i915 handles things (where AuxCCS works
>> fine), as it happens it has this same clflush before a frame buffer is
>> pinned for display for the first time, courtesy the dynamic tracking of
>> the buffer cache mode and setting the latter to uncached before handing
>> to display.
>>
>> Since xe considers the buffer object caching mode as static we can
>> implement the same approach by adding a flag telling us if the buffer
>> was ever pinned for display and flush on the first pin. Subsequent re-pins
>> will not repeat the clflush but so far I have not observed any glitching
>> after the first pin.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>> ---
>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
>> 2 files changed, 22 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> index d8aa23b8cf14..f247c0da6b9e 100644
>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>> struct xe_bo *bo = gem_to_xe_bo(obj);
>> struct xe_validation_ctx ctx;
>> struct drm_exec exec;
>> + bool first_pin;
>> int ret = 0;
>>
>> if (!vma)
>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>> ret = xe_bo_validate(bo, NULL, true, &exec);
>> drm_exec_retry_on_contention(&exec);
>> xe_validation_retry_on_oom(&ctx, &ret);
>> - if (!ret)
>> + if (!ret) {
>> ttm_bo_pin(&bo->ttm);
>> + first_pin = !bo->display_pin;
>> + bo->display_pin = true;
>> + }
>> }
>> if (ret)
>> goto err;
>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>> if (ret)
>> goto err_unpin;
>>
>> + /*
>> + * Force flush frame buffer data for non-coherent display access when
>> + * AuxCCS formats are used.
>> + */
>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
>> + intel_fb_is_ccs_modifier(fb->base.modifier))
>> + drm_clflush_sg(xe_bo_sg(bo));
>
> You still haven't found the actual bug that causes the dirty cache?
Sadly no. I cross referenced everything numerous times, including
workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
but this extra flush always remains required. I also heard that how
flushing of the aux metadata works isn't documented anywhere and i915
does have this flush, by design or accident I don't know.
Regards,
Tvrtko
>> +
>> return vma;
>>
>> err_unpin:
>> diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
>> index d4fe3c8dca5b..8119d8d6d174 100644
>> --- a/drivers/gpu/drm/xe/xe_bo_types.h
>> +++ b/drivers/gpu/drm/xe/xe_bo_types.h
>> @@ -81,11 +81,6 @@ struct xe_bo {
>> struct llist_node freed;
>> /** @update_index: Update index if PT BO */
>> int update_index;
>> - /** @created: Whether the bo has passed initial creation */
>> - bool created;
>> -
>> - /** @ccs_cleared: true means that CCS region of BO is already cleared */
>> - bool ccs_cleared;
>>
>> /** @bb_ccs: BB instructions of CCS read/write. Valid only for VF */
>> struct xe_bb *bb_ccs[XE_SRIOV_VF_CCS_CTX_COUNT];
>> @@ -100,6 +95,15 @@ struct xe_bo {
>> /** @devmem_allocation: SVM device memory allocation */
>> struct drm_pagemap_devmem devmem_allocation;
>>
>> + /** @created: Whether the bo has passed initial creation */
>> + bool created : 1;
>> +
>> + /** @ccs_cleared */
>> + bool ccs_cleared : 1;
>> +
>> + /** @display_pin: Was it ever pinned to display */
>> + bool display_pin : 1;
>> +
>> /** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
>> struct list_head vram_userfault_link;
>>
>> --
>> 2.48.0
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* ✓ Xe.CI.BAT: success for AuxCCS handling and render compression modifiers (rev15)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (14 preceding siblings ...)
2025-09-23 10:16 ` ✓ CI.KUnit: success " Patchwork
@ 2025-09-23 11:15 ` Patchwork
2025-09-23 11:21 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev16) Patchwork
` (5 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 11:15 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 16527 bytes --]
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev15)
URL : https://patchwork.freedesktop.org/series/144186/
State : success
== Summary ==
CI Bug Log - changes from xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1_BAT -> xe-pw-144186v15_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 7)
------------------------------
Missing (4): bat-adlp-vm bat-ptl-1 bat-ptl-2 bat-ptl-vm
Known issues
------------
Here are the changes found in xe-pw-144186v15_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-lnl-1: NOTRUN -> [SKIP][1] ([Intel XE#1466])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-bmg-1: NOTRUN -> [SKIP][2] ([Intel XE#2233])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-dg2-oem2: NOTRUN -> [SKIP][3] ([Intel XE#623])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-lnl-1: NOTRUN -> [SKIP][4] ([Intel XE#2244])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@kms_dsc@dsc-basic.html
- bat-adlp-7: NOTRUN -> [SKIP][5] ([Intel XE#455])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@kms_dsc@dsc-basic.html
- bat-bmg-1: NOTRUN -> [SKIP][6] ([Intel XE#2244])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@kms_dsc@dsc-basic.html
- bat-dg2-oem2: NOTRUN -> [SKIP][7] ([Intel XE#455])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-connector-state:
- bat-lnl-1: NOTRUN -> [SKIP][8] ([Intel XE#352]) +2 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@basic:
- bat-bmg-2: NOTRUN -> [SKIP][9] ([Intel XE#2434] / [Intel XE#2548])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_hdmi_inject@inject-audio:
- bat-lnl-1: NOTRUN -> [SKIP][10] ([Intel XE#1470] / [Intel XE#2853])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-bmg-2: NOTRUN -> [SKIP][11] ([Intel XE#2489] / [Intel XE#3419]) +6 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_psr@psr-cursor-plane-move:
- bat-dg2-oem2: NOTRUN -> [SKIP][12] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-bmg-2: NOTRUN -> [SKIP][13] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
- bat-bmg-1: NOTRUN -> [SKIP][14] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- bat-lnl-1: NOTRUN -> [SKIP][15] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@sriov_basic@enable-vfs-autoprobe-off.html
- bat-dg2-oem2: NOTRUN -> [SKIP][16] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@sriov_basic@enable-vfs-autoprobe-on:
- bat-bmg-2: NOTRUN -> [DMESG-WARN][17] ([Intel XE#6190]) +1 other test dmesg-warn
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
* igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1:
- bat-bmg-1: NOTRUN -> [DMESG-WARN][18] ([Intel XE#6190]) +1 other test dmesg-warn
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
* igt@xe_evict@evict-beng-small:
- bat-adlp-7: NOTRUN -> [SKIP][19] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688]) +9 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_evict@evict-beng-small.html
* igt@xe_evict@evict-beng-small-cm:
- bat-lnl-1: NOTRUN -> [SKIP][20] ([Intel XE#688]) +11 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_evict@evict-beng-small-cm.html
* igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
- bat-adlp-7: NOTRUN -> [SKIP][21] ([Intel XE#688]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr:
- bat-dg2-oem2: NOTRUN -> [SKIP][22] ([Intel XE#288]) +32 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-prefetch:
- bat-adlp-7: NOTRUN -> [SKIP][23] ([Intel XE#288] / [Intel XE#5561]) +32 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_exec_fault_mode@twice-userptr-invalidate-prefetch.html
* igt@xe_huc_copy@huc_copy:
- bat-dg2-oem2: NOTRUN -> [SKIP][24] ([Intel XE#255])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_huc_copy@huc_copy.html
* igt@xe_live_ktest@xe_bo:
- bat-lnl-1: NOTRUN -> [SKIP][25] ([Intel XE#2229]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
- bat-adlp-7: NOTRUN -> [SKIP][26] ([Intel XE#2229] / [Intel XE#455]) +2 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: NOTRUN -> [SKIP][27] ([Intel XE#2229])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
- bat-bmg-1: NOTRUN -> [SKIP][28] ([Intel XE#2229])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- bat-dg2-oem2: NOTRUN -> [SKIP][29] ([Intel XE#2229])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- bat-adlp-7: NOTRUN -> [SKIP][30] ([Intel XE#2229] / [Intel XE#5488])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_mmap@vram:
- bat-lnl-1: NOTRUN -> [SKIP][31] ([Intel XE#1416])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_mmap@vram.html
- bat-adlp-7: NOTRUN -> [SKIP][32] ([Intel XE#1008] / [Intel XE#5591])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_mmap@vram.html
* igt@xe_pat@pat-index-xe2:
- bat-adlp-7: NOTRUN -> [SKIP][33] ([Intel XE#977])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_pat@pat-index-xe2.html
- bat-dg2-oem2: NOTRUN -> [SKIP][34] ([Intel XE#977])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- bat-lnl-1: NOTRUN -> [SKIP][35] ([Intel XE#1420] / [Intel XE#2838])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_pat@pat-index-xehpc.html
- bat-bmg-2: NOTRUN -> [SKIP][36] ([Intel XE#1420])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
- bat-bmg-1: NOTRUN -> [SKIP][37] ([Intel XE#1420])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@xe_pat@pat-index-xehpc.html
- bat-adlp-7: NOTRUN -> [SKIP][38] ([Intel XE#2838] / [Intel XE#979])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_pat@pat-index-xehpc.html
- bat-dg2-oem2: NOTRUN -> [SKIP][39] ([Intel XE#2838] / [Intel XE#979])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-2: NOTRUN -> [SKIP][40] ([Intel XE#2245])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
- bat-bmg-1: NOTRUN -> [SKIP][41] ([Intel XE#2245])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@xe_pat@pat-index-xelp.html
- bat-lnl-1: NOTRUN -> [SKIP][42] ([Intel XE#977])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-lnl-1: NOTRUN -> [SKIP][43] ([Intel XE#979])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_pat@pat-index-xelpg.html
- bat-bmg-2: NOTRUN -> [SKIP][44] ([Intel XE#2236])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
- bat-bmg-1: NOTRUN -> [SKIP][45] ([Intel XE#2236])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@xe_pat@pat-index-xelpg.html
- bat-adlp-7: NOTRUN -> [SKIP][46] ([Intel XE#979])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_pat@pat-index-xelpg.html
- bat-dg2-oem2: NOTRUN -> [SKIP][47] ([Intel XE#979])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_pat@pat-index-xelpg.html
* igt@xe_sriov_flr@flr-vf1-clear:
- bat-dg2-oem2: NOTRUN -> [SKIP][48] ([Intel XE#3342])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_sriov_flr@flr-vf1-clear.html
- bat-lnl-1: NOTRUN -> [SKIP][49] ([Intel XE#3342])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_force_connector_basic@force-connector-state:
- bat-bmg-2: [ABORT][50] ([Intel XE#6201]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/bat-bmg-2/igt@kms_force_connector_basic@force-connector-state.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-2/igt@kms_force_connector_basic@force-connector-state.html
* igt@xe_module_load@load:
- bat-dg2-oem2: [ABORT][52] ([Intel XE#6201]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/bat-dg2-oem2/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-dg2-oem2/igt@xe_module_load@load.html
- bat-lnl-1: [ABORT][54] ([Intel XE#6201]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/bat-lnl-1/igt@xe_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-lnl-1/igt@xe_module_load@load.html
- bat-bmg-1: [ABORT][56] ([Intel XE#6201]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/bat-bmg-1/igt@xe_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-bmg-1/igt@xe_module_load@load.html
- bat-adlp-7: [ABORT][58] ([Intel XE#6201]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/bat-adlp-7/igt@xe_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/bat-adlp-7/igt@xe_module_load@load.html
[Intel XE#1008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1008
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1416
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1466
[Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
[Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
[Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
[Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#5488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5488
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5591
[Intel XE#6190]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6190
[Intel XE#6201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6201
[Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* IGT: IGT_8547 -> IGT_8550
* Linux: xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1 -> xe-pw-144186v15
IGT_8547: 8547
IGT_8550: 4f8c7886ad02e116804ec08714f17bce1755c6e4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1: 3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1
xe-pw-144186v15: 144186v15
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/index.html
[-- Attachment #2: Type: text/html, Size: 20293 bytes --]
^ permalink raw reply [flat|nested] 45+ messages in thread
* ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev16)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (15 preceding siblings ...)
2025-09-23 11:15 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-09-23 11:21 ` Patchwork
2025-09-23 11:22 ` ✓ CI.KUnit: success " Patchwork
` (4 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 11:21 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev16)
URL : https://patchwork.freedesktop.org/series/144186/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0a91b06e701a037655d16b4b3184de3113d5a7b6
Author: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Date: Tue Sep 23 11:08:06 2025 +0100
drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
Now that we have fixed the DPT handling we can undo the nerf which was
done in cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if
built for Xe").
Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
[PLANE:32:plane 1A]: type=PRI
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
Display working fine - no artefacts, no DMAR/PIPE faults.
v2:
* Adjust patch title. (Rodrigo)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+ /mt/dim checkpatch d2f002c868da5926fabd73b1ba2ab7a2b66d81dc drm-intel
e085d1660f62 drm/xe/xelpg: Flush CCS when flushing caches
f428211ab721 drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
5e831ace9c51 drm/xe/xelp: Support auxccs invalidation on blitter
7f8091b2f1ee drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms
e5dce990d771 drm/xe/xelp: Wait for AuxCCS invalidation to complete
493860b1971c drm/xe: Export xe_emit_aux_table_inv
2c39b88de6ff drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds
cc17ff48c668 drm/xe: Flush GGTT writes after populating DPT
-:72: WARNING:MEMORY_BARRIER: memory barrier without comment
#72: FILE: drivers/gpu/drm/xe/display/xe_fb_pin.c:115:
+ wmb();
total: 0 errors, 1 warnings, 0 checks, 66 lines checked
6ac2514d1d1a drm/xe: Handle DPT in system memory
fb197f3c3cd7 drm/xe/display: Add support for AuxCCS
1fec84df7dcb drm/xe: Force flush system memory AuxCCS framebuffers before scan out
afb7969b4561 drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS
0a91b06e701a drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
-:10: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")'
#10:
done in cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if
-:16: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#16:
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
total: 1 errors, 1 warnings, 0 checks, 12 lines checked
^ permalink raw reply [flat|nested] 45+ messages in thread
* ✓ CI.KUnit: success for AuxCCS handling and render compression modifiers (rev16)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (16 preceding siblings ...)
2025-09-23 11:21 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev16) Patchwork
@ 2025-09-23 11:22 ` Patchwork
2025-09-23 12:03 ` ✓ Xe.CI.BAT: " Patchwork
` (3 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 11:22 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev16)
URL : https://patchwork.freedesktop.org/series/144186/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:21:26] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:21:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:21:59] Starting KUnit Kernel (1/1)...
[11:21:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:21:59] ================== guc_buf (11 subtests) ===================
[11:21:59] [PASSED] test_smallest
[11:21:59] [PASSED] test_largest
[11:21:59] [PASSED] test_granular
[11:21:59] [PASSED] test_unique
[11:21:59] [PASSED] test_overlap
[11:21:59] [PASSED] test_reusable
[11:21:59] [PASSED] test_too_big
[11:21:59] [PASSED] test_flush
[11:21:59] [PASSED] test_lookup
[11:21:59] [PASSED] test_data
[11:21:59] [PASSED] test_class
[11:21:59] ===================== [PASSED] guc_buf =====================
[11:21:59] =================== guc_dbm (7 subtests) ===================
[11:21:59] [PASSED] test_empty
[11:21:59] [PASSED] test_default
[11:21:59] ======================== test_size ========================
[11:21:59] [PASSED] 4
[11:21:59] [PASSED] 8
[11:21:59] [PASSED] 32
[11:21:59] [PASSED] 256
[11:21:59] ==================== [PASSED] test_size ====================
[11:21:59] ======================= test_reuse ========================
[11:21:59] [PASSED] 4
[11:21:59] [PASSED] 8
[11:21:59] [PASSED] 32
[11:21:59] [PASSED] 256
[11:21:59] =================== [PASSED] test_reuse ====================
[11:21:59] =================== test_range_overlap ====================
[11:21:59] [PASSED] 4
[11:21:59] [PASSED] 8
[11:21:59] [PASSED] 32
[11:21:59] [PASSED] 256
[11:21:59] =============== [PASSED] test_range_overlap ================
[11:21:59] =================== test_range_compact ====================
[11:21:59] [PASSED] 4
[11:21:59] [PASSED] 8
[11:21:59] [PASSED] 32
[11:21:59] [PASSED] 256
[11:21:59] =============== [PASSED] test_range_compact ================
[11:21:59] ==================== test_range_spare =====================
[11:21:59] [PASSED] 4
[11:21:59] [PASSED] 8
[11:21:59] [PASSED] 32
[11:21:59] [PASSED] 256
[11:21:59] ================ [PASSED] test_range_spare =================
[11:21:59] ===================== [PASSED] guc_dbm =====================
[11:21:59] =================== guc_idm (6 subtests) ===================
[11:21:59] [PASSED] bad_init
[11:21:59] [PASSED] no_init
[11:21:59] [PASSED] init_fini
[11:21:59] [PASSED] check_used
[11:21:59] [PASSED] check_quota
[11:21:59] [PASSED] check_all
[11:21:59] ===================== [PASSED] guc_idm =====================
[11:21:59] ================== no_relay (3 subtests) ===================
[11:21:59] [PASSED] xe_drops_guc2pf_if_not_ready
[11:21:59] [PASSED] xe_drops_guc2vf_if_not_ready
[11:21:59] [PASSED] xe_rejects_send_if_not_ready
[11:21:59] ==================== [PASSED] no_relay =====================
[11:21:59] ================== pf_relay (14 subtests) ==================
[11:21:59] [PASSED] pf_rejects_guc2pf_too_short
[11:21:59] [PASSED] pf_rejects_guc2pf_too_long
[11:21:59] [PASSED] pf_rejects_guc2pf_no_payload
[11:21:59] [PASSED] pf_fails_no_payload
[11:21:59] [PASSED] pf_fails_bad_origin
[11:21:59] [PASSED] pf_fails_bad_type
[11:21:59] [PASSED] pf_txn_reports_error
[11:21:59] [PASSED] pf_txn_sends_pf2guc
[11:21:59] [PASSED] pf_sends_pf2guc
[11:21:59] [SKIPPED] pf_loopback_nop
[11:21:59] [SKIPPED] pf_loopback_echo
[11:21:59] [SKIPPED] pf_loopback_fail
[11:21:59] [SKIPPED] pf_loopback_busy
[11:21:59] [SKIPPED] pf_loopback_retry
[11:21:59] ==================== [PASSED] pf_relay =====================
[11:21:59] ================== vf_relay (3 subtests) ===================
[11:21:59] [PASSED] vf_rejects_guc2vf_too_short
[11:21:59] [PASSED] vf_rejects_guc2vf_too_long
[11:21:59] [PASSED] vf_rejects_guc2vf_no_payload
[11:21:59] ==================== [PASSED] vf_relay =====================
[11:21:59] ===================== lmtt (1 subtest) =====================
[11:21:59] ======================== test_ops =========================
[11:21:59] [PASSED] 2-level
[11:21:59] [PASSED] multi-level
[11:21:59] ==================== [PASSED] test_ops =====================
[11:21:59] ====================== [PASSED] lmtt =======================
[11:21:59] ================= pf_service (11 subtests) =================
[11:21:59] [PASSED] pf_negotiate_any
[11:21:59] [PASSED] pf_negotiate_base_match
[11:21:59] [PASSED] pf_negotiate_base_newer
[11:21:59] [PASSED] pf_negotiate_base_next
[11:21:59] [SKIPPED] pf_negotiate_base_older
[11:21:59] [PASSED] pf_negotiate_base_prev
[11:21:59] [PASSED] pf_negotiate_latest_match
[11:21:59] [PASSED] pf_negotiate_latest_newer
[11:21:59] [PASSED] pf_negotiate_latest_next
[11:21:59] [SKIPPED] pf_negotiate_latest_older
[11:21:59] [SKIPPED] pf_negotiate_latest_prev
[11:21:59] =================== [PASSED] pf_service ====================
[11:21:59] ================= xe_guc_g2g (2 subtests) ==================
[11:21:59] ============== xe_live_guc_g2g_kunit_default ==============
[11:21:59] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:21:59] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:21:59] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:21:59] =================== [SKIPPED] xe_guc_g2g ===================
[11:21:59] =================== xe_mocs (2 subtests) ===================
[11:21:59] ================ xe_live_mocs_kernel_kunit ================
[11:21:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:21:59] ================ xe_live_mocs_reset_kunit =================
[11:21:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:21:59] ==================== [SKIPPED] xe_mocs =====================
[11:21:59] ================= xe_migrate (2 subtests) ==================
[11:21:59] ================= xe_migrate_sanity_kunit =================
[11:21:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:21:59] ================== xe_validate_ccs_kunit ==================
[11:21:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:21:59] =================== [SKIPPED] xe_migrate ===================
[11:21:59] ================== xe_dma_buf (1 subtest) ==================
[11:21:59] ==================== xe_dma_buf_kunit =====================
[11:21:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:21:59] =================== [SKIPPED] xe_dma_buf ===================
[11:21:59] ================= xe_bo_shrink (1 subtest) =================
[11:21:59] =================== xe_bo_shrink_kunit ====================
[11:21:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:21:59] ================== [SKIPPED] xe_bo_shrink ==================
[11:21:59] ==================== xe_bo (2 subtests) ====================
[11:21:59] ================== xe_ccs_migrate_kunit ===================
[11:21:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:21:59] ==================== xe_bo_evict_kunit ====================
[11:21:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:21:59] ===================== [SKIPPED] xe_bo ======================
[11:21:59] ==================== args (11 subtests) ====================
[11:21:59] [PASSED] count_args_test
[11:21:59] [PASSED] call_args_example
[11:21:59] [PASSED] call_args_test
[11:21:59] [PASSED] drop_first_arg_example
[11:21:59] [PASSED] drop_first_arg_test
[11:21:59] [PASSED] first_arg_example
[11:21:59] [PASSED] first_arg_test
[11:21:59] [PASSED] last_arg_example
[11:21:59] [PASSED] last_arg_test
[11:21:59] [PASSED] pick_arg_example
[11:21:59] [PASSED] sep_comma_example
[11:21:59] ====================== [PASSED] args =======================
[11:21:59] =================== xe_pci (3 subtests) ====================
[11:21:59] ==================== check_graphics_ip ====================
[11:21:59] [PASSED] 12.00 Xe_LP
[11:21:59] [PASSED] 12.10 Xe_LP+
[11:21:59] [PASSED] 12.55 Xe_HPG
[11:21:59] [PASSED] 12.60 Xe_HPC
[11:21:59] [PASSED] 12.70 Xe_LPG
[11:21:59] [PASSED] 12.71 Xe_LPG
[11:21:59] [PASSED] 12.74 Xe_LPG+
[11:21:59] [PASSED] 20.01 Xe2_HPG
[11:21:59] [PASSED] 20.02 Xe2_HPG
[11:21:59] [PASSED] 20.04 Xe2_LPG
[11:21:59] [PASSED] 30.00 Xe3_LPG
[11:21:59] [PASSED] 30.01 Xe3_LPG
[11:21:59] [PASSED] 30.03 Xe3_LPG
[11:21:59] ================ [PASSED] check_graphics_ip ================
[11:21:59] ===================== check_media_ip ======================
[11:21:59] [PASSED] 12.00 Xe_M
[11:21:59] [PASSED] 12.55 Xe_HPM
[11:21:59] [PASSED] 13.00 Xe_LPM+
[11:21:59] [PASSED] 13.01 Xe2_HPM
[11:21:59] [PASSED] 20.00 Xe2_LPM
[11:21:59] [PASSED] 30.00 Xe3_LPM
[11:21:59] [PASSED] 30.02 Xe3_LPM
[11:21:59] ================= [PASSED] check_media_ip ==================
[11:21:59] ================= check_platform_gt_count =================
[11:21:59] [PASSED] 0x9A60 (TIGERLAKE)
[11:21:59] [PASSED] 0x9A68 (TIGERLAKE)
[11:21:59] [PASSED] 0x9A70 (TIGERLAKE)
[11:21:59] [PASSED] 0x9A40 (TIGERLAKE)
[11:21:59] [PASSED] 0x9A49 (TIGERLAKE)
[11:21:59] [PASSED] 0x9A59 (TIGERLAKE)
[11:21:59] [PASSED] 0x9A78 (TIGERLAKE)
[11:21:59] [PASSED] 0x9AC0 (TIGERLAKE)
[11:21:59] [PASSED] 0x9AC9 (TIGERLAKE)
[11:21:59] [PASSED] 0x9AD9 (TIGERLAKE)
[11:21:59] [PASSED] 0x9AF8 (TIGERLAKE)
[11:21:59] [PASSED] 0x4C80 (ROCKETLAKE)
[11:21:59] [PASSED] 0x4C8A (ROCKETLAKE)
[11:21:59] [PASSED] 0x4C8B (ROCKETLAKE)
[11:21:59] [PASSED] 0x4C8C (ROCKETLAKE)
[11:21:59] [PASSED] 0x4C90 (ROCKETLAKE)
[11:21:59] [PASSED] 0x4C9A (ROCKETLAKE)
[11:21:59] [PASSED] 0x4680 (ALDERLAKE_S)
[11:21:59] [PASSED] 0x4682 (ALDERLAKE_S)
[11:21:59] [PASSED] 0x4688 (ALDERLAKE_S)
[11:21:59] [PASSED] 0x468A (ALDERLAKE_S)
[11:21:59] [PASSED] 0x468B (ALDERLAKE_S)
[11:21:59] [PASSED] 0x4690 (ALDERLAKE_S)
[11:21:59] [PASSED] 0x4692 (ALDERLAKE_S)
[11:21:59] [PASSED] 0x4693 (ALDERLAKE_S)
[11:21:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46AA (ALDERLAKE_P)
[11:21:59] [PASSED] 0x462A (ALDERLAKE_P)
[11:21:59] [PASSED] 0x4626 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x4628 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:21:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:21:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:21:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:21:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:21:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:21:59] [PASSED] 0xA721 (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA720 (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:21:59] [PASSED] 0xA780 (ALDERLAKE_S)
[11:21:59] [PASSED] 0xA781 (ALDERLAKE_S)
[11:21:59] [PASSED] 0xA782 (ALDERLAKE_S)
[11:21:59] [PASSED] 0xA783 (ALDERLAKE_S)
[11:21:59] [PASSED] 0xA788 (ALDERLAKE_S)
[11:21:59] [PASSED] 0xA789 (ALDERLAKE_S)
[11:21:59] [PASSED] 0xA78A (ALDERLAKE_S)
[11:21:59] [PASSED] 0xA78B (ALDERLAKE_S)
[11:21:59] [PASSED] 0x4905 (DG1)
[11:21:59] [PASSED] 0x4906 (DG1)
[11:21:59] [PASSED] 0x4907 (DG1)
[11:21:59] [PASSED] 0x4908 (DG1)
[11:21:59] [PASSED] 0x4909 (DG1)
[11:21:59] [PASSED] 0x56C0 (DG2)
[11:21:59] [PASSED] 0x56C2 (DG2)
[11:21:59] [PASSED] 0x56C1 (DG2)
[11:21:59] [PASSED] 0x7D51 (METEORLAKE)
[11:21:59] [PASSED] 0x7DD1 (METEORLAKE)
[11:21:59] [PASSED] 0x7D41 (METEORLAKE)
[11:21:59] [PASSED] 0x7D67 (METEORLAKE)
[11:21:59] [PASSED] 0xB640 (METEORLAKE)
[11:21:59] [PASSED] 0x56A0 (DG2)
[11:21:59] [PASSED] 0x56A1 (DG2)
[11:21:59] [PASSED] 0x56A2 (DG2)
[11:21:59] [PASSED] 0x56BE (DG2)
[11:21:59] [PASSED] 0x56BF (DG2)
[11:21:59] [PASSED] 0x5690 (DG2)
[11:21:59] [PASSED] 0x5691 (DG2)
[11:21:59] [PASSED] 0x5692 (DG2)
[11:21:59] [PASSED] 0x56A5 (DG2)
[11:21:59] [PASSED] 0x56A6 (DG2)
[11:21:59] [PASSED] 0x56B0 (DG2)
[11:21:59] [PASSED] 0x56B1 (DG2)
[11:21:59] [PASSED] 0x56BA (DG2)
[11:21:59] [PASSED] 0x56BB (DG2)
[11:21:59] [PASSED] 0x56BC (DG2)
[11:21:59] [PASSED] 0x56BD (DG2)
[11:21:59] [PASSED] 0x5693 (DG2)
[11:21:59] [PASSED] 0x5694 (DG2)
[11:21:59] [PASSED] 0x5695 (DG2)
[11:21:59] [PASSED] 0x56A3 (DG2)
[11:21:59] [PASSED] 0x56A4 (DG2)
[11:21:59] [PASSED] 0x56B2 (DG2)
[11:21:59] [PASSED] 0x56B3 (DG2)
[11:21:59] [PASSED] 0x5696 (DG2)
[11:21:59] [PASSED] 0x5697 (DG2)
[11:21:59] [PASSED] 0xB69 (PVC)
[11:21:59] [PASSED] 0xB6E (PVC)
[11:21:59] [PASSED] 0xBD4 (PVC)
[11:21:59] [PASSED] 0xBD5 (PVC)
[11:21:59] [PASSED] 0xBD6 (PVC)
[11:21:59] [PASSED] 0xBD7 (PVC)
[11:21:59] [PASSED] 0xBD8 (PVC)
[11:21:59] [PASSED] 0xBD9 (PVC)
[11:21:59] [PASSED] 0xBDA (PVC)
[11:21:59] [PASSED] 0xBDB (PVC)
[11:21:59] [PASSED] 0xBE0 (PVC)
[11:21:59] [PASSED] 0xBE1 (PVC)
[11:21:59] [PASSED] 0xBE5 (PVC)
[11:21:59] [PASSED] 0x7D40 (METEORLAKE)
[11:21:59] [PASSED] 0x7D45 (METEORLAKE)
[11:21:59] [PASSED] 0x7D55 (METEORLAKE)
[11:21:59] [PASSED] 0x7D60 (METEORLAKE)
[11:21:59] [PASSED] 0x7DD5 (METEORLAKE)
[11:21:59] [PASSED] 0x6420 (LUNARLAKE)
[11:21:59] [PASSED] 0x64A0 (LUNARLAKE)
[11:21:59] [PASSED] 0x64B0 (LUNARLAKE)
[11:21:59] [PASSED] 0xE202 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE209 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE20B (BATTLEMAGE)
[11:21:59] [PASSED] 0xE20C (BATTLEMAGE)
[11:21:59] [PASSED] 0xE20D (BATTLEMAGE)
[11:21:59] [PASSED] 0xE210 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE211 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE212 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE216 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE220 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE221 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE222 (BATTLEMAGE)
[11:21:59] [PASSED] 0xE223 (BATTLEMAGE)
[11:21:59] [PASSED] 0xB080 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB081 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB082 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB083 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB084 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB085 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB086 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB087 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB08F (PANTHERLAKE)
[11:21:59] [PASSED] 0xB090 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:21:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:21:59] [PASSED] 0xFD80 (PANTHERLAKE)
[11:21:59] [PASSED] 0xFD81 (PANTHERLAKE)
[11:21:59] ============= [PASSED] check_platform_gt_count =============
[11:21:59] ===================== [PASSED] xe_pci ======================
[11:21:59] =================== xe_rtp (2 subtests) ====================
[11:21:59] =============== xe_rtp_process_to_sr_tests ================
[11:21:59] [PASSED] coalesce-same-reg
[11:21:59] [PASSED] no-match-no-add
[11:21:59] [PASSED] match-or
[11:21:59] [PASSED] match-or-xfail
[11:21:59] [PASSED] no-match-no-add-multiple-rules
[11:21:59] [PASSED] two-regs-two-entries
[11:21:59] [PASSED] clr-one-set-other
[11:21:59] [PASSED] set-field
[11:21:59] [PASSED] conflict-duplicate
[11:21:59] [PASSED] conflict-not-disjoint
[11:21:59] [PASSED] conflict-reg-type
[11:21:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:21:59] ================== xe_rtp_process_tests ===================
[11:21:59] [PASSED] active1
[11:21:59] [PASSED] active2
[11:21:59] [PASSED] active-inactive
[11:21:59] [PASSED] inactive-active
[11:21:59] [PASSED] inactive-1st_or_active-inactive
[11:21:59] [PASSED] inactive-2nd_or_active-inactive
[11:21:59] [PASSED] inactive-last_or_active-inactive
[11:21:59] [PASSED] inactive-no_or_active-inactive
[11:21:59] ============== [PASSED] xe_rtp_process_tests ===============
[11:21:59] ===================== [PASSED] xe_rtp ======================
[11:21:59] ==================== xe_wa (1 subtest) =====================
[11:21:59] ======================== xe_wa_gt =========================
[11:21:59] [PASSED] TIGERLAKE B0
[11:21:59] [PASSED] DG1 A0
[11:21:59] [PASSED] DG1 B0
[11:21:59] [PASSED] ALDERLAKE_S A0
[11:21:59] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[11:21:59] [PASSED] ALDERLAKE_S C0
[11:21:59] [PASSED] ALDERLAKE_S D0
[11:21:59] [PASSED] ALDERLAKE_P A0
[11:21:59] [PASSED] ALDERLAKE_P B0
[11:21:59] [PASSED] ALDERLAKE_P C0
[11:21:59] [PASSED] ALDERLAKE_S RPLS D0
[11:21:59] [PASSED] ALDERLAKE_P RPLU E0
[11:21:59] [PASSED] DG2 G10 C0
[11:21:59] [PASSED] DG2 G11 B1
[11:21:59] [PASSED] DG2 G12 A1
[11:21:59] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:21:59] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:21:59] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:21:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:21:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:21:59] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:21:59] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:21:59] ==================== [PASSED] xe_wa_gt =====================
[11:21:59] ====================== [PASSED] xe_wa ======================
[11:21:59] ============================================================
[11:21:59] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[11:21:59] Elapsed time: 33.589s total, 4.219s configuring, 29.003s building, 0.333s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:21:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:22:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:22:25] Starting KUnit Kernel (1/1)...
[11:22:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:22:25] ============ drm_test_pick_cmdline (2 subtests) ============
[11:22:25] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:22:25] =============== drm_test_pick_cmdline_named ===============
[11:22:25] [PASSED] NTSC
[11:22:25] [PASSED] NTSC-J
[11:22:25] [PASSED] PAL
[11:22:25] [PASSED] PAL-M
[11:22:25] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:22:25] ============== [PASSED] drm_test_pick_cmdline ==============
[11:22:25] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:22:25] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:22:25] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:22:25] =========== drm_validate_clone_mode (2 subtests) ===========
[11:22:25] ============== drm_test_check_in_clone_mode ===============
[11:22:25] [PASSED] in_clone_mode
[11:22:25] [PASSED] not_in_clone_mode
[11:22:25] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:22:25] =============== drm_test_check_valid_clones ===============
[11:22:25] [PASSED] not_in_clone_mode
[11:22:25] [PASSED] valid_clone
[11:22:25] [PASSED] invalid_clone
[11:22:25] =========== [PASSED] drm_test_check_valid_clones ===========
[11:22:25] ============= [PASSED] drm_validate_clone_mode =============
[11:22:25] ============= drm_validate_modeset (1 subtest) =============
[11:22:25] [PASSED] drm_test_check_connector_changed_modeset
[11:22:25] ============== [PASSED] drm_validate_modeset ===============
[11:22:25] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:22:25] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:22:25] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:22:25] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:22:25] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:22:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:22:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:22:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:22:25] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:22:25] ============== drm_bridge_alloc (2 subtests) ===============
[11:22:25] [PASSED] drm_test_drm_bridge_alloc_basic
[11:22:25] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:22:25] ================ [PASSED] drm_bridge_alloc =================
[11:22:25] ================== drm_buddy (7 subtests) ==================
[11:22:25] [PASSED] drm_test_buddy_alloc_limit
[11:22:25] [PASSED] drm_test_buddy_alloc_optimistic
[11:22:25] [PASSED] drm_test_buddy_alloc_pessimistic
[11:22:25] [PASSED] drm_test_buddy_alloc_pathological
[11:22:25] [PASSED] drm_test_buddy_alloc_contiguous
[11:22:25] [PASSED] drm_test_buddy_alloc_clear
[11:22:25] [PASSED] drm_test_buddy_alloc_range_bias
[11:22:25] ==================== [PASSED] drm_buddy ====================
[11:22:25] ============= drm_cmdline_parser (40 subtests) =============
[11:22:25] [PASSED] drm_test_cmdline_force_d_only
[11:22:25] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:22:25] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:22:25] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:22:25] [PASSED] drm_test_cmdline_force_e_only
[11:22:25] [PASSED] drm_test_cmdline_res
[11:22:25] [PASSED] drm_test_cmdline_res_vesa
[11:22:25] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:22:25] [PASSED] drm_test_cmdline_res_rblank
[11:22:25] [PASSED] drm_test_cmdline_res_bpp
[11:22:25] [PASSED] drm_test_cmdline_res_refresh
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:22:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:22:25] [PASSED] drm_test_cmdline_res_margins_force_on
[11:22:25] [PASSED] drm_test_cmdline_res_vesa_margins
[11:22:25] [PASSED] drm_test_cmdline_name
[11:22:25] [PASSED] drm_test_cmdline_name_bpp
[11:22:25] [PASSED] drm_test_cmdline_name_option
[11:22:25] [PASSED] drm_test_cmdline_name_bpp_option
[11:22:25] [PASSED] drm_test_cmdline_rotate_0
[11:22:25] [PASSED] drm_test_cmdline_rotate_90
[11:22:25] [PASSED] drm_test_cmdline_rotate_180
[11:22:25] [PASSED] drm_test_cmdline_rotate_270
[11:22:25] [PASSED] drm_test_cmdline_hmirror
[11:22:25] [PASSED] drm_test_cmdline_vmirror
[11:22:25] [PASSED] drm_test_cmdline_margin_options
[11:22:25] [PASSED] drm_test_cmdline_multiple_options
[11:22:25] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:22:25] [PASSED] drm_test_cmdline_extra_and_option
[11:22:25] [PASSED] drm_test_cmdline_freestanding_options
[11:22:25] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:22:25] [PASSED] drm_test_cmdline_panel_orientation
[11:22:25] ================ drm_test_cmdline_invalid =================
[11:22:25] [PASSED] margin_only
[11:22:25] [PASSED] interlace_only
[11:22:25] [PASSED] res_missing_x
[11:22:25] [PASSED] res_missing_y
[11:22:25] [PASSED] res_bad_y
[11:22:25] [PASSED] res_missing_y_bpp
[11:22:25] [PASSED] res_bad_bpp
[11:22:25] [PASSED] res_bad_refresh
[11:22:25] [PASSED] res_bpp_refresh_force_on_off
[11:22:25] [PASSED] res_invalid_mode
[11:22:25] [PASSED] res_bpp_wrong_place_mode
[11:22:25] [PASSED] name_bpp_refresh
[11:22:25] [PASSED] name_refresh
[11:22:25] [PASSED] name_refresh_wrong_mode
[11:22:25] [PASSED] name_refresh_invalid_mode
[11:22:25] [PASSED] rotate_multiple
[11:22:25] [PASSED] rotate_invalid_val
[11:22:25] [PASSED] rotate_truncated
[11:22:25] [PASSED] invalid_option
[11:22:25] [PASSED] invalid_tv_option
[11:22:25] [PASSED] truncated_tv_option
[11:22:25] ============ [PASSED] drm_test_cmdline_invalid =============
[11:22:25] =============== drm_test_cmdline_tv_options ===============
[11:22:25] [PASSED] NTSC
[11:22:25] [PASSED] NTSC_443
[11:22:25] [PASSED] NTSC_J
[11:22:25] [PASSED] PAL
[11:22:25] [PASSED] PAL_M
[11:22:25] [PASSED] PAL_N
[11:22:25] [PASSED] SECAM
[11:22:25] [PASSED] MONO_525
[11:22:25] [PASSED] MONO_625
[11:22:25] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:22:25] =============== [PASSED] drm_cmdline_parser ================
[11:22:25] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:22:25] [PASSED] drm_test_connector_hdmi_init_valid
[11:22:25] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:22:25] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:22:25] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:22:25] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:22:25] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:22:25] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:22:25] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:22:25] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:22:25] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:22:25] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:22:25] [PASSED] supported_formats=0x3 yuv420_allowed=1
[11:22:25] [PASSED] supported_formats=0x3 yuv420_allowed=0
[11:22:25] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:22:25] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:22:25] [PASSED] drm_test_connector_hdmi_init_null_product
[11:22:25] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:22:25] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:22:25] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:22:25] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:22:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:22:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:22:25] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:22:25] ========= drm_test_connector_hdmi_init_type_valid =========
[11:22:25] [PASSED] HDMI-A
[11:22:25] [PASSED] HDMI-B
[11:22:25] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:22:25] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:22:25] [PASSED] Unknown
[11:22:25] [PASSED] VGA
[11:22:25] [PASSED] DVI-I
[11:22:25] [PASSED] DVI-D
[11:22:25] [PASSED] DVI-A
[11:22:25] [PASSED] Composite
[11:22:25] [PASSED] SVIDEO
[11:22:25] [PASSED] LVDS
[11:22:25] [PASSED] Component
[11:22:25] [PASSED] DIN
[11:22:25] [PASSED] DP
[11:22:25] [PASSED] TV
[11:22:25] [PASSED] eDP
[11:22:25] [PASSED] Virtual
[11:22:25] [PASSED] DSI
[11:22:25] [PASSED] DPI
[11:22:25] [PASSED] Writeback
[11:22:25] [PASSED] SPI
[11:22:25] [PASSED] USB
[11:22:25] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:22:25] ============ [PASSED] drmm_connector_hdmi_init =============
[11:22:25] ============= drmm_connector_init (3 subtests) =============
[11:22:25] [PASSED] drm_test_drmm_connector_init
[11:22:25] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:22:25] ========= drm_test_drmm_connector_init_type_valid =========
[11:22:25] [PASSED] Unknown
[11:22:25] [PASSED] VGA
[11:22:25] [PASSED] DVI-I
[11:22:25] [PASSED] DVI-D
[11:22:25] [PASSED] DVI-A
[11:22:25] [PASSED] Composite
[11:22:25] [PASSED] SVIDEO
[11:22:25] [PASSED] LVDS
[11:22:25] [PASSED] Component
[11:22:25] [PASSED] DIN
[11:22:25] [PASSED] DP
[11:22:25] [PASSED] HDMI-A
[11:22:25] [PASSED] HDMI-B
[11:22:25] [PASSED] TV
[11:22:25] [PASSED] eDP
[11:22:25] [PASSED] Virtual
[11:22:25] [PASSED] DSI
[11:22:25] [PASSED] DPI
[11:22:25] [PASSED] Writeback
[11:22:25] [PASSED] SPI
[11:22:25] [PASSED] USB
[11:22:25] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:22:25] =============== [PASSED] drmm_connector_init ===============
[11:22:25] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_init
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:22:25] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:22:25] [PASSED] Unknown
[11:22:25] [PASSED] VGA
[11:22:25] [PASSED] DVI-I
[11:22:25] [PASSED] DVI-D
[11:22:25] [PASSED] DVI-A
[11:22:25] [PASSED] Composite
[11:22:25] [PASSED] SVIDEO
[11:22:25] [PASSED] LVDS
[11:22:25] [PASSED] Component
[11:22:25] [PASSED] DIN
[11:22:25] [PASSED] DP
[11:22:25] [PASSED] HDMI-A
[11:22:25] [PASSED] HDMI-B
[11:22:25] [PASSED] TV
[11:22:25] [PASSED] eDP
[11:22:25] [PASSED] Virtual
[11:22:25] [PASSED] DSI
[11:22:25] [PASSED] DPI
[11:22:25] [PASSED] Writeback
[11:22:25] [PASSED] SPI
[11:22:25] [PASSED] USB
[11:22:25] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:22:25] ======== drm_test_drm_connector_dynamic_init_name =========
[11:22:25] [PASSED] Unknown
[11:22:25] [PASSED] VGA
[11:22:25] [PASSED] DVI-I
[11:22:25] [PASSED] DVI-D
[11:22:25] [PASSED] DVI-A
[11:22:25] [PASSED] Composite
[11:22:25] [PASSED] SVIDEO
[11:22:25] [PASSED] LVDS
[11:22:25] [PASSED] Component
[11:22:25] [PASSED] DIN
[11:22:25] [PASSED] DP
[11:22:25] [PASSED] HDMI-A
[11:22:25] [PASSED] HDMI-B
[11:22:25] [PASSED] TV
[11:22:25] [PASSED] eDP
[11:22:25] [PASSED] Virtual
[11:22:25] [PASSED] DSI
[11:22:25] [PASSED] DPI
[11:22:25] [PASSED] Writeback
[11:22:25] [PASSED] SPI
[11:22:25] [PASSED] USB
[11:22:25] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:22:25] =========== [PASSED] drm_connector_dynamic_init ============
[11:22:25] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:22:25] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:22:25] ======= drm_connector_dynamic_register (7 subtests) ========
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:22:25] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:22:25] ========= [PASSED] drm_connector_dynamic_register ==========
[11:22:25] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:22:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:22:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:22:25] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:22:25] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:22:25] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:22:25] [PASSED] NTSC
[11:22:25] [PASSED] NTSC-443
[11:22:25] [PASSED] NTSC-J
[11:22:25] [PASSED] PAL
[11:22:25] [PASSED] PAL-M
[11:22:25] [PASSED] PAL-N
[11:22:25] [PASSED] SECAM
[11:22:25] [PASSED] Mono
[11:22:25] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:22:25] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:22:25] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:22:25] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:22:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:22:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:22:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:22:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:22:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:22:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:22:25] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:22:25] [PASSED] VIC 96
[11:22:25] [PASSED] VIC 97
[11:22:25] [PASSED] VIC 101
[11:22:25] [PASSED] VIC 102
[11:22:25] [PASSED] VIC 106
[11:22:25] [PASSED] VIC 107
[11:22:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:22:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:22:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:22:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:22:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:22:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:22:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:22:25] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:22:25] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:22:25] [PASSED] Automatic
[11:22:25] [PASSED] Full
[11:22:25] [PASSED] Limited 16:235
[11:22:25] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:22:25] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:22:25] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:22:25] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:22:25] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:22:25] [PASSED] RGB
[11:22:25] [PASSED] YUV 4:2:0
[11:22:25] [PASSED] YUV 4:2:2
[11:22:25] [PASSED] YUV 4:4:4
[11:22:25] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:22:25] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:22:25] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:22:25] ============= drm_damage_helper (21 subtests) ==============
[11:22:25] [PASSED] drm_test_damage_iter_no_damage
[11:22:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:22:25] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:22:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:22:25] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:22:25] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:22:25] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:22:25] [PASSED] drm_test_damage_iter_simple_damage
[11:22:25] [PASSED] drm_test_damage_iter_single_damage
[11:22:25] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:22:25] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:22:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:22:25] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:22:25] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:22:25] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:22:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:22:25] [PASSED] drm_test_damage_iter_damage
[11:22:25] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:22:25] [PASSED] drm_test_damage_iter_damage_one_outside
[11:22:25] [PASSED] drm_test_damage_iter_damage_src_moved
[11:22:25] [PASSED] drm_test_damage_iter_damage_not_visible
[11:22:25] ================ [PASSED] drm_damage_helper ================
[11:22:25] ============== drm_dp_mst_helper (3 subtests) ==============
[11:22:25] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:22:25] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:22:25] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:22:25] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:22:25] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:22:25] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:22:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:22:25] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:22:25] [PASSED] Link rate 2000000 lane count 4
[11:22:25] [PASSED] Link rate 2000000 lane count 2
[11:22:25] [PASSED] Link rate 2000000 lane count 1
[11:22:25] [PASSED] Link rate 1350000 lane count 4
[11:22:25] [PASSED] Link rate 1350000 lane count 2
[11:22:25] [PASSED] Link rate 1350000 lane count 1
[11:22:25] [PASSED] Link rate 1000000 lane count 4
[11:22:25] [PASSED] Link rate 1000000 lane count 2
[11:22:25] [PASSED] Link rate 1000000 lane count 1
[11:22:25] [PASSED] Link rate 810000 lane count 4
[11:22:25] [PASSED] Link rate 810000 lane count 2
[11:22:25] [PASSED] Link rate 810000 lane count 1
[11:22:25] [PASSED] Link rate 540000 lane count 4
[11:22:25] [PASSED] Link rate 540000 lane count 2
[11:22:25] [PASSED] Link rate 540000 lane count 1
[11:22:25] [PASSED] Link rate 270000 lane count 4
[11:22:25] [PASSED] Link rate 270000 lane count 2
[11:22:25] [PASSED] Link rate 270000 lane count 1
[11:22:25] [PASSED] Link rate 162000 lane count 4
[11:22:25] [PASSED] Link rate 162000 lane count 2
[11:22:25] [PASSED] Link rate 162000 lane count 1
[11:22:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:22:25] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:22:25] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:22:25] [PASSED] DP_POWER_UP_PHY with port number
[11:22:25] [PASSED] DP_POWER_DOWN_PHY with port number
[11:22:25] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:22:25] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:22:25] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:22:25] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:22:25] [PASSED] DP_QUERY_PAYLOAD with port number
[11:22:25] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:22:25] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:22:25] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:22:25] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:22:25] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:22:25] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:22:25] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:22:25] [PASSED] DP_REMOTE_I2C_READ with port number
[11:22:25] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:22:25] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:22:25] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:22:25] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:22:25] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:22:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:22:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:22:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:22:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:22:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:22:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:22:25] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:22:25] ================ [PASSED] drm_dp_mst_helper ================
[11:22:25] ================== drm_exec (7 subtests) ===================
[11:22:25] [PASSED] sanitycheck
[11:22:25] [PASSED] test_lock
[11:22:25] [PASSED] test_lock_unlock
[11:22:25] [PASSED] test_duplicates
[11:22:25] [PASSED] test_prepare
[11:22:25] [PASSED] test_prepare_array
[11:22:25] [PASSED] test_multiple_loops
[11:22:25] ==================== [PASSED] drm_exec =====================
[11:22:25] =========== drm_format_helper_test (17 subtests) ===========
[11:22:25] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:22:25] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:22:25] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:22:25] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:22:25] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:22:25] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:22:25] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:22:25] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:22:25] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:22:25] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:22:25] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:22:25] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:22:25] ==================== drm_test_fb_swab =====================
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ================ [PASSED] drm_test_fb_swab =================
[11:22:25] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:22:25] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:22:25] [PASSED] single_pixel_source_buffer
[11:22:25] [PASSED] single_pixel_clip_rectangle
[11:22:25] [PASSED] well_known_colors
[11:22:25] [PASSED] destination_pitch
[11:22:25] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:22:25] ================= drm_test_fb_clip_offset =================
[11:22:25] [PASSED] pass through
[11:22:25] [PASSED] horizontal offset
[11:22:25] [PASSED] vertical offset
[11:22:25] [PASSED] horizontal and vertical offset
[11:22:25] [PASSED] horizontal offset (custom pitch)
[11:22:25] [PASSED] vertical offset (custom pitch)
[11:22:25] [PASSED] horizontal and vertical offset (custom pitch)
[11:22:25] ============= [PASSED] drm_test_fb_clip_offset =============
[11:22:25] =================== drm_test_fb_memcpy ====================
[11:22:25] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:22:25] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:22:25] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:22:25] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:22:25] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:22:25] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:22:25] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:22:25] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:22:25] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:22:25] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:22:25] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:22:25] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:22:25] =============== [PASSED] drm_test_fb_memcpy ================
[11:22:25] ============= [PASSED] drm_format_helper_test ==============
[11:22:25] ================= drm_format (18 subtests) =================
[11:22:25] [PASSED] drm_test_format_block_width_invalid
[11:22:25] [PASSED] drm_test_format_block_width_one_plane
[11:22:25] [PASSED] drm_test_format_block_width_two_plane
[11:22:25] [PASSED] drm_test_format_block_width_three_plane
[11:22:25] [PASSED] drm_test_format_block_width_tiled
[11:22:25] [PASSED] drm_test_format_block_height_invalid
[11:22:25] [PASSED] drm_test_format_block_height_one_plane
[11:22:25] [PASSED] drm_test_format_block_height_two_plane
[11:22:25] [PASSED] drm_test_format_block_height_three_plane
[11:22:25] [PASSED] drm_test_format_block_height_tiled
[11:22:25] [PASSED] drm_test_format_min_pitch_invalid
[11:22:25] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:22:25] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:22:25] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:22:25] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:22:25] [PASSED] drm_test_format_min_pitch_two_plane
[11:22:25] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:22:25] [PASSED] drm_test_format_min_pitch_tiled
[11:22:25] =================== [PASSED] drm_format ====================
[11:22:25] ============== drm_framebuffer (10 subtests) ===============
[11:22:25] ========== drm_test_framebuffer_check_src_coords ==========
[11:22:25] [PASSED] Success: source fits into fb
[11:22:25] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:22:25] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:22:25] [PASSED] Fail: overflowing fb with source width
[11:22:25] [PASSED] Fail: overflowing fb with source height
[11:22:25] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:22:25] [PASSED] drm_test_framebuffer_cleanup
[11:22:25] =============== drm_test_framebuffer_create ===============
[11:22:25] [PASSED] ABGR8888 normal sizes
[11:22:25] [PASSED] ABGR8888 max sizes
[11:22:25] [PASSED] ABGR8888 pitch greater than min required
[11:22:25] [PASSED] ABGR8888 pitch less than min required
[11:22:25] [PASSED] ABGR8888 Invalid width
[11:22:25] [PASSED] ABGR8888 Invalid buffer handle
[11:22:25] [PASSED] No pixel format
[11:22:25] [PASSED] ABGR8888 Width 0
[11:22:25] [PASSED] ABGR8888 Height 0
[11:22:25] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:22:25] [PASSED] ABGR8888 Large buffer offset
[11:22:25] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:22:25] [PASSED] ABGR8888 Invalid flag
[11:22:25] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:22:25] [PASSED] ABGR8888 Valid buffer modifier
[11:22:25] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:22:25] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:22:25] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:22:25] [PASSED] NV12 Normal sizes
[11:22:25] [PASSED] NV12 Max sizes
[11:22:25] [PASSED] NV12 Invalid pitch
[11:22:25] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:22:25] [PASSED] NV12 different modifier per-plane
[11:22:25] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:22:25] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:22:25] [PASSED] NV12 Modifier for inexistent plane
[11:22:25] [PASSED] NV12 Handle for inexistent plane
[11:22:25] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:22:25] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:22:25] [PASSED] YVU420 Normal sizes
[11:22:25] [PASSED] YVU420 Max sizes
[11:22:25] [PASSED] YVU420 Invalid pitch
[11:22:25] [PASSED] YVU420 Different pitches
[11:22:25] [PASSED] YVU420 Different buffer offsets/pitches
[11:22:25] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:22:25] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:22:25] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:22:25] [PASSED] YVU420 Valid modifier
[11:22:25] [PASSED] YVU420 Different modifiers per plane
[11:22:25] [PASSED] YVU420 Modifier for inexistent plane
[11:22:25] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:22:25] [PASSED] X0L2 Normal sizes
[11:22:25] [PASSED] X0L2 Max sizes
[11:22:25] [PASSED] X0L2 Invalid pitch
[11:22:25] [PASSED] X0L2 Pitch greater than minimum required
[11:22:25] [PASSED] X0L2 Handle for inexistent plane
[11:22:25] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:22:25] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:22:25] [PASSED] X0L2 Valid modifier
[11:22:25] [PASSED] X0L2 Modifier for inexistent plane
[11:22:25] =========== [PASSED] drm_test_framebuffer_create ===========
[11:22:25] [PASSED] drm_test_framebuffer_free
[11:22:25] [PASSED] drm_test_framebuffer_init
[11:22:25] [PASSED] drm_test_framebuffer_init_bad_format
[11:22:25] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:22:25] [PASSED] drm_test_framebuffer_lookup
[11:22:25] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:22:25] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:22:25] ================= [PASSED] drm_framebuffer =================
[11:22:25] ================ drm_gem_shmem (8 subtests) ================
[11:22:25] [PASSED] drm_gem_shmem_test_obj_create
[11:22:25] [PASSED] drm_gem_shmem_test_obj_create_private
[11:22:25] [PASSED] drm_gem_shmem_test_pin_pages
[11:22:25] [PASSED] drm_gem_shmem_test_vmap
[11:22:25] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:22:25] [PASSED] drm_gem_shmem_test_get_sg_table
[11:22:25] [PASSED] drm_gem_shmem_test_madvise
[11:22:25] [PASSED] drm_gem_shmem_test_purge
[11:22:25] ================== [PASSED] drm_gem_shmem ==================
[11:22:25] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:22:25] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:22:25] [PASSED] Automatic
[11:22:25] [PASSED] Full
[11:22:25] [PASSED] Limited 16:235
[11:22:25] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:22:25] [PASSED] drm_test_check_disable_connector
[11:22:25] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:22:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:22:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:22:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:22:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:22:25] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:22:25] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:22:25] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:22:25] [PASSED] drm_test_check_output_bpc_dvi
[11:22:25] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:22:25] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:22:25] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:22:25] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:22:25] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:22:25] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:22:25] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:22:25] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:22:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:22:25] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:22:25] [PASSED] drm_test_check_broadcast_rgb_value
[11:22:25] [PASSED] drm_test_check_bpc_8_value
[11:22:25] [PASSED] drm_test_check_bpc_10_value
[11:22:25] [PASSED] drm_test_check_bpc_12_value
[11:22:25] [PASSED] drm_test_check_format_value
[11:22:25] [PASSED] drm_test_check_tmds_char_value
[11:22:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:22:25] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:22:25] [PASSED] drm_test_check_mode_valid
[11:22:25] [PASSED] drm_test_check_mode_valid_reject
[11:22:25] [PASSED] drm_test_check_mode_valid_reject_rate
[11:22:25] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:22:25] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:22:25] ================= drm_managed (2 subtests) =================
[11:22:25] [PASSED] drm_test_managed_release_action
[11:22:25] [PASSED] drm_test_managed_run_action
[11:22:25] =================== [PASSED] drm_managed ===================
[11:22:25] =================== drm_mm (6 subtests) ====================
[11:22:25] [PASSED] drm_test_mm_init
[11:22:25] [PASSED] drm_test_mm_debug
[11:22:25] [PASSED] drm_test_mm_align32
[11:22:25] [PASSED] drm_test_mm_align64
[11:22:25] [PASSED] drm_test_mm_lowest
[11:22:25] [PASSED] drm_test_mm_highest
[11:22:25] ===================== [PASSED] drm_mm ======================
[11:22:25] ============= drm_modes_analog_tv (5 subtests) =============
[11:22:25] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:22:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:22:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:22:25] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:22:25] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:22:25] =============== [PASSED] drm_modes_analog_tv ===============
[11:22:25] ============== drm_plane_helper (2 subtests) ===============
[11:22:25] =============== drm_test_check_plane_state ================
[11:22:25] [PASSED] clipping_simple
[11:22:25] [PASSED] clipping_rotate_reflect
[11:22:25] [PASSED] positioning_simple
[11:22:25] [PASSED] upscaling
[11:22:25] [PASSED] downscaling
[11:22:25] [PASSED] rounding1
[11:22:25] [PASSED] rounding2
[11:22:25] [PASSED] rounding3
[11:22:25] [PASSED] rounding4
[11:22:25] =========== [PASSED] drm_test_check_plane_state ============
[11:22:25] =========== drm_test_check_invalid_plane_state ============
[11:22:25] [PASSED] positioning_invalid
[11:22:25] [PASSED] upscaling_invalid
[11:22:25] [PASSED] downscaling_invalid
[11:22:25] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:22:25] ================ [PASSED] drm_plane_helper =================
[11:22:25] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:22:25] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:22:25] [PASSED] None
[11:22:25] [PASSED] PAL
[11:22:25] [PASSED] NTSC
[11:22:25] [PASSED] Both, NTSC Default
[11:22:25] [PASSED] Both, PAL Default
[11:22:25] [PASSED] Both, NTSC Default, with PAL on command-line
[11:22:25] [PASSED] Both, PAL Default, with NTSC on command-line
[11:22:25] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:22:25] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:22:25] ================== drm_rect (9 subtests) ===================
[11:22:25] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:22:25] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:22:25] [PASSED] drm_test_rect_clip_scaled_clipped
[11:22:25] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:22:25] ================= drm_test_rect_intersect =================
[11:22:25] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:22:25] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:22:25] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:22:25] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:22:25] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:22:25] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:22:25] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:22:25] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:22:25] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:22:25] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:22:25] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:22:25] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:22:25] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:22:25] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:22:25] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:22:25] ============= [PASSED] drm_test_rect_intersect =============
[11:22:25] ================ drm_test_rect_calc_hscale ================
[11:22:25] [PASSED] normal use
[11:22:25] [PASSED] out of max range
[11:22:25] [PASSED] out of min range
[11:22:25] [PASSED] zero dst
[11:22:25] [PASSED] negative src
[11:22:25] [PASSED] negative dst
[11:22:25] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:22:25] ================ drm_test_rect_calc_vscale ================
[11:22:25] [PASSED] normal use
[11:22:25] [PASSED] out of max range
[11:22:25] [PASSED] out of min range
[11:22:25] [PASSED] zero dst
[11:22:25] [PASSED] negative src
stty: 'standard input': Inappropriate ioctl for device
[11:22:25] [PASSED] negative dst
[11:22:25] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:22:25] ================== drm_test_rect_rotate ===================
[11:22:25] [PASSED] reflect-x
[11:22:25] [PASSED] reflect-y
[11:22:25] [PASSED] rotate-0
[11:22:25] [PASSED] rotate-90
[11:22:25] [PASSED] rotate-180
[11:22:25] [PASSED] rotate-270
[11:22:25] ============== [PASSED] drm_test_rect_rotate ===============
[11:22:25] ================ drm_test_rect_rotate_inv =================
[11:22:25] [PASSED] reflect-x
[11:22:25] [PASSED] reflect-y
[11:22:25] [PASSED] rotate-0
[11:22:25] [PASSED] rotate-90
[11:22:25] [PASSED] rotate-180
[11:22:25] [PASSED] rotate-270
[11:22:25] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:22:25] ==================== [PASSED] drm_rect =====================
[11:22:25] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:22:25] ============ drm_test_sysfb_build_fourcc_list =============
[11:22:25] [PASSED] no native formats
[11:22:25] [PASSED] XRGB8888 as native format
[11:22:25] [PASSED] remove duplicates
[11:22:25] [PASSED] convert alpha formats
[11:22:25] [PASSED] random formats
[11:22:25] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:22:25] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:22:25] ============================================================
[11:22:25] Testing complete. Ran 621 tests: passed: 621
[11:22:25] Elapsed time: 25.562s total, 1.662s configuring, 23.733s building, 0.134s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:22:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:22:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:22:36] Starting KUnit Kernel (1/1)...
[11:22:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:22:36] ================= ttm_device (5 subtests) ==================
[11:22:36] [PASSED] ttm_device_init_basic
[11:22:36] [PASSED] ttm_device_init_multiple
[11:22:36] [PASSED] ttm_device_fini_basic
[11:22:36] [PASSED] ttm_device_init_no_vma_man
[11:22:36] ================== ttm_device_init_pools ==================
[11:22:36] [PASSED] No DMA allocations, no DMA32 required
[11:22:36] [PASSED] DMA allocations, DMA32 required
[11:22:36] [PASSED] No DMA allocations, DMA32 required
[11:22:36] [PASSED] DMA allocations, no DMA32 required
[11:22:36] ============== [PASSED] ttm_device_init_pools ==============
[11:22:36] =================== [PASSED] ttm_device ====================
[11:22:36] ================== ttm_pool (8 subtests) ===================
[11:22:36] ================== ttm_pool_alloc_basic ===================
[11:22:36] [PASSED] One page
[11:22:36] [PASSED] More than one page
[11:22:36] [PASSED] Above the allocation limit
[11:22:36] [PASSED] One page, with coherent DMA mappings enabled
[11:22:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:22:36] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:22:36] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:22:36] [PASSED] One page
[11:22:36] [PASSED] More than one page
[11:22:36] [PASSED] Above the allocation limit
[11:22:36] [PASSED] One page, with coherent DMA mappings enabled
[11:22:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:22:36] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:22:36] [PASSED] ttm_pool_alloc_order_caching_match
[11:22:36] [PASSED] ttm_pool_alloc_caching_mismatch
[11:22:36] [PASSED] ttm_pool_alloc_order_mismatch
[11:22:36] [PASSED] ttm_pool_free_dma_alloc
[11:22:36] [PASSED] ttm_pool_free_no_dma_alloc
[11:22:36] [PASSED] ttm_pool_fini_basic
[11:22:36] ==================== [PASSED] ttm_pool =====================
[11:22:36] ================ ttm_resource (8 subtests) =================
[11:22:36] ================= ttm_resource_init_basic =================
[11:22:36] [PASSED] Init resource in TTM_PL_SYSTEM
[11:22:36] [PASSED] Init resource in TTM_PL_VRAM
[11:22:36] [PASSED] Init resource in a private placement
[11:22:36] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:22:36] ============= [PASSED] ttm_resource_init_basic =============
[11:22:36] [PASSED] ttm_resource_init_pinned
[11:22:36] [PASSED] ttm_resource_fini_basic
[11:22:36] [PASSED] ttm_resource_manager_init_basic
[11:22:36] [PASSED] ttm_resource_manager_usage_basic
[11:22:36] [PASSED] ttm_resource_manager_set_used_basic
[11:22:36] [PASSED] ttm_sys_man_alloc_basic
[11:22:36] [PASSED] ttm_sys_man_free_basic
[11:22:36] ================== [PASSED] ttm_resource ===================
[11:22:36] =================== ttm_tt (15 subtests) ===================
[11:22:36] ==================== ttm_tt_init_basic ====================
[11:22:36] [PASSED] Page-aligned size
[11:22:36] [PASSED] Extra pages requested
[11:22:36] ================ [PASSED] ttm_tt_init_basic ================
[11:22:36] [PASSED] ttm_tt_init_misaligned
[11:22:36] [PASSED] ttm_tt_fini_basic
[11:22:36] [PASSED] ttm_tt_fini_sg
[11:22:36] [PASSED] ttm_tt_fini_shmem
[11:22:36] [PASSED] ttm_tt_create_basic
[11:22:36] [PASSED] ttm_tt_create_invalid_bo_type
[11:22:36] [PASSED] ttm_tt_create_ttm_exists
[11:22:36] [PASSED] ttm_tt_create_failed
[11:22:36] [PASSED] ttm_tt_destroy_basic
[11:22:36] [PASSED] ttm_tt_populate_null_ttm
[11:22:36] [PASSED] ttm_tt_populate_populated_ttm
[11:22:36] [PASSED] ttm_tt_unpopulate_basic
[11:22:36] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:22:36] [PASSED] ttm_tt_swapin_basic
[11:22:36] ===================== [PASSED] ttm_tt ======================
[11:22:36] =================== ttm_bo (14 subtests) ===================
[11:22:36] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:22:36] [PASSED] Cannot be interrupted and sleeps
[11:22:36] [PASSED] Cannot be interrupted, locks straight away
[11:22:36] [PASSED] Can be interrupted, sleeps
[11:22:36] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:22:36] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:22:36] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:22:36] [PASSED] ttm_bo_reserve_double_resv
[11:22:36] [PASSED] ttm_bo_reserve_interrupted
[11:22:36] [PASSED] ttm_bo_reserve_deadlock
[11:22:36] [PASSED] ttm_bo_unreserve_basic
[11:22:36] [PASSED] ttm_bo_unreserve_pinned
[11:22:36] [PASSED] ttm_bo_unreserve_bulk
[11:22:36] [PASSED] ttm_bo_fini_basic
[11:22:36] [PASSED] ttm_bo_fini_shared_resv
[11:22:36] [PASSED] ttm_bo_pin_basic
[11:22:36] [PASSED] ttm_bo_pin_unpin_resource
[11:22:36] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:22:36] ===================== [PASSED] ttm_bo ======================
[11:22:36] ============== ttm_bo_validate (21 subtests) ===============
[11:22:36] ============== ttm_bo_init_reserved_sys_man ===============
[11:22:36] [PASSED] Buffer object for userspace
[11:22:36] [PASSED] Kernel buffer object
[11:22:36] [PASSED] Shared buffer object
[11:22:36] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:22:36] ============== ttm_bo_init_reserved_mock_man ==============
[11:22:36] [PASSED] Buffer object for userspace
[11:22:36] [PASSED] Kernel buffer object
[11:22:36] [PASSED] Shared buffer object
[11:22:36] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:22:36] [PASSED] ttm_bo_init_reserved_resv
[11:22:36] ================== ttm_bo_validate_basic ==================
[11:22:36] [PASSED] Buffer object for userspace
[11:22:36] [PASSED] Kernel buffer object
[11:22:36] [PASSED] Shared buffer object
[11:22:36] ============== [PASSED] ttm_bo_validate_basic ==============
[11:22:36] [PASSED] ttm_bo_validate_invalid_placement
[11:22:36] ============= ttm_bo_validate_same_placement ==============
[11:22:36] [PASSED] System manager
[11:22:36] [PASSED] VRAM manager
[11:22:36] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:22:36] [PASSED] ttm_bo_validate_failed_alloc
[11:22:36] [PASSED] ttm_bo_validate_pinned
[11:22:36] [PASSED] ttm_bo_validate_busy_placement
[11:22:36] ================ ttm_bo_validate_multihop =================
[11:22:36] [PASSED] Buffer object for userspace
[11:22:36] [PASSED] Kernel buffer object
[11:22:36] [PASSED] Shared buffer object
[11:22:36] ============ [PASSED] ttm_bo_validate_multihop =============
[11:22:36] ========== ttm_bo_validate_no_placement_signaled ==========
[11:22:36] [PASSED] Buffer object in system domain, no page vector
[11:22:36] [PASSED] Buffer object in system domain with an existing page vector
[11:22:36] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:22:36] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:22:36] [PASSED] Buffer object for userspace
[11:22:36] [PASSED] Kernel buffer object
[11:22:36] [PASSED] Shared buffer object
[11:22:36] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:22:36] [PASSED] ttm_bo_validate_move_fence_signaled
[11:22:36] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:22:36] [PASSED] Waits for GPU
[11:22:36] [PASSED] Tries to lock straight away
[11:22:36] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:22:36] [PASSED] ttm_bo_validate_happy_evict
[11:22:36] [PASSED] ttm_bo_validate_all_pinned_evict
[11:22:36] [PASSED] ttm_bo_validate_allowed_only_evict
[11:22:36] [PASSED] ttm_bo_validate_deleted_evict
[11:22:36] [PASSED] ttm_bo_validate_busy_domain_evict
[11:22:36] [PASSED] ttm_bo_validate_evict_gutting
[11:22:36] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[11:22:36] ================= [PASSED] ttm_bo_validate =================
[11:22:36] ============================================================
[11:22:36] Testing complete. Ran 101 tests: passed: 101
[11:22:36] Elapsed time: 11.263s total, 1.736s configuring, 9.260s building, 0.229s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 10:48 ` Tvrtko Ursulin
@ 2025-09-23 12:01 ` Ville Syrjälä
2025-09-23 12:25 ` Tvrtko Ursulin
0 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-23 12:01 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
>
> On 23/09/2025 11:19, Ville Syrjälä wrote:
> > On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
> >> Even though frame buffer objects are created as write-combined, in
> >> practice, on top of all the ring buffer flushing, an additional clflush
> >> seems to be needed before display engine can coherently scan out the
> >> AuxCCS compressed data without transient artifacts.
> >>
> >> If for comparison we look at how i915 handles things (where AuxCCS works
> >> fine), as it happens it has this same clflush before a frame buffer is
> >> pinned for display for the first time, courtesy the dynamic tracking of
> >> the buffer cache mode and setting the latter to uncached before handing
> >> to display.
> >>
> >> Since xe considers the buffer object caching mode as static we can
> >> implement the same approach by adding a flag telling us if the buffer
> >> was ever pinned for display and flush on the first pin. Subsequent re-pins
> >> will not repeat the clflush but so far I have not observed any glitching
> >> after the first pin.
> >>
> >> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> >> ---
> >> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
> >> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
> >> 2 files changed, 22 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >> index d8aa23b8cf14..f247c0da6b9e 100644
> >> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >> struct xe_bo *bo = gem_to_xe_bo(obj);
> >> struct xe_validation_ctx ctx;
> >> struct drm_exec exec;
> >> + bool first_pin;
> >> int ret = 0;
> >>
> >> if (!vma)
> >> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >> ret = xe_bo_validate(bo, NULL, true, &exec);
> >> drm_exec_retry_on_contention(&exec);
> >> xe_validation_retry_on_oom(&ctx, &ret);
> >> - if (!ret)
> >> + if (!ret) {
> >> ttm_bo_pin(&bo->ttm);
> >> + first_pin = !bo->display_pin;
> >> + bo->display_pin = true;
> >> + }
> >> }
> >> if (ret)
> >> goto err;
> >> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >> if (ret)
> >> goto err_unpin;
> >>
> >> + /*
> >> + * Force flush frame buffer data for non-coherent display access when
> >> + * AuxCCS formats are used.
> >> + */
> >> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
> >> + intel_fb_is_ccs_modifier(fb->base.modifier))
> >> + drm_clflush_sg(xe_bo_sg(bo));
> >
> > You still haven't found the actual bug that causes the dirty cache?
>
> Sadly no. I cross referenced everything numerous times, including
> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
> but this extra flush always remains required. I also heard that how
> flushing of the aux metadata works isn't documented anywhere and i915
> does have this flush, by design or accident I don't know.
i915 has the flush for the *whole* bo because it started out as
cached. As soon as it undergoes a cached->uncached change (either
due to set_caching ioctl or becoming a display scanout buffer) we
clflush it and switch the GPU page tables from WB to UC. After
that the bo stays uncached, and will need no further clflushes,
assuming that everyone follows the rules:
- CPU accesses via a WB mapping to an uncached bo will explicitly
clflush before (invalidate) and after (write-back) the access
- userspace always sets the GPU to use use "consult the PTE" MOCS
setting for any potential scanout buffer. That way the GPU will
use WB as long as the bo is cached, and once it becomes
uncached the GPU also switches to UC accesses
With xe I presume the BO should already start out as UC/WC with
clean caches, and nothing should be dirtying the caches unless
there is a real bug somewhere.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* ✓ Xe.CI.BAT: success for AuxCCS handling and render compression modifiers (rev16)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (17 preceding siblings ...)
2025-09-23 11:22 ` ✓ CI.KUnit: success " Patchwork
@ 2025-09-23 12:03 ` Patchwork
2025-09-23 13:26 ` ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev15) Patchwork
` (2 subsequent siblings)
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 12:03 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2524 bytes --]
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev16)
URL : https://patchwork.freedesktop.org/series/144186/
State : success
== Summary ==
CI Bug Log - changes from xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc_BAT -> xe-pw-144186v16_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 9)
------------------------------
Additional (2): bat-ptl-1 bat-ptl-2
Missing (2): bat-adlp-vm bat-ptl-vm
Known issues
------------
Here are the changes found in xe-pw-144186v16_BAT that come from known issues:
### IGT changes ###
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5765]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5765
[Intel XE#5766]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5766
[Intel XE#5769]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5769
[Intel XE#5771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5771
[Intel XE#5773]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5773
[Intel XE#5774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5774
[Intel XE#5775]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5775
[Intel XE#5776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5776
[Intel XE#5777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5777
[Intel XE#5778]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5778
[Intel XE#5780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5780
[Intel XE#5781]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5781
[Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
[Intel XE#6203]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6203
Build changes
-------------
* IGT: IGT_8549 -> IGT_8550
* Linux: xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc -> xe-pw-144186v16
IGT_8549: 8549
IGT_8550: 4f8c7886ad02e116804ec08714f17bce1755c6e4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc: d2f002c868da5926fabd73b1ba2ab7a2b66d81dc
xe-pw-144186v16: 144186v16
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/index.html
[-- Attachment #2: Type: text/html, Size: 1882 bytes --]
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 12:01 ` Ville Syrjälä
@ 2025-09-23 12:25 ` Tvrtko Ursulin
2025-09-23 13:20 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 12:25 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 23/09/2025 13:01, Ville Syrjälä wrote:
> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
>>
>> On 23/09/2025 11:19, Ville Syrjälä wrote:
>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
>>>> Even though frame buffer objects are created as write-combined, in
>>>> practice, on top of all the ring buffer flushing, an additional clflush
>>>> seems to be needed before display engine can coherently scan out the
>>>> AuxCCS compressed data without transient artifacts.
>>>>
>>>> If for comparison we look at how i915 handles things (where AuxCCS works
>>>> fine), as it happens it has this same clflush before a frame buffer is
>>>> pinned for display for the first time, courtesy the dynamic tracking of
>>>> the buffer cache mode and setting the latter to uncached before handing
>>>> to display.
>>>>
>>>> Since xe considers the buffer object caching mode as static we can
>>>> implement the same approach by adding a flag telling us if the buffer
>>>> was ever pinned for display and flush on the first pin. Subsequent re-pins
>>>> will not repeat the clflush but so far I have not observed any glitching
>>>> after the first pin.
>>>>
>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>>>> ---
>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>> index d8aa23b8cf14..f247c0da6b9e 100644
>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
>>>> struct xe_validation_ctx ctx;
>>>> struct drm_exec exec;
>>>> + bool first_pin;
>>>> int ret = 0;
>>>>
>>>> if (!vma)
>>>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
>>>> drm_exec_retry_on_contention(&exec);
>>>> xe_validation_retry_on_oom(&ctx, &ret);
>>>> - if (!ret)
>>>> + if (!ret) {
>>>> ttm_bo_pin(&bo->ttm);
>>>> + first_pin = !bo->display_pin;
>>>> + bo->display_pin = true;
>>>> + }
>>>> }
>>>> if (ret)
>>>> goto err;
>>>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>> if (ret)
>>>> goto err_unpin;
>>>>
>>>> + /*
>>>> + * Force flush frame buffer data for non-coherent display access when
>>>> + * AuxCCS formats are used.
>>>> + */
>>>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
>>>> + drm_clflush_sg(xe_bo_sg(bo));
>>>
>>> You still haven't found the actual bug that causes the dirty cache?
>>
>> Sadly no. I cross referenced everything numerous times, including
>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
>> but this extra flush always remains required. I also heard that how
>> flushing of the aux metadata works isn't documented anywhere and i915
>> does have this flush, by design or accident I don't know.
>
> i915 has the flush for the *whole* bo because it started out as
> cached. As soon as it undergoes a cached->uncached change (either
> due to set_caching ioctl or becoming a display scanout buffer) we
> clflush it and switch the GPU page tables from WB to UC. After
> that the bo stays uncached, and will need no further clflushes,
> assuming that everyone follows the rules:
>
> - CPU accesses via a WB mapping to an uncached bo will explicitly
> clflush before (invalidate) and after (write-back) the access
> - userspace always sets the GPU to use use "consult the PTE" MOCS
> setting for any potential scanout buffer. That way the GPU will
> use WB as long as the bo is cached, and once it becomes
> uncached the GPU also switches to UC accesses
>
> With xe I presume the BO should already start out as UC/WC with
> clean caches, and nothing should be dirtying the caches unless
> there is a real bug somewhere.
Correct, it is all WC and MOCS are correctly set as WC.
For example for the media compression flavour that was broken and needed
fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
index"). (For the render compression flavour MOCS was already correct.)
But MOCS is not enough on its own for some reason.
I also looked into the rendercopy surface state programming and that too
looks okay. In fact it is possible to see how using the wrong MOCS makes
things worse. But it also appears the surface state MOCS only applies to
the main surface, while the aux state is the one which appears to
contain cached/unflushed data.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 12:25 ` Tvrtko Ursulin
@ 2025-09-23 13:20 ` Ville Syrjälä
2025-09-23 14:40 ` Tvrtko Ursulin
0 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-23 13:20 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
>
> On 23/09/2025 13:01, Ville Syrjälä wrote:
> > On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
> >>
> >> On 23/09/2025 11:19, Ville Syrjälä wrote:
> >>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
> >>>> Even though frame buffer objects are created as write-combined, in
> >>>> practice, on top of all the ring buffer flushing, an additional clflush
> >>>> seems to be needed before display engine can coherently scan out the
> >>>> AuxCCS compressed data without transient artifacts.
> >>>>
> >>>> If for comparison we look at how i915 handles things (where AuxCCS works
> >>>> fine), as it happens it has this same clflush before a frame buffer is
> >>>> pinned for display for the first time, courtesy the dynamic tracking of
> >>>> the buffer cache mode and setting the latter to uncached before handing
> >>>> to display.
> >>>>
> >>>> Since xe considers the buffer object caching mode as static we can
> >>>> implement the same approach by adding a flag telling us if the buffer
> >>>> was ever pinned for display and flush on the first pin. Subsequent re-pins
> >>>> will not repeat the clflush but so far I have not observed any glitching
> >>>> after the first pin.
> >>>>
> >>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> >>>> ---
> >>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
> >>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
> >>>> 2 files changed, 22 insertions(+), 6 deletions(-)
> >>>>
> >>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>> index d8aa23b8cf14..f247c0da6b9e 100644
> >>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>> struct xe_bo *bo = gem_to_xe_bo(obj);
> >>>> struct xe_validation_ctx ctx;
> >>>> struct drm_exec exec;
> >>>> + bool first_pin;
> >>>> int ret = 0;
> >>>>
> >>>> if (!vma)
> >>>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>> ret = xe_bo_validate(bo, NULL, true, &exec);
> >>>> drm_exec_retry_on_contention(&exec);
> >>>> xe_validation_retry_on_oom(&ctx, &ret);
> >>>> - if (!ret)
> >>>> + if (!ret) {
> >>>> ttm_bo_pin(&bo->ttm);
> >>>> + first_pin = !bo->display_pin;
> >>>> + bo->display_pin = true;
> >>>> + }
> >>>> }
> >>>> if (ret)
> >>>> goto err;
> >>>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>> if (ret)
> >>>> goto err_unpin;
> >>>>
> >>>> + /*
> >>>> + * Force flush frame buffer data for non-coherent display access when
> >>>> + * AuxCCS formats are used.
> >>>> + */
> >>>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
> >>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
> >>>> + drm_clflush_sg(xe_bo_sg(bo));
> >>>
> >>> You still haven't found the actual bug that causes the dirty cache?
> >>
> >> Sadly no. I cross referenced everything numerous times, including
> >> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
> >> but this extra flush always remains required. I also heard that how
> >> flushing of the aux metadata works isn't documented anywhere and i915
> >> does have this flush, by design or accident I don't know.
> >
> > i915 has the flush for the *whole* bo because it started out as
> > cached. As soon as it undergoes a cached->uncached change (either
> > due to set_caching ioctl or becoming a display scanout buffer) we
> > clflush it and switch the GPU page tables from WB to UC. After
> > that the bo stays uncached, and will need no further clflushes,
> > assuming that everyone follows the rules:
> >
> > - CPU accesses via a WB mapping to an uncached bo will explicitly
> > clflush before (invalidate) and after (write-back) the access
> > - userspace always sets the GPU to use use "consult the PTE" MOCS
> > setting for any potential scanout buffer. That way the GPU will
> > use WB as long as the bo is cached, and once it becomes
> > uncached the GPU also switches to UC accesses
> >
> > With xe I presume the BO should already start out as UC/WC with
> > clean caches, and nothing should be dirtying the caches unless
> > there is a real bug somewhere.
>
> Correct, it is all WC and MOCS are correctly set as WC.
>
> For example for the media compression flavour that was broken and needed
> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
> index"). (For the render compression flavour MOCS was already correct.)
> But MOCS is not enough on its own for some reason.
>
> I also looked into the rendercopy surface state programming and that too
> looks okay. In fact it is possible to see how using the wrong MOCS makes
> things worse. But it also appears the surface state MOCS only applies to
> the main surface, while the aux state is the one which appears to
> contain cached/unflushed data.
Are you saying that if you start scanning out a compressed buffer,
then clean the caches, and then do frontbuffer rendering you get
more cache dirt?
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev15)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (18 preceding siblings ...)
2025-09-23 12:03 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-09-23 13:26 ` Patchwork
2025-09-23 14:12 ` ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev16) Patchwork
2025-09-23 20:12 ` [PATCH v12 00/13] AuxCCS handling and render compression modifiers Ville Syrjälä
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 13:26 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 172255 bytes --]
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev15)
URL : https://patchwork.freedesktop.org/series/144186/
State : failure
== Summary ==
CI Bug Log - changes from xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1_FULL -> xe-pw-144186v15_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-144186v15_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-144186v15_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-144186v15_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-c-hdmi-a-1-y:
- shard-adlp: NOTRUN -> [DMESG-WARN][1] +5 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-c-hdmi-a-1-y.html
* igt@kms_plane_multiple@tiling-none:
- shard-bmg: NOTRUN -> [TIMEOUT][2] +1 other test timeout
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@kms_plane_multiple@tiling-none.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@xe_exec_basic@once-userptr-rebind:
- shard-adlp: NOTRUN -> [INCOMPLETE][4] +2 other tests incomplete
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_exec_basic@once-userptr-rebind.html
* igt@xe_exec_compute_mode@many-execqueues-userptr-free:
- shard-adlp: NOTRUN -> [FAIL][5]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_exec_compute_mode@many-execqueues-userptr-free.html
- shard-bmg: NOTRUN -> [FAIL][6]
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_exec_compute_mode@many-execqueues-userptr-free.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][7]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-adlp: NOTRUN -> [DMESG-FAIL][8]
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_pm@s2idle-vm-bind-unbind-all.html
- shard-bmg: NOTRUN -> [DMESG-FAIL][9]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_pm@s2idle-vm-bind-unbind-all.html
New tests
---------
New tests have been introduced between xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1_FULL and xe-pw-144186v15_FULL:
### New IGT tests (44) ###
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.20] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.24] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.11] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.24] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.10] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.24] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
Known issues
------------
Here are the changes found in xe-pw-144186v15_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-read:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#1125]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@intel_hwmon@hwmon-read.html
- shard-adlp: NOTRUN -> [SKIP][11] ([Intel XE#1125] / [Intel XE#5574]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@intel_hwmon@hwmon-read.html
* igt@intel_hwmon@hwmon-write:
- shard-bmg: NOTRUN -> [FAIL][12] ([Intel XE#4665])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#623])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#1466])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2233])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-adlp: NOTRUN -> [DMESG-WARN][16] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_async_flips@test-cursor-atomic:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#664]) +1 other test skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_async_flips@test-cursor-atomic.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#3279]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2370]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2327]) +19 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-adlp: NOTRUN -> [SKIP][21] ([Intel XE#1124]) +58 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#316]) +16 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-adlp: NOTRUN -> [SKIP][23] ([Intel XE#619]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@4-tiled-addfb-size-offset-overflow:
- shard-adlp: NOTRUN -> [SKIP][24] ([Intel XE#607]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_big_fb@4-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-adlp: NOTRUN -> [SKIP][25] ([Intel XE#610]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#3658]) +3 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#1407]) +24 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#1124]) +58 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][29] ([Intel XE#316]) +22 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#1477]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#1428]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#610]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#1124]) +56 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-adlp: NOTRUN -> [DMESG-FAIL][34] ([Intel XE#4543]) +41 other tests dmesg-fail
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-dg2-set2: NOTRUN -> [SKIP][35] ([Intel XE#1124]) +46 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#619])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_big_fb@yf-tiled-addfb.html
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1467]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_big_fb@yf-tiled-addfb.html
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2328])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#607]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#610])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#2191]) +7 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2314] / [Intel XE#2894]) +4 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p:
- shard-adlp: NOTRUN -> [SKIP][43] ([Intel XE#2191]) +9 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#2191]) +4 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#1512]) +6 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#367]) +9 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#367]) +14 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2160x1440p:
- shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#367]) +7 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-4-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][49] ([Intel XE#367]) +15 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#2887]) +84 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#455] / [Intel XE#787]) +113 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#2907]) +3 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#2669]) +19 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-c-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][54] ([Intel XE#787]) +398 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-c-dp-2.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][55] ([Intel XE#455] / [Intel XE#787]) +133 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-adlp: NOTRUN -> [SKIP][56] ([Intel XE#3442]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
- shard-dg2-set2: NOTRUN -> [SKIP][57] ([Intel XE#3442]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#2669] / [Intel XE#3433]) +3 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#3432]) +9 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][60] ([Intel XE#787]) +200 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2652] / [Intel XE#787]) +31 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [DMESG-WARN][62] ([Intel XE#2953] / [Intel XE#4173]) +9 other tests dmesg-warn
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
- shard-lnl: NOTRUN -> [SKIP][63] ([Intel XE#3432]) +10 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][64] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][65] ([Intel XE#1727] / [Intel XE#3113])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2887]) +79 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][67] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][68] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-adlp: NOTRUN -> [SKIP][69] ([Intel XE#2907]) +8 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_cdclk@mode-transition:
- shard-adlp: NOTRUN -> [SKIP][70] ([Intel XE#4417] / [Intel XE#455])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-adlp: NOTRUN -> [SKIP][71] ([Intel XE#4418])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_cdclk@mode-transition-all-outputs.html
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#2724]) +2 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_cdclk@mode-transition-all-outputs.html
- shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#4418])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_cdclk@mode-transition-all-outputs.html
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#4418])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@mode-transition@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#4417]) +3 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html
* igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][76] ([Intel XE#4417]) +2 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-1.html
* igt@kms_cdclk@mode-transition@pipe-c-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#4417]) +3 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_cdclk@mode-transition@pipe-c-dp-4.html
* igt@kms_cdclk@plane-scaling:
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#4416]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_cdclk@plane-scaling.html
- shard-adlp: NOTRUN -> [SKIP][79] ([Intel XE#4416] / [Intel XE#455])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_cdclk@plane-scaling.html
* igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][80] ([Intel XE#4416]) +2 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-1.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-adlp: NOTRUN -> [SKIP][81] ([Intel XE#306]) +8 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_chamelium_color@ctm-0-25.html
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2325]) +8 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#306]) +9 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_color@degamma:
- shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#306]) +7 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-lnl: NOTRUN -> [SKIP][85] ([Intel XE#373]) +54 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_frames@dp-crc-multiple:
- shard-adlp: NOTRUN -> [SKIP][86] ([Intel XE#373]) +51 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_chamelium_frames@dp-crc-multiple.html
* igt@kms_chamelium_hpd@dp-hpd-storm:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2252]) +49 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_chamelium_hpd@dp-hpd-storm.html
* igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#373]) +37 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html
* igt@kms_content_protection@content-type-change:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#2341]) +4 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#2390]) +2 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_content_protection@dp-mst-lic-type-1.html
- shard-adlp: NOTRUN -> [SKIP][91] ([Intel XE#307]) +3 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2-set2: NOTRUN -> [SKIP][92] ([Intel XE#307]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#307]) +3 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@legacy:
- shard-adlp: NOTRUN -> [SKIP][94] ([Intel XE#455]) +114 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_content_protection@legacy.html
- shard-bmg: NOTRUN -> [FAIL][95] ([Intel XE#1178]) +7 other tests fail
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2-set2: NOTRUN -> [FAIL][96] ([Intel XE#1178]) +4 other tests fail
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][97] ([Intel XE#3304])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html
* igt@kms_content_protection@mei-interface:
- shard-lnl: NOTRUN -> [SKIP][98] ([Intel XE#1468])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@uevent:
- shard-dg2-set2: NOTRUN -> [FAIL][99] ([Intel XE#1188]) +1 other test fail
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_content_protection@uevent.html
- shard-lnl: NOTRUN -> [SKIP][100] ([Intel XE#3278]) +8 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_content_protection@uevent.html
- shard-bmg: NOTRUN -> [FAIL][101] ([Intel XE#1188]) +1 other test fail
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-128x42:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#2320]) +25 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-128x42.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][103] ([Intel XE#308]) +6 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-adlp: NOTRUN -> [SKIP][104] ([Intel XE#308]) +8 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-lnl: NOTRUN -> [SKIP][105] ([Intel XE#2321]) +8 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_cursor_crc@cursor-random-512x170.html
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#2321]) +7 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-sliding-64x21:
- shard-lnl: NOTRUN -> [SKIP][107] ([Intel XE#1424]) +28 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_cursor_crc@cursor-sliding-64x21.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][108] ([Intel XE#309]) +27 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-lnl: NOTRUN -> [SKIP][109] ([Intel XE#309]) +27 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: NOTRUN -> [SKIP][110] ([Intel XE#2291]) +6 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2-set2: NOTRUN -> [SKIP][111] ([Intel XE#323]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-lnl: NOTRUN -> [SKIP][112] ([Intel XE#323]) +2 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-adlp: NOTRUN -> [SKIP][113] ([Intel XE#323]) +2 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#2286]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-lnl: NOTRUN -> [SKIP][115] ([Intel XE#1508])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][116] ([Intel XE#5428])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#1508]) +1 other test skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][118] ([Intel XE#1340])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][119] ([Intel XE#4494] / [i915#3804])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_dp_aux_dev:
- shard-adlp: NOTRUN -> [SKIP][120] ([Intel XE#3009])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_dp_aux_dev.html
- shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#3009])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_dp_aux_dev.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#4354])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-adlp: NOTRUN -> [SKIP][123] ([Intel XE#4354]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][124] ([Intel XE#4354]) +3 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_dp_link_training@uhbr-mst.html
- shard-adlp: NOTRUN -> [SKIP][125] ([Intel XE#4356]) +1 other test skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_dp_link_training@uhbr-mst.html
- shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#4354]) +2 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#4356])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-lnl: NOTRUN -> [SKIP][128] ([Intel XE#4294])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_dp_linktrain_fallback@dp-fallback.html
- shard-bmg: NOTRUN -> [FAIL][129] ([Intel XE#4367])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-adlp: NOTRUN -> [SKIP][130] ([Intel XE#4331]) +1 other test skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html
- shard-dg2-set2: NOTRUN -> [SKIP][131] ([Intel XE#4331])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_dp_linktrain_fallback@dsc-fallback.html
- shard-lnl: NOTRUN -> [SKIP][132] ([Intel XE#4331])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html
- shard-bmg: NOTRUN -> [SKIP][133] ([Intel XE#4331])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-lnl: NOTRUN -> [SKIP][134] ([Intel XE#2244]) +7 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-output-formats:
- shard-bmg: NOTRUN -> [SKIP][135] ([Intel XE#2244]) +6 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_dsc@dsc-with-output-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-dg2-set2: NOTRUN -> [SKIP][136] ([Intel XE#4422]) +2 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
- shard-adlp: NOTRUN -> [SKIP][137] ([Intel XE#4422]) +2 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
- shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#4422]) +2 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-lnl: NOTRUN -> [SKIP][139] ([Intel XE#4422]) +2 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: NOTRUN -> [SKIP][140] ([Intel XE#5425]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_fbcon_fbt@psr:
- shard-adlp: NOTRUN -> [SKIP][141] ([Intel XE#776]) +1 other test skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_fbcon_fbt@psr.html
- shard-dg2-set2: NOTRUN -> [SKIP][142] ([Intel XE#776])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@kms_fbcon_fbt@psr.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][143] ([Intel XE#776]) +1 other test skip
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@chamelium:
- shard-bmg: NOTRUN -> [SKIP][144] ([Intel XE#2372])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_feature_discovery@chamelium.html
- shard-dg2-set2: NOTRUN -> [SKIP][145] ([Intel XE#701])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_feature_discovery@chamelium.html
- shard-lnl: NOTRUN -> [SKIP][146] ([Intel XE#701])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_feature_discovery@chamelium.html
- shard-adlp: NOTRUN -> [SKIP][147] ([Intel XE#701])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-2x:
- shard-lnl: NOTRUN -> [SKIP][148] ([Intel XE#702])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_feature_discovery@display-2x.html
- shard-adlp: NOTRUN -> [SKIP][149] ([Intel XE#702])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@display-3x:
- shard-lnl: NOTRUN -> [SKIP][150] ([Intel XE#703])
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_feature_discovery@display-3x.html
- shard-adlp: NOTRUN -> [SKIP][151] ([Intel XE#703])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_feature_discovery@display-3x.html
- shard-bmg: NOTRUN -> [SKIP][152] ([Intel XE#2373])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_feature_discovery@display-3x.html
- shard-dg2-set2: NOTRUN -> [SKIP][153] ([Intel XE#703])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@display-4x:
- shard-lnl: NOTRUN -> [SKIP][154] ([Intel XE#1138])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_feature_discovery@display-4x.html
- shard-adlp: NOTRUN -> [SKIP][155] ([Intel XE#1138])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_feature_discovery@display-4x.html
- shard-bmg: NOTRUN -> [SKIP][156] ([Intel XE#1138])
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_feature_discovery@display-4x.html
* igt@kms_feature_discovery@dp-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][157] ([Intel XE#1137])
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_feature_discovery@dp-mst.html
- shard-lnl: NOTRUN -> [SKIP][158] ([Intel XE#1137])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_feature_discovery@dp-mst.html
* igt@kms_feature_discovery@psr1:
- shard-adlp: NOTRUN -> [SKIP][159] ([Intel XE#1135]) +1 other test skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_feature_discovery@psr1.html
- shard-bmg: NOTRUN -> [SKIP][160] ([Intel XE#2374]) +1 other test skip
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_feature_discovery@psr1.html
- shard-dg2-set2: NOTRUN -> [SKIP][161] ([Intel XE#1135])
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-adlp: NOTRUN -> [SKIP][162] ([Intel XE#310]) +35 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_flip@2x-blocking-wf_vblank.html
- shard-bmg: NOTRUN -> [SKIP][163] ([Intel XE#2316]) +4 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-lnl: NOTRUN -> [SKIP][164] ([Intel XE#1421]) +36 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-hdmi-a6-dp4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][165] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-hdmi-a6-dp4.html
* igt@kms_flip@bo-too-big-interruptible:
- shard-lnl: NOTRUN -> [TIMEOUT][166] ([Intel XE#1504] / [Intel XE#5737]) +1 other test timeout
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_flip@bo-too-big-interruptible.html
* igt@kms_flip@flip-vs-panning:
- shard-adlp: NOTRUN -> [DMESG-WARN][167] ([Intel XE#4543]) +41 other tests dmesg-warn
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_flip@flip-vs-panning.html
* igt@kms_flip@flip-vs-panning-interruptible:
- shard-adlp: NOTRUN -> [DMESG-WARN][168] ([Intel XE#4543] / [Intel XE#5208])
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_flip@flip-vs-panning-interruptible.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-adlp: NOTRUN -> [DMESG-WARN][169] ([Intel XE#5208])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: NOTRUN -> [INCOMPLETE][170] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][171] ([Intel XE#1397]) +7 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
- shard-lnl: NOTRUN -> [FAIL][172] ([Intel XE#4683]) +3 other tests fail
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][173] ([Intel XE#2293]) +23 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][174] ([Intel XE#1401]) +26 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][175] ([Intel XE#2380]) +1 other test skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
- shard-lnl: NOTRUN -> [SKIP][176] ([Intel XE#1397] / [Intel XE#1745]) +7 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [FAIL][177] ([Intel XE#3106] / [Intel XE#4683]) +1 other test fail
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-lnl: NOTRUN -> [SKIP][178] ([Intel XE#1401] / [Intel XE#1745]) +26 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][179] ([Intel XE#2293] / [Intel XE#2380]) +23 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-adlp: NOTRUN -> [DMESG-FAIL][180] ([Intel XE#4543] / [Intel XE#4921]) +7 other tests dmesg-fail
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_force_connector_basic@force-connector-state:
- shard-lnl: NOTRUN -> [SKIP][181] ([Intel XE#352]) +1 other test skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen:
- shard-adlp: NOTRUN -> [SKIP][182] ([Intel XE#651]) +78 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-adlp: NOTRUN -> [SKIP][183] ([Intel XE#656]) +224 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][184] ([Intel XE#651]) +121 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][185] ([Intel XE#5390]) +74 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][186] ([Intel XE#2311]) +144 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][187] ([Intel XE#2312]) +30 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][188] ([Intel XE#651]) +78 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][189] ([Intel XE#658]) +1 other test skip
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
- shard-lnl: NOTRUN -> [SKIP][190] ([Intel XE#1469]) +2 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
- shard-bmg: NOTRUN -> [SKIP][191] ([Intel XE#2352]) +2 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][192] ([Intel XE#2313]) +142 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-adlp: NOTRUN -> [SKIP][193] ([Intel XE#1151]) +2 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-bmg: NOTRUN -> [SKIP][194] ([Intel XE#5672])
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@plane-fbc-rte:
- shard-dg2-set2: NOTRUN -> [SKIP][195] ([Intel XE#1158])
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
- shard-adlp: NOTRUN -> [SKIP][196] ([Intel XE#1158])
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
- shard-bmg: NOTRUN -> [SKIP][197] ([Intel XE#2350])
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-pgflip-blt:
- shard-adlp: NOTRUN -> [SKIP][198] ([Intel XE#653]) +82 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-dg2-set2: NOTRUN -> [SKIP][199] ([Intel XE#653]) +117 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][200] ([Intel XE#656]) +222 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_hdmi_inject@inject-4k:
- shard-lnl: NOTRUN -> [SKIP][201] ([Intel XE#1470])
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_hdmi_inject@inject-4k.html
* igt@kms_hdmi_inject@inject-audio:
- shard-lnl: NOTRUN -> [SKIP][202] ([Intel XE#1470] / [Intel XE#2853])
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@brightness-with-hdr:
- shard-lnl: NOTRUN -> [SKIP][203] ([Intel XE#3374] / [Intel XE#3544])
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_hdr@brightness-with-hdr.html
- shard-bmg: NOTRUN -> [SKIP][204] ([Intel XE#3374] / [Intel XE#3544])
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-lnl: NOTRUN -> [SKIP][205] ([Intel XE#1503]) +3 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_hdr@static-swap:
- shard-bmg: NOTRUN -> [SKIP][206] ([Intel XE#1503])
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_hdr@static-swap.html
* igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][207] ([Intel XE#1450]) +1 other test skip
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html
* igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [SKIP][208] ([Intel XE#1450] / [Intel XE#2568]) +1 other test skip
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1.html
* igt@kms_joiner@basic-big-joiner:
- shard-lnl: NOTRUN -> [SKIP][209] ([Intel XE#346]) +1 other test skip
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_joiner@basic-big-joiner.html
- shard-adlp: NOTRUN -> [SKIP][210] ([Intel XE#346]) +1 other test skip
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_joiner@basic-big-joiner.html
- shard-bmg: NOTRUN -> [SKIP][211] ([Intel XE#346]) +1 other test skip
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][212] ([Intel XE#4298])
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_joiner@basic-max-non-joiner.html
- shard-lnl: NOTRUN -> [SKIP][213] ([Intel XE#4298])
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_joiner@basic-max-non-joiner.html
- shard-adlp: NOTRUN -> [SKIP][214] ([Intel XE#4298])
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-lnl: NOTRUN -> [SKIP][215] ([Intel XE#2927]) +1 other test skip
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_joiner@basic-ultra-joiner.html
- shard-adlp: NOTRUN -> [SKIP][216] ([Intel XE#2927]) +1 other test skip
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_joiner@basic-ultra-joiner.html
- shard-bmg: NOTRUN -> [SKIP][217] ([Intel XE#2927]) +1 other test skip
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][218] ([Intel XE#346])
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-adlp: NOTRUN -> [SKIP][219] ([Intel XE#3012]) +1 other test skip
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-adlp: NOTRUN -> [SKIP][220] ([Intel XE#2925]) +1 other test skip
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
- shard-bmg: NOTRUN -> [SKIP][221] ([Intel XE#2934])
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][222] ([Intel XE#2927]) +1 other test skip
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][223] ([Intel XE#4090])
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-dg2-set2: NOTRUN -> [SKIP][224] ([Intel XE#2925]) +1 other test skip
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-lnl: NOTRUN -> [SKIP][225] ([Intel XE#2925]) +1 other test skip
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-adlp: NOTRUN -> [SKIP][226] ([Intel XE#356])
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
- shard-bmg: NOTRUN -> [SKIP][227] ([Intel XE#2501])
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
- shard-dg2-set2: NOTRUN -> [SKIP][228] ([Intel XE#356])
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
- shard-lnl: NOTRUN -> [SKIP][229] ([Intel XE#356])
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_panel_fitting@legacy:
- shard-bmg: NOTRUN -> [SKIP][230] ([Intel XE#2486]) +1 other test skip
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_panel_fitting@legacy.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-bmg: NOTRUN -> [SKIP][231] ([Intel XE#4329])
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
- shard-dg2-set2: NOTRUN -> [SKIP][232] ([Intel XE#4359])
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
- shard-lnl: NOTRUN -> [SKIP][233] ([Intel XE#4329])
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0:
- shard-lnl: NOTRUN -> [FAIL][234] ([Intel XE#5195]) +2 other tests fail
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0.html
- shard-adlp: NOTRUN -> [FAIL][235] ([Intel XE#5195]) +4 other tests fail
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-2-size-128:
- shard-dg2-set2: NOTRUN -> [FAIL][236] ([Intel XE#616]) +5 other tests fail
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-2-size-128.html
* igt@kms_plane_lowres@tiling-x@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][237] ([Intel XE#599]) +13 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][238] ([Intel XE#2393]) +1 other test skip
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-adlp: NOTRUN -> [SKIP][239] ([Intel XE#4596]) +4 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-lnl: NOTRUN -> [SKIP][240] ([Intel XE#4596]) +4 other tests skip
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][241] ([Intel XE#5021])
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-bmg: NOTRUN -> [SKIP][242] ([Intel XE#5021]) +1 other test skip
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_plane_multiple@tiling-4:
- shard-adlp: NOTRUN -> [SKIP][243] ([Intel XE#5020]) +1 other test skip
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_plane_multiple@tiling-4.html
* igt@kms_plane_multiple@tiling-x@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [FAIL][244] ([Intel XE#4658]) +3 other tests fail
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_plane_multiple@tiling-x@pipe-c-edp-1.html
* igt@kms_plane_multiple@tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][245] ([Intel XE#5020])
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_plane_multiple@tiling-y.html
- shard-lnl: NOTRUN -> [SKIP][246] ([Intel XE#5020])
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_multiple@tiling-yf:
- shard-bmg: NOTRUN -> [SKIP][247] ([Intel XE#5020]) +1 other test skip
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-lnl: NOTRUN -> [SKIP][248] ([Intel XE#3307])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c:
- shard-lnl: NOTRUN -> [SKIP][249] ([Intel XE#2763]) +49 other tests skip
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
- shard-bmg: NOTRUN -> [SKIP][250] ([Intel XE#2763]) +19 other tests skip
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html
* igt@kms_pm_backlight@bad-brightness:
- shard-bmg: NOTRUN -> [SKIP][251] ([Intel XE#870]) +4 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_pm_backlight@bad-brightness.html
- shard-adlp: NOTRUN -> [SKIP][252] ([Intel XE#870]) +4 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][253] ([Intel XE#2938])
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@kms_pm_backlight@brightness-with-dpms.html
- shard-adlp: NOTRUN -> [SKIP][254] ([Intel XE#2938])
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@kms_pm_backlight@brightness-with-dpms.html
- shard-dg2-set2: NOTRUN -> [SKIP][255] ([Intel XE#2938])
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][256] ([Intel XE#870]) +2 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-adlp: NOTRUN -> [SKIP][257] ([Intel XE#1122])
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_pm_dc@dc3co-vpb-simulation.html
- shard-dg2-set2: NOTRUN -> [SKIP][258] ([Intel XE#1122])
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_pm_dc@dc3co-vpb-simulation.html
- shard-lnl: NOTRUN -> [SKIP][259] ([Intel XE#736])
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_pm_dc@dc3co-vpb-simulation.html
- shard-bmg: NOTRUN -> [SKIP][260] ([Intel XE#2391])
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc5-dpms-negative:
- shard-lnl: NOTRUN -> [SKIP][261] ([Intel XE#1131])
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_pm_dc@dc5-dpms-negative.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2-set2: NOTRUN -> [SKIP][262] ([Intel XE#1129]) +1 other test skip
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-lnl: NOTRUN -> [SKIP][263] ([Intel XE#3309])
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_pm_dc@dc5-retention-flops.html
- shard-adlp: NOTRUN -> [SKIP][264] ([Intel XE#3309])
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_pm_dc@dc5-retention-flops.html
- shard-bmg: NOTRUN -> [SKIP][265] ([Intel XE#3309])
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@dc6-psr:
- shard-bmg: NOTRUN -> [SKIP][266] ([Intel XE#2392]) +1 other test skip
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_pm_dc@dc6-psr.html
- shard-adlp: NOTRUN -> [SKIP][267] ([Intel XE#1129]) +1 other test skip
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-adlp: NOTRUN -> [SKIP][268] ([Intel XE#734])
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_dc@deep-pkgc:
- shard-lnl: NOTRUN -> [FAIL][269] ([Intel XE#2029])
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_pm_dc@deep-pkgc.html
- shard-adlp: NOTRUN -> [SKIP][270] ([Intel XE#2007])
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@kms_pm_dc@deep-pkgc.html
- shard-bmg: NOTRUN -> [SKIP][271] ([Intel XE#2505])
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_rpm@basic-pci-d3-state:
- shard-adlp: NOTRUN -> [SKIP][272] ([Intel XE#6070])
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_pm_rpm@basic-pci-d3-state.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][273] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) +3 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][274] ([Intel XE#1439] / [Intel XE#836])
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-lnl: NOTRUN -> [SKIP][275] ([Intel XE#1439] / [Intel XE#836])
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-adlp: NOTRUN -> [SKIP][276] ([Intel XE#836]) +4 other tests skip
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-lnl: NOTRUN -> [SKIP][277] ([Intel XE#1439] / [Intel XE#3141]) +3 other tests skip
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
- shard-adlp: NOTRUN -> [SKIP][278] ([Intel XE#1406] / [Intel XE#1489]) +45 other tests skip
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][279] ([Intel XE#1406] / [Intel XE#4608]) +23 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][280] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608]) +11 other tests skip
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][281] ([Intel XE#1406] / [Intel XE#2893]) +22 other tests skip
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][282] ([Intel XE#1406] / [Intel XE#1489]) +34 other tests skip
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][283] ([Intel XE#1406] / [Intel XE#1489]) +39 other tests skip
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-lnl: NOTRUN -> [SKIP][284] ([Intel XE#1128] / [Intel XE#1406]) +3 other tests skip
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2-set2: NOTRUN -> [SKIP][285] ([Intel XE#1122] / [Intel XE#1406]) +3 other tests skip
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][286] ([Intel XE#1406] / [Intel XE#2387]) +3 other tests skip
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_psr2_su@page_flip-xrgb8888.html
- shard-adlp: NOTRUN -> [SKIP][287] ([Intel XE#1122] / [Intel XE#1406] / [Intel XE#5580]) +3 other tests skip
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-pr-sprite-blt:
- shard-adlp: NOTRUN -> [SKIP][288] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +72 other tests skip
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_psr@fbc-pr-sprite-blt.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][289] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +66 other tests skip
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_psr@fbc-psr2-no-drrs@edp-1:
- shard-lnl: NOTRUN -> [SKIP][290] ([Intel XE#1406] / [Intel XE#4609]) +11 other tests skip
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_psr@fbc-psr2-no-drrs@edp-1.html
* igt@kms_psr@pr-sprite-render:
- shard-lnl: NOTRUN -> [SKIP][291] ([Intel XE#1406]) +36 other tests skip
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_psr@pr-sprite-render.html
* igt@kms_psr@psr-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][292] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +49 other tests skip
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@kms_psr@psr-dpms.html
* igt@kms_psr@psr2-primary-render:
- shard-bmg: NOTRUN -> [SKIP][293] ([Intel XE#1406] / [Intel XE#2234])
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_psr@psr2-primary-render.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-adlp: NOTRUN -> [SKIP][294] ([Intel XE#1406] / [Intel XE#2939] / [Intel XE#5585]) +1 other test skip
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
- shard-bmg: NOTRUN -> [SKIP][295] ([Intel XE#1406] / [Intel XE#2414])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-lnl: NOTRUN -> [SKIP][296] ([Intel XE#3414] / [Intel XE#3904]) +11 other tests skip
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_rotation_crc@primary-x-tiled-reflect-x-180:
- shard-lnl: NOTRUN -> [FAIL][297] ([Intel XE#4689]) +1 other test fail
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@kms_rotation_crc@primary-x-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-dg2-set2: NOTRUN -> [SKIP][298] ([Intel XE#1127]) +1 other test skip
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-bmg: NOTRUN -> [SKIP][299] ([Intel XE#2330]) +3 other tests skip
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-dg2-set2: NOTRUN -> [SKIP][300] ([Intel XE#3414]) +7 other tests skip
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-lnl: NOTRUN -> [SKIP][301] ([Intel XE#1127]) +3 other tests skip
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
- shard-adlp: NOTRUN -> [SKIP][302] ([Intel XE#1127]) +3 other tests skip
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][303] ([Intel XE#3414] / [Intel XE#3904]) +8 other tests skip
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_rotation_crc@sprite-rotation-270:
- shard-adlp: NOTRUN -> [SKIP][304] ([Intel XE#3414]) +9 other tests skip
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_rotation_crc@sprite-rotation-270.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-bmg: NOTRUN -> [SKIP][305] ([Intel XE#2413]) +2 other tests skip
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-bmg: NOTRUN -> [SKIP][306] ([Intel XE#1435])
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-lnl: NOTRUN -> [SKIP][307] ([Intel XE#1435]) +4 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-adlp: NOTRUN -> [SKIP][308] ([Intel XE#362]) +1 other test skip
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@kms_tiled_display@basic-test-pattern.html
- shard-bmg: NOTRUN -> [SKIP][309] ([Intel XE#2426]) +1 other test skip
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-lnl: NOTRUN -> [SKIP][310] ([Intel XE#362]) +1 other test skip
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
- shard-dg2-set2: NOTRUN -> [SKIP][311] ([Intel XE#1500])
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_tv_load_detect@load-detect:
- shard-adlp: NOTRUN -> [SKIP][312] ([Intel XE#330])
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@kms_tv_load_detect@load-detect.html
- shard-bmg: NOTRUN -> [SKIP][313] ([Intel XE#2450])
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@flipline:
- shard-dg2-set2: NOTRUN -> [SKIP][314] ([Intel XE#455]) +63 other tests skip
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@kms_vrr@flipline.html
* igt@kms_vrr@lobf:
- shard-adlp: NOTRUN -> [SKIP][315] ([Intel XE#2168]) +1 other test skip
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@kms_vrr@lobf.html
- shard-bmg: NOTRUN -> [SKIP][316] ([Intel XE#2168]) +1 other test skip
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@kms_vrr@lobf.html
- shard-dg2-set2: NOTRUN -> [SKIP][317] ([Intel XE#2168]) +1 other test skip
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@kms_vrr@lobf.html
* igt@kms_vrr@max-min:
- shard-bmg: NOTRUN -> [SKIP][318] ([Intel XE#1499]) +6 other tests skip
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@kms_vrr@max-min.html
* igt@kms_vrr@negative-basic:
- shard-lnl: NOTRUN -> [SKIP][319] ([Intel XE#1499]) +3 other tests skip
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@kms_vrr@negative-basic.html
* igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
- shard-lnl: NOTRUN -> [SKIP][320] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
* igt@xe_ccs@block-copy-compressed-inc-dimension:
- shard-adlp: NOTRUN -> [SKIP][321] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607]) +6 other tests skip
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_ccs@block-copy-compressed-inc-dimension.html
* igt@xe_ccs@large-ctrl-surf-copy:
- shard-adlp: NOTRUN -> [SKIP][322] ([Intel XE#3576] / [Intel XE#5610])
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_ccs@large-ctrl-surf-copy.html
* igt@xe_compute@ccs-mode-basic:
- shard-bmg: NOTRUN -> [FAIL][323] ([Intel XE#5794])
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_compute@ccs-mode-basic.html
- shard-adlp: NOTRUN -> [SKIP][324] ([Intel XE#1447] / [Intel XE#5617])
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_compute@ccs-mode-basic.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-lnl: NOTRUN -> [SKIP][325] ([Intel XE#1447]) +1 other test skip
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_compute@ccs-mode-compute-kernel.html
- shard-adlp: NOTRUN -> [SKIP][326] ([Intel XE#1447] / [Intel XE#5596])
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_compute@ccs-mode-compute-kernel.html
- shard-bmg: NOTRUN -> [FAIL][327] ([Intel XE#5963])
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_compute_preempt@compute-preempt:
- shard-dg2-set2: NOTRUN -> [SKIP][328] ([Intel XE#1280] / [Intel XE#455]) +3 other tests skip
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_compute_preempt@compute-preempt-many:
- shard-adlp: NOTRUN -> [SKIP][329] ([Intel XE#455] / [Intel XE#5632]) +3 other tests skip
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_compute_preempt@compute-preempt-many.html
- shard-dg2-set2: NOTRUN -> [FAIL][330] ([Intel XE#5890]) +1 other test fail
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_compute_preempt@compute-preempt-many.html
* igt@xe_configfs@survivability-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][331] ([Intel XE#6010])
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_configfs@survivability-mode.html
- shard-lnl: NOTRUN -> [SKIP][332] ([Intel XE#6010])
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_configfs@survivability-mode.html
- shard-adlp: NOTRUN -> [SKIP][333] ([Intel XE#6010])
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_configfs@survivability-mode.html
* igt@xe_copy_basic@mem-copy-linear-0x369:
- shard-adlp: NOTRUN -> [SKIP][334] ([Intel XE#1123]) +3 other tests skip
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_copy_basic@mem-copy-linear-0x369.html
* igt@xe_copy_basic@mem-copy-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][335] ([Intel XE#1123]) +1 other test skip
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
* igt@xe_copy_basic@mem-set-linear-0x3fff:
- shard-adlp: NOTRUN -> [SKIP][336] ([Intel XE#1126]) +2 other tests skip
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@xe_copy_basic@mem-set-linear-0x3fff.html
* igt@xe_copy_basic@mem-set-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][337] ([Intel XE#1126]) +1 other test skip
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_copy_basic@mem-set-linear-0xfffe.html
* igt@xe_create@create-big-vram:
- shard-lnl: NOTRUN -> [SKIP][338] ([Intel XE#1062])
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_create@create-big-vram.html
- shard-adlp: NOTRUN -> [SKIP][339] ([Intel XE#1062])
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_create@create-big-vram.html
* igt@xe_create@multigpu-create-massive-size:
- shard-bmg: NOTRUN -> [SKIP][340] ([Intel XE#2504])
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eu_stall@blocking-re-enable:
- shard-adlp: NOTRUN -> [SKIP][341] ([Intel XE#5626]) +7 other tests skip
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_eu_stall@blocking-re-enable.html
* igt@xe_eu_stall@blocking-read:
- shard-dg2-set2: NOTRUN -> [SKIP][342] ([Intel XE#5626]) +6 other tests skip
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@xe_eu_stall@blocking-read.html
* igt@xe_eudebug@basic-vm-access-faultable:
- shard-lnl: NOTRUN -> [SKIP][343] ([Intel XE#4837]) +74 other tests skip
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_eudebug@basic-vm-access-faultable.html
* igt@xe_eudebug@basic-vm-access-parameters-userptr-faultable:
- shard-dg2-set2: NOTRUN -> [SKIP][344] ([Intel XE#4837]) +55 other tests skip
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_eudebug@basic-vm-access-parameters-userptr-faultable.html
* igt@xe_eudebug_online@set-breakpoint-faultable:
- shard-bmg: NOTRUN -> [SKIP][345] ([Intel XE#4837]) +68 other tests skip
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@xe_eudebug_online@set-breakpoint-faultable.html
* igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
- shard-adlp: NOTRUN -> [SKIP][346] ([Intel XE#4837] / [Intel XE#5565]) +74 other tests skip
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
* igt@xe_eudebug_sriov@deny-sriov:
- shard-dg2-set2: NOTRUN -> [SKIP][347] ([Intel XE#4518])
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@xe_eudebug_sriov@deny-sriov.html
- shard-lnl: NOTRUN -> [SKIP][348] ([Intel XE#4518])
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@xe_eudebug_sriov@deny-sriov.html
- shard-adlp: NOTRUN -> [SKIP][349] ([Intel XE#4519]) +1 other test skip
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_eudebug_sriov@deny-sriov.html
- shard-bmg: NOTRUN -> [SKIP][350] ([Intel XE#5793]) +1 other test skip
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@xe_eudebug_sriov@deny-sriov.html
* igt@xe_evict@evict-beng-large-external-cm:
- shard-lnl: NOTRUN -> [SKIP][351] ([Intel XE#688]) +27 other tests skip
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_evict@evict-beng-large-external-cm.html
* igt@xe_evict@evict-large-cm:
- shard-adlp: NOTRUN -> [SKIP][352] ([Intel XE#261] / [Intel XE#5564]) +9 other tests skip
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_evict@evict-large-cm.html
* igt@xe_evict@evict-small:
- shard-adlp: NOTRUN -> [SKIP][353] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688]) +8 other tests skip
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_evict@evict-small.html
* igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
- shard-adlp: NOTRUN -> [SKIP][354] ([Intel XE#688]) +6 other tests skip
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-bmg: NOTRUN -> [SKIP][355] ([Intel XE#2322]) +46 other tests skip
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind:
- shard-adlp: NOTRUN -> [SKIP][356] ([Intel XE#1392] / [Intel XE#5575]) +49 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind.html
* igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
- shard-dg2-set2: NOTRUN -> [SKIP][357] ([Intel XE#1392]) +6 other tests skip
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
* igt@xe_exec_basic@multigpu-no-exec-userptr:
- shard-lnl: NOTRUN -> [SKIP][358] ([Intel XE#1392]) +49 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_exec_basic@multigpu-no-exec-userptr.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-imm:
- shard-bmg: NOTRUN -> [FAIL][359] ([Intel XE#6050])
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_exec_fault_mode@many-execqueues-userptr-imm.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-rebind:
- shard-adlp: NOTRUN -> [SKIP][360] ([Intel XE#288] / [Intel XE#5561]) +144 other tests skip
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_exec_fault_mode@many-execqueues-userptr-rebind.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][361] ([Intel XE#288]) +102 other tests skip
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-dg2-set2: NOTRUN -> [SKIP][362] ([Intel XE#2360]) +2 other tests skip
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_exec_mix_modes@exec-spinner-interrupted-lr:
- shard-adlp: NOTRUN -> [SKIP][363] ([Intel XE#2360]) +3 other tests skip
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html
* igt@xe_exec_reset@cat-error:
- shard-adlp: NOTRUN -> [DMESG-WARN][364] ([Intel XE#3868])
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_exec_reset@cat-error.html
* igt@xe_exec_reset@cm-cat-error:
- shard-adlp: NOTRUN -> [DMESG-FAIL][365] ([Intel XE#3868])
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_exec_reset@cm-cat-error.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-adlp: NOTRUN -> [DMESG-WARN][366] ([Intel XE#3876])
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_exec_reset@parallel-gt-reset.html
- shard-bmg: NOTRUN -> [DMESG-WARN][367] ([Intel XE#3876])
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][368] ([Intel XE#4943]) +131 other tests skip
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html
* igt@xe_exec_system_allocator@once-large-mmap-shared-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][369] ([Intel XE#4915]) +1046 other tests skip
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_exec_system_allocator@once-large-mmap-shared-nomemset.html
* igt@xe_exec_system_allocator@process-many-stride-mmap-mlock:
- shard-adlp: NOTRUN -> [SKIP][370] ([Intel XE#4915]) +1430 other tests skip
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_exec_system_allocator@process-many-stride-mmap-mlock.html
* igt@xe_exec_system_allocator@process-many-stride-mmap-remap-dontunmap-eocheck:
- shard-bmg: NOTRUN -> [ABORT][371] ([Intel XE#5790])
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_exec_system_allocator@process-many-stride-mmap-remap-dontunmap-eocheck.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-free-huge:
- shard-lnl: NOTRUN -> [SKIP][372] ([Intel XE#4943]) +139 other tests skip
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-free-huge.html
* igt@xe_exec_threads@threads-shared-vm-userptr-invalidate:
- shard-adlp: NOTRUN -> [DMESG-FAIL][373] ([Intel XE#3876])
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_exec_threads@threads-shared-vm-userptr-invalidate.html
- shard-bmg: NOTRUN -> [DMESG-FAIL][374] ([Intel XE#3876])
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_exec_threads@threads-shared-vm-userptr-invalidate.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-lnl: NOTRUN -> [ABORT][375] ([Intel XE#5466])
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
- shard-adlp: NOTRUN -> [ABORT][376] ([Intel XE#5530])
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
- shard-bmg: NOTRUN -> [ABORT][377] ([Intel XE#5466] / [Intel XE#5530])
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
- shard-lnl: NOTRUN -> [ABORT][378] ([Intel XE#4757])
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
* igt@xe_live_ktest@xe_bo:
- shard-adlp: NOTRUN -> [SKIP][379] ([Intel XE#2229] / [Intel XE#455]) +1 other test skip
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- shard-adlp: NOTRUN -> [SKIP][380] ([Intel XE#2229])
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_live_ktest@xe_eudebug:
- shard-lnl: NOTRUN -> [SKIP][381] ([Intel XE#2833])
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_live_ktest@xe_eudebug.html
- shard-bmg: NOTRUN -> [SKIP][382] ([Intel XE#2833])
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@xe_live_ktest@xe_eudebug.html
- shard-adlp: NOTRUN -> [SKIP][383] ([Intel XE#455] / [Intel XE#5712])
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- shard-dg2-set2: NOTRUN -> [SKIP][384] ([Intel XE#2229])
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- shard-lnl: NOTRUN -> [SKIP][385] ([Intel XE#2229]) +1 other test skip
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- shard-adlp: NOTRUN -> [SKIP][386] ([Intel XE#2229] / [Intel XE#5488])
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_media_fill@media-fill:
- shard-dg2-set2: NOTRUN -> [SKIP][387] ([Intel XE#560])
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@xe_media_fill@media-fill.html
- shard-lnl: NOTRUN -> [SKIP][388] ([Intel XE#560])
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_media_fill@media-fill.html
- shard-bmg: NOTRUN -> [SKIP][389] ([Intel XE#2459] / [Intel XE#2596])
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_media_fill@media-fill.html
* igt@xe_mmap@pci-membarrier:
- shard-lnl: NOTRUN -> [SKIP][390] ([Intel XE#5100]) +3 other tests skip
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_mmap@pci-membarrier.html
- shard-adlp: NOTRUN -> [SKIP][391] ([Intel XE#5100]) +3 other tests skip
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_mmap@pci-membarrier.html
* igt@xe_mmap@small-bar:
- shard-lnl: NOTRUN -> [SKIP][392] ([Intel XE#512])
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_mmap@small-bar.html
- shard-adlp: NOTRUN -> [SKIP][393] ([Intel XE#512])
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_mmap@small-bar.html
- shard-bmg: NOTRUN -> [SKIP][394] ([Intel XE#586])
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_mmap@small-bar.html
- shard-dg2-set2: NOTRUN -> [SKIP][395] ([Intel XE#512])
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_mmap@small-bar.html
* igt@xe_mmap@vram:
- shard-lnl: NOTRUN -> [SKIP][396] ([Intel XE#1416])
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_mmap@vram.html
- shard-adlp: NOTRUN -> [SKIP][397] ([Intel XE#1008] / [Intel XE#5591])
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_mmap@vram.html
* igt@xe_module_load@force-load:
- shard-dg2-set2: NOTRUN -> [SKIP][398] ([Intel XE#378])
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_module_load@force-load.html
- shard-lnl: NOTRUN -> [SKIP][399] ([Intel XE#378])
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_module_load@force-load.html
- shard-bmg: NOTRUN -> [SKIP][400] ([Intel XE#2457])
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_module_load@force-load.html
- shard-adlp: NOTRUN -> [SKIP][401] ([Intel XE#378] / [Intel XE#5612])
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_module_load@force-load.html
* igt@xe_noexec_ping_pong:
- shard-adlp: NOTRUN -> [SKIP][402] ([Intel XE#379] / [Intel XE#5613])
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_noexec_ping_pong.html
- shard-lnl: NOTRUN -> [SKIP][403] ([Intel XE#379])
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_noexec_ping_pong.html
* igt@xe_oa@buffer-size:
- shard-dg2-set2: NOTRUN -> [SKIP][404] ([Intel XE#6032])
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@xe_oa@buffer-size.html
* igt@xe_oa@mmio-triggered-reports:
- shard-adlp: NOTRUN -> [SKIP][405] ([Intel XE#3573]) +40 other tests skip
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_oa@mmio-triggered-reports.html
* igt@xe_oa@mmio-triggered-reports-read:
- shard-adlp: NOTRUN -> [SKIP][406] ([Intel XE#6032]) +1 other test skip
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@xe_oa@mmio-triggered-reports-read.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-lnl: NOTRUN -> [SKIP][407] ([Intel XE#2248])
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_oa@oa-tlb-invalidate.html
- shard-bmg: NOTRUN -> [SKIP][408] ([Intel XE#2248])
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_oa@syncs-ufence-wait:
- shard-dg2-set2: NOTRUN -> [SKIP][409] ([Intel XE#3573]) +27 other tests skip
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@xe_oa@syncs-ufence-wait.html
* igt@xe_pat@display-vs-wb-transient:
- shard-dg2-set2: NOTRUN -> [SKIP][410] ([Intel XE#1337])
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@xe_pat@display-vs-wb-transient.html
- shard-adlp: NOTRUN -> [SKIP][411] ([Intel XE#1337] / [Intel XE#5572])
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_pat@display-vs-wb-transient.html
* igt@xe_pat@pat-index-xe2:
- shard-adlp: NOTRUN -> [SKIP][412] ([Intel XE#977])
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- shard-dg2-set2: NOTRUN -> [SKIP][413] ([Intel XE#2838] / [Intel XE#979])
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_pat@pat-index-xehpc.html
- shard-lnl: NOTRUN -> [SKIP][414] ([Intel XE#1420] / [Intel XE#2838])
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_pat@pat-index-xehpc.html
- shard-adlp: NOTRUN -> [SKIP][415] ([Intel XE#2838] / [Intel XE#979])
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_pat@pat-index-xehpc.html
- shard-bmg: NOTRUN -> [SKIP][416] ([Intel XE#1420])
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- shard-lnl: NOTRUN -> [SKIP][417] ([Intel XE#977])
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_pat@pat-index-xelp.html
- shard-bmg: NOTRUN -> [SKIP][418] ([Intel XE#2245])
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- shard-adlp: NOTRUN -> [SKIP][419] ([Intel XE#979])
[419]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_pat@pat-index-xelpg.html
- shard-bmg: NOTRUN -> [SKIP][420] ([Intel XE#2236])
[420]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_pat@pat-index-xelpg.html
- shard-dg2-set2: NOTRUN -> [SKIP][421] ([Intel XE#979])
[421]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_pat@pat-index-xelpg.html
- shard-lnl: NOTRUN -> [SKIP][422] ([Intel XE#979])
[422]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_pat@pat-index-xelpg.html
* igt@xe_peer2peer@read:
- shard-lnl: NOTRUN -> [SKIP][423] ([Intel XE#1061]) +1 other test skip
[423]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_peer2peer@read.html
- shard-bmg: NOTRUN -> [SKIP][424] ([Intel XE#2427])
[424]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_peer2peer@read.html
* igt@xe_peer2peer@write:
- shard-adlp: NOTRUN -> [SKIP][425] ([Intel XE#1061] / [Intel XE#5568]) +1 other test skip
[425]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_peer2peer@write.html
- shard-dg2-set2: NOTRUN -> [FAIL][426] ([Intel XE#1173]) +1 other test fail
[426]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-basic:
- shard-lnl: NOTRUN -> [SKIP][427] ([Intel XE#2284] / [Intel XE#366]) +7 other tests skip
[427]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@d3cold-i2c:
- shard-dg2-set2: NOTRUN -> [SKIP][428] ([Intel XE#5694])
[428]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_pm@d3cold-i2c.html
- shard-lnl: NOTRUN -> [SKIP][429] ([Intel XE#5694])
[429]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_pm@d3cold-i2c.html
- shard-bmg: NOTRUN -> [SKIP][430] ([Intel XE#5694])
[430]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@xe_pm@d3cold-i2c.html
- shard-adlp: NOTRUN -> [SKIP][431] ([Intel XE#5694])
[431]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_pm@d3cold-i2c.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-dg2-set2: NOTRUN -> [SKIP][432] ([Intel XE#2284] / [Intel XE#366]) +7 other tests skip
[432]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@d3cold-mocs:
- shard-lnl: NOTRUN -> [SKIP][433] ([Intel XE#2284])
[433]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_pm@d3cold-mocs.html
- shard-adlp: NOTRUN -> [SKIP][434] ([Intel XE#2284])
[434]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_pm@d3cold-mocs.html
- shard-dg2-set2: NOTRUN -> [SKIP][435] ([Intel XE#2284])
[435]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-adlp: NOTRUN -> [SKIP][436] ([Intel XE#2284] / [Intel XE#366]) +7 other tests skip
[436]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_pm@d3cold-multiple-execs.html
- shard-bmg: NOTRUN -> [SKIP][437] ([Intel XE#2284]) +7 other tests skip
[437]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pm@d3hot-i2c:
- shard-lnl: NOTRUN -> [SKIP][438] ([Intel XE#5742])
[438]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_pm@d3hot-i2c.html
- shard-adlp: NOTRUN -> [SKIP][439] ([Intel XE#5742])
[439]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_pm@d3hot-i2c.html
- shard-bmg: NOTRUN -> [SKIP][440] ([Intel XE#5742])
[440]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@d3hot-mmap-vram:
- shard-lnl: NOTRUN -> [SKIP][441] ([Intel XE#1948])
[441]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_pm@d3hot-mmap-vram.html
- shard-adlp: NOTRUN -> [SKIP][442] ([Intel XE#1948])
[442]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_pm@d3hot-mmap-vram.html
* igt@xe_pm@s2idle-basic:
- shard-adlp: NOTRUN -> [DMESG-WARN][443] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504])
[443]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_pm@s2idle-basic.html
* igt@xe_pm@s3-mocs:
- shard-lnl: NOTRUN -> [SKIP][444] ([Intel XE#584]) +9 other tests skip
[444]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_pm@s3-mocs.html
* igt@xe_pm@s3-multiple-execs:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][445] ([Intel XE#569])
[445]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_pm@s3-multiple-execs.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-dg2-set2: NOTRUN -> [SKIP][446] ([Intel XE#579])
[446]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_pm@vram-d3cold-threshold.html
- shard-lnl: NOTRUN -> [SKIP][447] ([Intel XE#579])
[447]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_pm@vram-d3cold-threshold.html
- shard-adlp: NOTRUN -> [SKIP][448] ([Intel XE#5611] / [Intel XE#579])
[448]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_pm@vram-d3cold-threshold.html
- shard-bmg: NOTRUN -> [SKIP][449] ([Intel XE#579])
[449]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0:
- shard-adlp: NOTRUN -> [TIMEOUT][450] ([Intel XE#5213]) +1 other test timeout
[450]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0.html
* igt@xe_pmu@fn-engine-activity-load:
- shard-dg2-set2: NOTRUN -> [SKIP][451] ([Intel XE#4650]) +1 other test skip
[451]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_pmu@fn-engine-activity-load.html
* igt@xe_pmu@fn-engine-activity-load@engine-drm_xe_engine_class_video_decode0:
- shard-bmg: NOTRUN -> [DMESG-WARN][452] ([Intel XE#6190]) +29 other tests dmesg-warn
[452]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_pmu@fn-engine-activity-load@engine-drm_xe_engine_class_video_decode0.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-lnl: NOTRUN -> [SKIP][453] ([Intel XE#4650]) +2 other tests skip
[453]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
- shard-bmg: NOTRUN -> [DMESG-WARN][454] ([Intel XE#3876] / [Intel XE#6190])
[454]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_pxp@display-pxp-fb:
- shard-adlp: NOTRUN -> [SKIP][455] ([Intel XE#4733]) +1 other test skip
[455]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_pxp@display-pxp-fb.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-adlp: NOTRUN -> [SKIP][456] ([Intel XE#4733] / [Intel XE#5594]) +12 other tests skip
[456]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_pxp@pxp-stale-queue-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][457] ([Intel XE#4733]) +7 other tests skip
[457]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@xe_pxp@pxp-stale-queue-post-suspend.html
* igt@xe_pxp@pxp-termination-key-update-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][458] ([Intel XE#4733]) +14 other tests skip
[458]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-dg2-set2: NOTRUN -> [SKIP][459] ([Intel XE#944]) +13 other tests skip
[459]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@xe_query@multigpu-query-cs-cycles.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-adlp: NOTRUN -> [SKIP][460] ([Intel XE#944]) +17 other tests skip
[460]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-bmg: NOTRUN -> [SKIP][461] ([Intel XE#944]) +12 other tests skip
[461]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@xe_query@multigpu-query-mem-usage.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-lnl: NOTRUN -> [SKIP][462] ([Intel XE#944]) +17 other tests skip
[462]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_render_copy@render-stress-2-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][463] ([Intel XE#4814]) +2 other tests skip
[463]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_render_copy@render-stress-2-copies.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-adlp: NOTRUN -> [SKIP][464] ([Intel XE#4814] / [Intel XE#5614]) +3 other tests skip
[464]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_render_copy@render-stress-4-copies.html
* igt@xe_spin_batch@spin-mem-copy:
- shard-dg2-set2: NOTRUN -> [SKIP][465] ([Intel XE#4821])
[465]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_spin_batch@spin-mem-copy.html
- shard-adlp: NOTRUN -> [SKIP][466] ([Intel XE#4821])
[466]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_spin_batch@spin-mem-copy.html
* igt@xe_sriov_auto_provisioning@exclusive-ranges:
- shard-dg2-set2: NOTRUN -> [SKIP][467] ([Intel XE#4130]) +3 other tests skip
[467]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
* igt@xe_sriov_auto_provisioning@fair-allocation:
- shard-lnl: NOTRUN -> [SKIP][468] ([Intel XE#4130]) +5 other tests skip
[468]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_sriov_auto_provisioning@fair-allocation.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: NOTRUN -> [SKIP][469] ([Intel XE#3342])
[469]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_sriov_flr@flr-vf1-clear.html
- shard-lnl: NOTRUN -> [SKIP][470] ([Intel XE#3342])
[470]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_sriov_flr@flr-vf1-clear.html
* igt@xe_sriov_flr@flr-vfs-parallel:
- shard-dg2-set2: NOTRUN -> [SKIP][471] ([Intel XE#4273]) +1 other test skip
[471]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_sriov_flr@flr-vfs-parallel.html
- shard-lnl: NOTRUN -> [SKIP][472] ([Intel XE#4273]) +1 other test skip
[472]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_sriov_flr@flr-vfs-parallel.html
* igt@xe_sriov_scheduling@equal-throughput:
- shard-adlp: NOTRUN -> [DMESG-FAIL][473] ([Intel XE#5213]) +1 other test dmesg-fail
[473]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_sriov_scheduling@equal-throughput.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-dg2-set2: NOTRUN -> [SKIP][474] ([Intel XE#4351]) +1 other test skip
[474]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
- shard-lnl: NOTRUN -> [SKIP][475] ([Intel XE#4351]) +1 other test skip
[475]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
#### Possible fixes ####
* igt@xe_module_load@load:
- shard-dg2-set2: ([ABORT][476], [ABORT][477], [ABORT][478], [ABORT][479], [ABORT][480], [ABORT][481], [ABORT][482], [ABORT][483], [ABORT][484], [ABORT][485], [ABORT][486], [ABORT][487], [ABORT][488], [ABORT][489], [ABORT][490], [ABORT][491], [ABORT][492], [ABORT][493], [ABORT][494], [ABORT][495], [ABORT][496], [ABORT][497]) ([Intel XE#6201]) -> ([PASS][498], [PASS][499], [PASS][500], [PASS][501], [PASS][502], [PASS][503], [PASS][504], [PASS][505], [PASS][506], [PASS][507], [PASS][508], [PASS][509], [PASS][510], [PASS][511], [PASS][512], [PASS][513], [PASS][514], [PASS][515], [PASS][516], [PASS][517], [PASS][518])
[476]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-434/igt@xe_module_load@load.html
[477]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-434/igt@xe_module_load@load.html
[478]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-434/igt@xe_module_load@load.html
[479]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-434/igt@xe_module_load@load.html
[480]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-464/igt@xe_module_load@load.html
[481]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-464/igt@xe_module_load@load.html
[482]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-464/igt@xe_module_load@load.html
[483]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-464/igt@xe_module_load@load.html
[484]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-433/igt@xe_module_load@load.html
[485]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-433/igt@xe_module_load@load.html
[486]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-433/igt@xe_module_load@load.html
[487]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-433/igt@xe_module_load@load.html
[488]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-436/igt@xe_module_load@load.html
[489]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-436/igt@xe_module_load@load.html
[490]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-436/igt@xe_module_load@load.html
[491]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-436/igt@xe_module_load@load.html
[492]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-466/igt@xe_module_load@load.html
[493]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-466/igt@xe_module_load@load.html
[494]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-466/igt@xe_module_load@load.html
[495]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-466/igt@xe_module_load@load.html
[496]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-432/igt@xe_module_load@load.html
[497]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-dg2-432/igt@xe_module_load@load.html
[498]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_module_load@load.html
[499]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_module_load@load.html
[500]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@xe_module_load@load.html
[501]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_module_load@load.html
[502]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-434/igt@xe_module_load@load.html
[503]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_module_load@load.html
[504]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@xe_module_load@load.html
[505]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@xe_module_load@load.html
[506]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_module_load@load.html
[507]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@xe_module_load@load.html
[508]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_module_load@load.html
[509]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@xe_module_load@load.html
[510]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-436/igt@xe_module_load@load.html
[511]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-433/igt@xe_module_load@load.html
[512]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-432/igt@xe_module_load@load.html
[513]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_module_load@load.html
[514]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-466/igt@xe_module_load@load.html
[515]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@xe_module_load@load.html
[516]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-463/igt@xe_module_load@load.html
[517]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_module_load@load.html
[518]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-dg2-464/igt@xe_module_load@load.html
#### Warnings ####
* igt@xe_module_load@load:
- shard-lnl: ([ABORT][519], [ABORT][520], [ABORT][521], [ABORT][522], [ABORT][523], [ABORT][524], [ABORT][525], [ABORT][526], [ABORT][527], [ABORT][528], [ABORT][529], [ABORT][530], [ABORT][531], [ABORT][532], [ABORT][533], [ABORT][534], [ABORT][535], [ABORT][536], [ABORT][537], [ABORT][538], [ABORT][539], [ABORT][540]) ([Intel XE#6201]) -> ([PASS][541], [SKIP][542], [PASS][543], [PASS][544], [PASS][545], [PASS][546], [PASS][547], [PASS][548], [PASS][549], [PASS][550], [PASS][551], [PASS][552], [PASS][553], [PASS][554], [PASS][555], [PASS][556], [PASS][557], [PASS][558], [PASS][559], [PASS][560], [PASS][561], [PASS][562], [PASS][563], [PASS][564], [PASS][565], [PASS][566]) ([Intel XE#378])
[519]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-1/igt@xe_module_load@load.html
[520]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-1/igt@xe_module_load@load.html
[521]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-1/igt@xe_module_load@load.html
[522]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-1/igt@xe_module_load@load.html
[523]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-8/igt@xe_module_load@load.html
[524]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-8/igt@xe_module_load@load.html
[525]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-8/igt@xe_module_load@load.html
[526]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-4/igt@xe_module_load@load.html
[527]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-4/igt@xe_module_load@load.html
[528]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-4/igt@xe_module_load@load.html
[529]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-4/igt@xe_module_load@load.html
[530]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-3/igt@xe_module_load@load.html
[531]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-3/igt@xe_module_load@load.html
[532]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-3/igt@xe_module_load@load.html
[533]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-3/igt@xe_module_load@load.html
[534]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-7/igt@xe_module_load@load.html
[535]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-7/igt@xe_module_load@load.html
[536]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-7/igt@xe_module_load@load.html
[537]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-5/igt@xe_module_load@load.html
[538]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-5/igt@xe_module_load@load.html
[539]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-5/igt@xe_module_load@load.html
[540]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-lnl-5/igt@xe_module_load@load.html
[541]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_module_load@load.html
[542]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_module_load@load.html
[543]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_module_load@load.html
[544]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_module_load@load.html
[545]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_module_load@load.html
[546]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_module_load@load.html
[547]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_module_load@load.html
[548]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_module_load@load.html
[549]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_module_load@load.html
[550]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_module_load@load.html
[551]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_module_load@load.html
[552]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-2/igt@xe_module_load@load.html
[553]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_module_load@load.html
[554]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_module_load@load.html
[555]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_module_load@load.html
[556]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_module_load@load.html
[557]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@xe_module_load@load.html
[558]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-7/igt@xe_module_load@load.html
[559]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_module_load@load.html
[560]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_module_load@load.html
[561]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-4/igt@xe_module_load@load.html
[562]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-5/igt@xe_module_load@load.html
[563]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@xe_module_load@load.html
[564]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-3/igt@xe_module_load@load.html
[565]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-1/igt@xe_module_load@load.html
[566]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-lnl-8/igt@xe_module_load@load.html
- shard-bmg: ([ABORT][567], [ABORT][568], [ABORT][569], [ABORT][570], [ABORT][571], [ABORT][572], [ABORT][573], [ABORT][574], [ABORT][575], [ABORT][576], [ABORT][577], [ABORT][578], [ABORT][579], [ABORT][580], [ABORT][581], [ABORT][582], [ABORT][583], [ABORT][584], [ABORT][585], [ABORT][586]) ([Intel XE#6201]) -> ([PASS][587], [SKIP][588], [PASS][589], [PASS][590], [PASS][591], [PASS][592], [PASS][593], [PASS][594], [PASS][595], [PASS][596], [PASS][597], [PASS][598], [PASS][599], [PASS][600], [PASS][601], [PASS][602], [PASS][603], [PASS][604], [PASS][605], [PASS][606], [PASS][607], [PASS][608], [PASS][609], [PASS][610], [PASS][611], [PASS][612]) ([Intel XE#2457])
[567]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-4/igt@xe_module_load@load.html
[568]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-4/igt@xe_module_load@load.html
[569]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-8/igt@xe_module_load@load.html
[570]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-8/igt@xe_module_load@load.html
[571]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-1/igt@xe_module_load@load.html
[572]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-1/igt@xe_module_load@load.html
[573]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-7/igt@xe_module_load@load.html
[574]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-7/igt@xe_module_load@load.html
[575]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-7/igt@xe_module_load@load.html
[576]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-2/igt@xe_module_load@load.html
[577]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-2/igt@xe_module_load@load.html
[578]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-2/igt@xe_module_load@load.html
[579]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-6/igt@xe_module_load@load.html
[580]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-3/igt@xe_module_load@load.html
[581]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-3/igt@xe_module_load@load.html
[582]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-3/igt@xe_module_load@load.html
[583]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-5/igt@xe_module_load@load.html
[584]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-5/igt@xe_module_load@load.html
[585]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-5/igt@xe_module_load@load.html
[586]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-bmg-5/igt@xe_module_load@load.html
[587]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@xe_module_load@load.html
[588]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@xe_module_load@load.html
[589]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@xe_module_load@load.html
[590]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_module_load@load.html
[591]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@xe_module_load@load.html
[592]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_module_load@load.html
[593]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@xe_module_load@load.html
[594]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@xe_module_load@load.html
[595]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@xe_module_load@load.html
[596]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_module_load@load.html
[597]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_module_load@load.html
[598]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-3/igt@xe_module_load@load.html
[599]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@xe_module_load@load.html
[600]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@xe_module_load@load.html
[601]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-5/igt@xe_module_load@load.html
[602]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@xe_module_load@load.html
[603]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@xe_module_load@load.html
[604]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@xe_module_load@load.html
[605]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-8/igt@xe_module_load@load.html
[606]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_module_load@load.html
[607]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-4/igt@xe_module_load@load.html
[608]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_module_load@load.html
[609]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-1/igt@xe_module_load@load.html
[610]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-6/igt@xe_module_load@load.html
[611]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-7/igt@xe_module_load@load.html
[612]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-bmg-2/igt@xe_module_load@load.html
- shard-adlp: ([ABORT][613], [ABORT][614], [ABORT][615], [ABORT][616], [ABORT][617], [ABORT][618], [ABORT][619], [ABORT][620], [ABORT][621], [ABORT][622], [ABORT][623], [ABORT][624], [ABORT][625], [ABORT][626], [ABORT][627], [ABORT][628], [ABORT][629], [ABORT][630]) ([Intel XE#6201]) -> ([PASS][631], [PASS][632], [PASS][633], [PASS][634], [PASS][635], [PASS][636], [PASS][637], [PASS][638], [PASS][639], [PASS][640], [PASS][641], [PASS][642], [PASS][643], [PASS][644], [PASS][645], [PASS][646], [PASS][647], [PASS][648], [PASS][649], [PASS][650], [PASS][651], [PASS][652], [PASS][653], [PASS][654], [SKIP][655], [PASS][656]) ([Intel XE#378] / [Intel XE#5612])
[613]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-6/igt@xe_module_load@load.html
[614]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-6/igt@xe_module_load@load.html
[615]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-6/igt@xe_module_load@load.html
[616]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-6/igt@xe_module_load@load.html
[617]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-8/igt@xe_module_load@load.html
[618]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-8/igt@xe_module_load@load.html
[619]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-8/igt@xe_module_load@load.html
[620]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-8/igt@xe_module_load@load.html
[621]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-8/igt@xe_module_load@load.html
[622]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-2/igt@xe_module_load@load.html
[623]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-2/igt@xe_module_load@load.html
[624]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-2/igt@xe_module_load@load.html
[625]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-2/igt@xe_module_load@load.html
[626]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-3/igt@xe_module_load@load.html
[627]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-3/igt@xe_module_load@load.html
[628]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-3/igt@xe_module_load@load.html
[629]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-4/igt@xe_module_load@load.html
[630]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1/shard-adlp-4/igt@xe_module_load@load.html
[631]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_module_load@load.html
[632]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_module_load@load.html
[633]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_module_load@load.html
[634]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_module_load@load.html
[635]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_module_load@load.html
[636]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_module_load@load.html
[637]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_module_load@load.html
[638]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_module_load@load.html
[639]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@xe_module_load@load.html
[640]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_module_load@load.html
[641]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_module_load@load.html
[642]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_module_load@load.html
[643]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@xe_module_load@load.html
[644]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_module_load@load.html
[645]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-9/igt@xe_module_load@load.html
[646]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_module_load@load.html
[647]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_module_load@load.html
[648]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-2/igt@xe_module_load@load.html
[649]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-6/igt@xe_module_load@load.html
[650]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_module_load@load.html
[651]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-4/igt@xe_module_load@load.html
[652]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_module_load@load.html
[653]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_module_load@load.html
[654]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-8/igt@xe_module_load@load.html
[655]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-3/igt@xe_module_load@load.html
[656]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/shard-adlp-1/igt@xe_module_load@load.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1008
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1131]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1131
[Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
[Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
[Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
[Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
[Intel XE#1158]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1158
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1416
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
[Intel XE#1450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1450
[Intel XE#1466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1466
[Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
[Intel XE#1468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1468
[Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
[Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
[Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1504
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1948]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1948
[Intel XE#2007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2007
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
[Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
[Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
[Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
[Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3106]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3106
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279
[Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3307
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3433
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#3576]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3576
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#379]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/379
[Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
[Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
[Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
[Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359
[Intel XE#4367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4367
[Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
[Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
[Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518
[Intel XE#4519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4519
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4658
[Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665
[Intel XE#4683]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4683
[Intel XE#4689]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4689
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4757
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
[Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
[Intel XE#5195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5195
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5425
[Intel XE#5428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5428
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5488
[Intel XE#5503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5503
[Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5568
[Intel XE#5572]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5572
[Intel XE#5574]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5574
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5580]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5580
[Intel XE#5585]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5585
[Intel XE#5591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5591
[Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
[Intel XE#5596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5596
[Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5610
[Intel XE#5611]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5611
[Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
[Intel XE#5613]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5613
[Intel XE#5614]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5614
[Intel XE#5617]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5617
[Intel XE#5624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5624
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5632]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5632
[Intel XE#5672]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5672
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
[Intel XE#5712]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5712
[Intel XE#5737]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5737
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5745
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#5790]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5790
[Intel XE#5793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5793
[Intel XE#5794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5794
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
[Intel XE#5890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5890
[Intel XE#5963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5963
[Intel XE#5977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5977
[Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
[Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
[Intel XE#6011]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6011
[Intel XE#6032]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6032
[Intel XE#6050]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6050
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6070
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#6190]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6190
[Intel XE#6192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6192
[Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
[Intel XE#6201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6201
[Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
[Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
[Intel XE#736]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/736
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* IGT: IGT_8547 -> IGT_8550
* Linux: xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1 -> xe-pw-144186v15
IGT_8547: 8547
IGT_8550: 4f8c7886ad02e116804ec08714f17bce1755c6e4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1: 3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1
xe-pw-144186v15: 144186v15
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v15/index.html
[-- Attachment #2: Type: text/html, Size: 202180 bytes --]
^ permalink raw reply [flat|nested] 45+ messages in thread
* ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev16)
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (19 preceding siblings ...)
2025-09-23 13:26 ` ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev15) Patchwork
@ 2025-09-23 14:12 ` Patchwork
2025-09-23 20:12 ` [PATCH v12 00/13] AuxCCS handling and render compression modifiers Ville Syrjälä
21 siblings, 0 replies; 45+ messages in thread
From: Patchwork @ 2025-09-23 14:12 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 79883 bytes --]
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev16)
URL : https://patchwork.freedesktop.org/series/144186/
State : failure
== Summary ==
CI Bug Log - changes from xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc_FULL -> xe-pw-144186v16_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-144186v16_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-144186v16_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-144186v16_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_plane_multiple@tiling-none:
- shard-bmg: [PASS][1] -> [TIMEOUT][2] +1 other test timeout
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-2/igt@kms_plane_multiple@tiling-none.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_plane_multiple@tiling-none.html
* igt@xe_pat@pat-index-xe2:
- shard-bmg: [PASS][3] -> [FAIL][4] +2 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-7/igt@xe_pat@pat-index-xe2.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@xe_pat@pat-index-xe2.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-bmg: [PASS][5] -> [DMESG-FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-1/igt@xe_pm@s2idle-vm-bind-unbind-all.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@xe_pm@s2idle-vm-bind-unbind-all.html
* igt@xe_pm_residency@gt-c6-freeze@gt0:
- shard-adlp: [PASS][7] -> [INCOMPLETE][8] +1 other test incomplete
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-9/igt@xe_pm_residency@gt-c6-freeze@gt0.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-3/igt@xe_pm_residency@gt-c6-freeze@gt0.html
#### Warnings ####
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y:
- shard-adlp: [DMESG-WARN][9] ([Intel XE#4543]) -> [DMESG-WARN][10] +2 other tests dmesg-warn
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-9/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-1/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_pipe_stress@stress-xrgb8888-4tiled}:
- shard-bmg: [PASS][11] -> [TIMEOUT][12]
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-3/igt@kms_pipe_stress@stress-xrgb8888-4tiled.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_pipe_stress@stress-xrgb8888-4tiled.html
New tests
---------
New tests have been introduced between xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc_FULL and xe-pw-144186v16_FULL:
### New IGT tests (44) ###
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.22] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.10] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.22] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.24] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-linear-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.22] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-mc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-rc-ccs-cc-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-rc-ccs-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y-mc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
Known issues
------------
Here are the changes found in xe-pw-144186v16_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [PASS][13] -> [FAIL][14] ([Intel XE#4665])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-3/igt@intel_hwmon@hwmon-write.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2233])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1:
- shard-adlp: [PASS][16] -> [DMESG-WARN][17] ([Intel XE#4543]) +6 other tests dmesg-warn
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-4/igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-adlp: [PASS][18] -> [FAIL][19] ([Intel XE#3908]) +1 other test fail
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-9/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2327]) +2 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#316]) +6 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#610]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#1124]) +11 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#1124]) +3 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#607])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#1477]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-4/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#2191])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#367]) +2 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-1-displays-2160x1440p:
- shard-adlp: NOTRUN -> [SKIP][29] ([Intel XE#367])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-3/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#367])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#2887])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-5/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2887]) +4 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][34] ([Intel XE#2907])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][35] ([Intel XE#455] / [Intel XE#787]) +43 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#787]) +216 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-dp-4.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2724])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_cdclk@mode-transition-all-outputs.html
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#4418])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-1/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_audio@dp-audio:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#373]) +10 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#2325])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-8/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_color@degamma:
- shard-dg2-set2: NOTRUN -> [SKIP][41] ([Intel XE#306]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2252]) +3 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
* igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode:
- shard-adlp: NOTRUN -> [SKIP][43] ([Intel XE#373])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-4/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#373])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-2/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2-set2: NOTRUN -> [FAIL][45] ([Intel XE#1178]) +4 other tests fail
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][46] ([Intel XE#1178]) +1 other test fail
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-3/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@uevent:
- shard-bmg: NOTRUN -> [FAIL][47] ([Intel XE#1188]) +1 other test fail
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#308]) +4 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2321])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-random-64x21:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2320])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@kms_cursor_crc@cursor-random-64x21.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#455]) +13 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
- shard-bmg: [PASS][52] -> [SKIP][53] ([Intel XE#2291])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-1/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#1508])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][55] ([Intel XE#4494] / [i915#3804])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#2244])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-8/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#2316])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-bmg: [PASS][58] -> [SKIP][59] ([Intel XE#2316])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-7/igt@kms_flip@2x-wf_vblank-ts-check.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@blocking-wf_vblank@a-hdmi-a1:
- shard-adlp: [PASS][60] -> [FAIL][61] ([Intel XE#3098]) +1 other test fail
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-1/igt@kms_flip@blocking-wf_vblank@a-hdmi-a1.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-1/igt@kms_flip@blocking-wf_vblank@a-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2293]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y:
- shard-adlp: [PASS][64] -> [DMESG-FAIL][65] ([Intel XE#4543])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#651]) +2 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#5390]) +5 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render:
- shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#651]) +43 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#2311]) +11 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-move:
- shard-lnl: NOTRUN -> [SKIP][70] ([Intel XE#656])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#2313]) +8 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#653]) +35 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#2927])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#346])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@kms_joiner@invalid-modeset-big-joiner.html
- shard-dg2-set2: NOTRUN -> [SKIP][75] ([Intel XE#346])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [PASS][76] -> [SKIP][77] ([Intel XE#3012])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-4/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64:
- shard-dg2-set2: [PASS][78] -> [FAIL][79] ([Intel XE#616]) +3 other tests fail
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-433/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256:
- shard-dg2-set2: NOTRUN -> [FAIL][80] ([Intel XE#616]) +3 other tests fail
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
- shard-adlp: [PASS][81] -> [DMESG-WARN][82] ([Intel XE#2953] / [Intel XE#4173]) +4 other tests dmesg-warn
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a:
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#2763]) +3 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#870]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2-set2: NOTRUN -> [SKIP][85] ([Intel XE#1129])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#3309])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2499])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@basic-pci-d3-state:
- shard-adlp: [PASS][88] -> [SKIP][89] ([Intel XE#6070])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-6/igt@kms_pm_rpm@basic-pci-d3-state.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-3/igt@kms_pm_rpm@basic-pci-d3-state.html
* igt@kms_pm_rpm@universal-planes-dpms:
- shard-adlp: [PASS][90] -> [DMESG-WARN][91] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#5750])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-2/igt@kms_pm_rpm@universal-planes-dpms.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_pm_rpm@universal-planes-dpms.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-adlp: NOTRUN -> [SKIP][93] ([Intel XE#1406] / [Intel XE#1489])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-4/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][94] ([Intel XE#1406] / [Intel XE#1489]) +9 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-p010:
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#1122] / [Intel XE#1406])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-psr-sprite-render:
- shard-dg2-set2: NOTRUN -> [SKIP][96] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +18 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@kms_psr@fbc-psr-sprite-render.html
* igt@kms_psr@pr-suspend:
- shard-bmg: NOTRUN -> [SKIP][97] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@kms_psr@pr-suspend.html
- shard-lnl: NOTRUN -> [SKIP][98] ([Intel XE#1406])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-2/igt@kms_psr@pr-suspend.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#1406] / [Intel XE#2414])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
- shard-dg2-set2: NOTRUN -> [SKIP][100] ([Intel XE#1406] / [Intel XE#2939])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-dg2-set2: NOTRUN -> [SKIP][101] ([Intel XE#3414]) +1 other test skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#1499])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@kms_vrr@seamless-rr-switch-vrr.html
- shard-lnl: NOTRUN -> [SKIP][103] ([Intel XE#1499])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
- shard-dg2-set2: NOTRUN -> [SKIP][104] ([Intel XE#1091] / [Intel XE#2849])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
* igt@xe_compute_preempt@compute-preempt-many-all-ram@engine-drm_xe_engine_class_compute:
- shard-dg2-set2: NOTRUN -> [FAIL][105] ([Intel XE#5890]) +1 other test fail
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@xe_compute_preempt@compute-preempt-many-all-ram@engine-drm_xe_engine_class_compute.html
* igt@xe_copy_basic@mem-copy-linear-0x369:
- shard-dg2-set2: NOTRUN -> [SKIP][106] ([Intel XE#1123]) +1 other test skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_copy_basic@mem-copy-linear-0x369.html
* igt@xe_eu_stall@invalid-gt-id:
- shard-dg2-set2: NOTRUN -> [SKIP][107] ([Intel XE#5626]) +1 other test skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_eu_stall@invalid-gt-id.html
* igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
- shard-dg2-set2: NOTRUN -> [SKIP][108] ([Intel XE#4837]) +16 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
* igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram:
- shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#4837]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue:
- shard-bmg: NOTRUN -> [SKIP][110] ([Intel XE#2322]) +3 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null:
- shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#1392])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
* igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
- shard-dg2-set2: NOTRUN -> [SKIP][112] ([Intel XE#1392]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue:
- shard-dg2-set2: [PASS][113] -> [SKIP][114] ([Intel XE#1392]) +2 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-464/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-imm:
- shard-bmg: [PASS][115] -> [FAIL][116] ([Intel XE#6050])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-2/igt@xe_exec_fault_mode@many-execqueues-userptr-imm.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@xe_exec_fault_mode@many-execqueues-userptr-imm.html
* igt@xe_exec_fault_mode@once-bindexecqueue-rebind-imm:
- shard-adlp: NOTRUN -> [SKIP][117] ([Intel XE#288] / [Intel XE#5561])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-9/igt@xe_exec_fault_mode@once-bindexecqueue-rebind-imm.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][118] ([Intel XE#288]) +28 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_system_allocator@many-stride-mmap-new-huge:
- shard-adlp: NOTRUN -> [SKIP][119] ([Intel XE#4915]) +8 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-1/igt@xe_exec_system_allocator@many-stride-mmap-new-huge.html
* igt@xe_exec_system_allocator@process-many-stride-mmap-remap-dontunmap-eocheck:
- shard-bmg: [PASS][120] -> [ABORT][121] ([Intel XE#5790])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-4/igt@xe_exec_system_allocator@process-many-stride-mmap-remap-dontunmap-eocheck.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@xe_exec_system_allocator@process-many-stride-mmap-remap-dontunmap-eocheck.html
* igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#4915]) +304 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-433/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-new-huge-nomemset:
- shard-lnl: NOTRUN -> [SKIP][123] ([Intel XE#4943]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-3/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge:
- shard-bmg: NOTRUN -> [SKIP][124] ([Intel XE#4943]) +10 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge.html
* igt@xe_exec_threads@threads-shared-vm-userptr-invalidate:
- shard-bmg: [PASS][125] -> [DMESG-FAIL][126] ([Intel XE#3876])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-2/igt@xe_exec_threads@threads-shared-vm-userptr-invalidate.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@xe_exec_threads@threads-shared-vm-userptr-invalidate.html
* igt@xe_live_ktest@xe_bo:
- shard-adlp: NOTRUN -> [SKIP][127] ([Intel XE#2229] / [Intel XE#455]) +1 other test skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
- shard-lnl: NOTRUN -> [SKIP][128] ([Intel XE#2229])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-7/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- shard-adlp: NOTRUN -> [SKIP][129] ([Intel XE#2229])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_mmap@small-bar:
- shard-dg2-set2: NOTRUN -> [SKIP][130] ([Intel XE#512])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@xe_mmap@small-bar.html
* igt@xe_oa@mmio-triggered-reports-read:
- shard-dg2-set2: NOTRUN -> [SKIP][131] ([Intel XE#6032])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_oa@mmio-triggered-reports-read.html
* igt@xe_oa@non-privileged-access-vaddr:
- shard-dg2-set2: NOTRUN -> [SKIP][132] ([Intel XE#3573]) +8 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_oa@non-privileged-access-vaddr.html
* igt@xe_pat@display-vs-wb-transient:
- shard-dg2-set2: NOTRUN -> [SKIP][133] ([Intel XE#1337])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-433/igt@xe_pat@display-vs-wb-transient.html
* igt@xe_pat@pat-index-xe2:
- shard-dg2-set2: NOTRUN -> [SKIP][134] ([Intel XE#977])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_pat@pat-index-xe2.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-dg2-set2: NOTRUN -> [SKIP][135] ([Intel XE#2284] / [Intel XE#366])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pm@d3hot-i2c:
- shard-dg2-set2: NOTRUN -> [SKIP][136] ([Intel XE#5742])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-bmg: NOTRUN -> [SKIP][137] ([Intel XE#2284]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pm@s3-exec-after:
- shard-adlp: [PASS][138] -> [INCOMPLETE][139] ([Intel XE#569])
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-4/igt@xe_pm@s3-exec-after.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@xe_pm@s3-exec-after.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-lnl: NOTRUN -> [SKIP][140] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-7/igt@xe_pm@s4-d3cold-basic-exec.html
- shard-adlp: NOTRUN -> [SKIP][141] ([Intel XE#2284] / [Intel XE#366])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pmu@engine-activity-all-load-idle:
- shard-bmg: [PASS][142] -> [DMESG-WARN][143] ([Intel XE#6190])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-2/igt@xe_pmu@engine-activity-all-load-idle.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@xe_pmu@engine-activity-all-load-idle.html
* igt@xe_pmu@engine-activity-most-load@engine-drm_xe_engine_class_video_enhance1:
- shard-bmg: NOTRUN -> [DMESG-WARN][144] ([Intel XE#6190]) +1 other test dmesg-warn
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-1/igt@xe_pmu@engine-activity-most-load@engine-drm_xe_engine_class_video_enhance1.html
* igt@xe_pmu@fn-engine-activity-load:
- shard-adlp: [PASS][145] -> [TIMEOUT][146] ([Intel XE#5213]) +1 other test timeout
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-8/igt@xe_pmu@fn-engine-activity-load.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@xe_pmu@fn-engine-activity-load.html
* igt@xe_pxp@pxp-termination-key-update-post-rpm:
- shard-dg2-set2: NOTRUN -> [SKIP][147] ([Intel XE#4733]) +1 other test skip
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][148] ([Intel XE#944])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-2/igt@xe_query@multigpu-query-cs-cycles.html
* igt@xe_sriov_auto_provisioning@exclusive-ranges:
- shard-dg2-set2: NOTRUN -> [SKIP][149] ([Intel XE#4130]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1:
- shard-lnl: [FAIL][150] ([Intel XE#5993]) -> [PASS][151] +3 other tests pass
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-1:
- shard-adlp: [SKIP][152] ([Intel XE#787]) -> [PASS][153] +83 other tests pass
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-9/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-1.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs:
- shard-adlp: [SKIP][154] ([Intel XE#455] / [Intel XE#787]) -> [PASS][155] +55 other tests pass
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-1/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-8/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][156] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345]) -> [PASS][157]
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][158] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][159]
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
- shard-bmg: [SKIP][160] ([Intel XE#2291]) -> [PASS][161] +1 other test pass
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-bmg: [DMESG-WARN][162] ([Intel XE#5354]) -> [PASS][163] +1 other test pass
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [SKIP][164] ([Intel XE#2316]) -> [PASS][165] +6 other tests pass
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-1/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@basic-flip-vs-modeset@c-hdmi-a1:
- shard-adlp: [DMESG-WARN][166] ([Intel XE#4543]) -> [PASS][167] +5 other tests pass
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-8/igt@kms_flip@basic-flip-vs-modeset@c-hdmi-a1.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-8/igt@kms_flip@basic-flip-vs-modeset@c-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-dg2-set2: [FAIL][168] ([Intel XE#301]) -> [PASS][169]
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-expired-vblank@b-dp4:
- shard-dg2-set2: [FAIL][170] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][171]
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank@b-dp4.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank@b-dp4.html
* igt@kms_flip@flip-vs-rmfb:
- shard-adlp: [DMESG-WARN][172] ([Intel XE#5208]) -> [PASS][173]
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-1/igt@kms_flip@flip-vs-rmfb.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-2/igt@kms_flip@flip-vs-rmfb.html
* igt@kms_flip@flip-vs-suspend:
- shard-bmg: [INCOMPLETE][174] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][175] +1 other test pass
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-8/igt@kms_flip@flip-vs-suspend.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_flip@flip-vs-suspend.html
- shard-dg2-set2: [INCOMPLETE][176] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][177]
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-463/igt@kms_flip@flip-vs-suspend.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
- shard-adlp: [DMESG-WARN][178] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][179] +2 other tests pass
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-adlp: [SKIP][180] ([Intel XE#455]) -> [PASS][181] +7 other tests pass
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-x:
- shard-adlp: [DMESG-FAIL][182] ([Intel XE#4543]) -> [PASS][183]
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-x.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-x.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y:
- shard-adlp: [FAIL][184] ([Intel XE#1874]) -> [PASS][185]
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2-set2: [SKIP][186] ([Intel XE#455]) -> [PASS][187]
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-433/igt@kms_hdr@invalid-hdr.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-bmg: [SKIP][188] ([Intel XE#1435]) -> [PASS][189]
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@xe_exec_basic@many-basic:
- shard-bmg: [FAIL][190] -> [PASS][191]
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-2/igt@xe_exec_basic@many-basic.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-3/igt@xe_exec_basic@many-basic.html
* igt@xe_exec_basic@multigpu-once-null-rebind:
- shard-dg2-set2: [SKIP][192] ([Intel XE#1392]) -> [PASS][193] +5 other tests pass
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null-rebind.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@xe_exec_basic@multigpu-once-null-rebind.html
* igt@xe_exec_system_allocator@evict-malloc:
- shard-bmg: [ABORT][194] ([Intel XE#3970]) -> [PASS][195]
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@xe_exec_system_allocator@evict-malloc.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@xe_exec_system_allocator@evict-malloc.html
* {igt@xe_exec_system_allocator@many-64k-malloc-prefetch-madvise}:
- shard-bmg: [CRASH][196] ([Intel XE#6192]) -> [PASS][197] +8 other tests pass
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@xe_exec_system_allocator@many-64k-malloc-prefetch-madvise.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-1/igt@xe_exec_system_allocator@many-64k-malloc-prefetch-madvise.html
* {igt@xe_exec_system_allocator@twice-malloc-prefetch}:
- shard-lnl: [CRASH][198] ([Intel XE#6192]) -> [PASS][199] +7 other tests pass
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-lnl-7/igt@xe_exec_system_allocator@twice-malloc-prefetch.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-lnl-5/igt@xe_exec_system_allocator@twice-malloc-prefetch.html
* igt@xe_exec_threads@threads-hang-fd-userptr:
- shard-bmg: [DMESG-FAIL][200] ([Intel XE#3876]) -> [PASS][201]
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-1/igt@xe_exec_threads@threads-hang-fd-userptr.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-4/igt@xe_exec_threads@threads-hang-fd-userptr.html
* igt@xe_module_load@load:
- shard-dg2-set2: ([PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [SKIP][222]) ([Intel XE#378]) -> ([PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243])
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-463/igt@xe_module_load@load.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-463/igt@xe_module_load@load.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-434/igt@xe_module_load@load.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-433/igt@xe_module_load@load.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-433/igt@xe_module_load@load.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-436/igt@xe_module_load@load.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-433/igt@xe_module_load@load.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-464/igt@xe_module_load@load.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-432/igt@xe_module_load@load.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-432/igt@xe_module_load@load.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-432/igt@xe_module_load@load.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-436/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-466/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-466/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-434/igt@xe_module_load@load.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-434/igt@xe_module_load@load.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-464/igt@xe_module_load@load.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-464/igt@xe_module_load@load.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-466/igt@xe_module_load@load.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-436/igt@xe_module_load@load.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-463/igt@xe_module_load@load.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@xe_module_load@load.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_module_load@load.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_module_load@load.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_module_load@load.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_module_load@load.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@xe_module_load@load.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@xe_module_load@load.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@xe_module_load@load.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-433/igt@xe_module_load@load.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@xe_module_load@load.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@xe_module_load@load.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@xe_module_load@load.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@xe_module_load@load.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-433/igt@xe_module_load@load.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@xe_module_load@load.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-436/igt@xe_module_load@load.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-466/igt@xe_module_load@load.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-464/igt@xe_module_load@load.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-463/igt@xe_module_load@load.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-434/igt@xe_module_load@load.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-432/igt@xe_module_load@load.html
* {igt@xe_pmu@engine-activity-render-node-idle}:
- shard-bmg: [DMESG-WARN][244] ([Intel XE#6190]) -> [PASS][245] +2 other tests pass
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-8/igt@xe_pmu@engine-activity-render-node-idle.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@xe_pmu@engine-activity-render-node-idle.html
#### Warnings ####
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-adlp: [DMESG-WARN][246] ([Intel XE#4543]) -> [DMESG-WARN][247] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) +2 other tests dmesg-warn
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-4/igt@kms_async_flips@async-flip-suspend-resume.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][248] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345]) -> [INCOMPLETE][249] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][250] ([Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212]) -> [INCOMPLETE][251] ([Intel XE#1727] / [Intel XE#3113])
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_content_protection@srm:
- shard-bmg: [FAIL][252] ([Intel XE#1178]) -> [SKIP][253] ([Intel XE#2341])
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-1/igt@kms_content_protection@srm.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_content_protection@srm.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: [DMESG-WARN][254] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) -> [DMESG-WARN][255] ([Intel XE#2953] / [Intel XE#4173])
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a1:
- shard-adlp: [DMESG-WARN][256] ([Intel XE#4543]) -> [DMESG-WARN][257] ([Intel XE#2953] / [Intel XE#4173])
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a1.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a1.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][258] ([Intel XE#2311]) -> [SKIP][259] ([Intel XE#2312]) +6 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][260] ([Intel XE#2312]) -> [SKIP][261] ([Intel XE#5390]) +4 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][262] ([Intel XE#5390]) -> [SKIP][263] ([Intel XE#2312]) +4 other tests skip
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
- shard-adlp: [DMESG-FAIL][264] ([Intel XE#4543]) -> [DMESG-FAIL][265] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543])
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-adlp-6/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-adlp-6/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][266] ([Intel XE#2312]) -> [SKIP][267] ([Intel XE#2311]) +8 other tests skip
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][268] ([Intel XE#2312]) -> [SKIP][269] ([Intel XE#2313]) +3 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render:
- shard-bmg: [SKIP][270] ([Intel XE#2313]) -> [SKIP][271] ([Intel XE#2312]) +4 other tests skip
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][272] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][273] ([Intel XE#3544])
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-bmg: [ABORT][274] ([Intel XE#4760]) -> [SKIP][275] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-1/igt@kms_pm_rpm@dpms-lpsp.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-5/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][276] ([Intel XE#2426]) -> [FAIL][277] ([Intel XE#1729])
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5750]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5750
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#5790]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5790
[Intel XE#5890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5890
[Intel XE#5993]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5993
[Intel XE#6032]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6032
[Intel XE#6050]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6050
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6070
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#6190]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6190
[Intel XE#6192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6192
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* IGT: IGT_8549 -> IGT_8550
* Linux: xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc -> xe-pw-144186v16
IGT_8549: 8549
IGT_8550: 4f8c7886ad02e116804ec08714f17bce1755c6e4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3814-d2f002c868da5926fabd73b1ba2ab7a2b66d81dc: d2f002c868da5926fabd73b1ba2ab7a2b66d81dc
xe-pw-144186v16: 144186v16
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144186v16/index.html
[-- Attachment #2: Type: text/html, Size: 93656 bytes --]
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 13:20 ` Ville Syrjälä
@ 2025-09-23 14:40 ` Tvrtko Ursulin
2025-09-23 14:52 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-23 14:40 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 23/09/2025 14:20, Ville Syrjälä wrote:
> On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
>>
>> On 23/09/2025 13:01, Ville Syrjälä wrote:
>>> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
>>>>
>>>> On 23/09/2025 11:19, Ville Syrjälä wrote:
>>>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
>>>>>> Even though frame buffer objects are created as write-combined, in
>>>>>> practice, on top of all the ring buffer flushing, an additional clflush
>>>>>> seems to be needed before display engine can coherently scan out the
>>>>>> AuxCCS compressed data without transient artifacts.
>>>>>>
>>>>>> If for comparison we look at how i915 handles things (where AuxCCS works
>>>>>> fine), as it happens it has this same clflush before a frame buffer is
>>>>>> pinned for display for the first time, courtesy the dynamic tracking of
>>>>>> the buffer cache mode and setting the latter to uncached before handing
>>>>>> to display.
>>>>>>
>>>>>> Since xe considers the buffer object caching mode as static we can
>>>>>> implement the same approach by adding a flag telling us if the buffer
>>>>>> was ever pinned for display and flush on the first pin. Subsequent re-pins
>>>>>> will not repeat the clflush but so far I have not observed any glitching
>>>>>> after the first pin.
>>>>>>
>>>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>>>>>> ---
>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
>>>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
>>>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>> index d8aa23b8cf14..f247c0da6b9e 100644
>>>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
>>>>>> struct xe_validation_ctx ctx;
>>>>>> struct drm_exec exec;
>>>>>> + bool first_pin;
>>>>>> int ret = 0;
>>>>>>
>>>>>> if (!vma)
>>>>>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
>>>>>> drm_exec_retry_on_contention(&exec);
>>>>>> xe_validation_retry_on_oom(&ctx, &ret);
>>>>>> - if (!ret)
>>>>>> + if (!ret) {
>>>>>> ttm_bo_pin(&bo->ttm);
>>>>>> + first_pin = !bo->display_pin;
>>>>>> + bo->display_pin = true;
>>>>>> + }
>>>>>> }
>>>>>> if (ret)
>>>>>> goto err;
>>>>>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>> if (ret)
>>>>>> goto err_unpin;
>>>>>>
>>>>>> + /*
>>>>>> + * Force flush frame buffer data for non-coherent display access when
>>>>>> + * AuxCCS formats are used.
>>>>>> + */
>>>>>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
>>>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
>>>>>> + drm_clflush_sg(xe_bo_sg(bo));
>>>>>
>>>>> You still haven't found the actual bug that causes the dirty cache?
>>>>
>>>> Sadly no. I cross referenced everything numerous times, including
>>>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
>>>> but this extra flush always remains required. I also heard that how
>>>> flushing of the aux metadata works isn't documented anywhere and i915
>>>> does have this flush, by design or accident I don't know.
>>>
>>> i915 has the flush for the *whole* bo because it started out as
>>> cached. As soon as it undergoes a cached->uncached change (either
>>> due to set_caching ioctl or becoming a display scanout buffer) we
>>> clflush it and switch the GPU page tables from WB to UC. After
>>> that the bo stays uncached, and will need no further clflushes,
>>> assuming that everyone follows the rules:
>>>
>>> - CPU accesses via a WB mapping to an uncached bo will explicitly
>>> clflush before (invalidate) and after (write-back) the access
>>> - userspace always sets the GPU to use use "consult the PTE" MOCS
>>> setting for any potential scanout buffer. That way the GPU will
>>> use WB as long as the bo is cached, and once it becomes
>>> uncached the GPU also switches to UC accesses
>>>
>>> With xe I presume the BO should already start out as UC/WC with
>>> clean caches, and nothing should be dirtying the caches unless
>>> there is a real bug somewhere.
>>
>> Correct, it is all WC and MOCS are correctly set as WC.
>>
>> For example for the media compression flavour that was broken and needed
>> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
>> index"). (For the render compression flavour MOCS was already correct.)
>> But MOCS is not enough on its own for some reason.
>>
>> I also looked into the rendercopy surface state programming and that too
>> looks okay. In fact it is possible to see how using the wrong MOCS makes
>> things worse. But it also appears the surface state MOCS only applies to
>> the main surface, while the aux state is the one which appears to
>> contain cached/unflushed data.
>
> Are you saying that if you start scanning out a compressed buffer,
> then clean the caches, and then do frontbuffer rendering you get
> more cache dirt?
Render with the GPU or CPU? Do you know of any tests or userspaces which
do that?
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 14:40 ` Tvrtko Ursulin
@ 2025-09-23 14:52 ` Ville Syrjälä
2025-09-24 13:09 ` Tvrtko Ursulin
0 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-23 14:52 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Tue, Sep 23, 2025 at 03:40:55PM +0100, Tvrtko Ursulin wrote:
>
> On 23/09/2025 14:20, Ville Syrjälä wrote:
> > On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
> >>
> >> On 23/09/2025 13:01, Ville Syrjälä wrote:
> >>> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
> >>>>
> >>>> On 23/09/2025 11:19, Ville Syrjälä wrote:
> >>>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
> >>>>>> Even though frame buffer objects are created as write-combined, in
> >>>>>> practice, on top of all the ring buffer flushing, an additional clflush
> >>>>>> seems to be needed before display engine can coherently scan out the
> >>>>>> AuxCCS compressed data without transient artifacts.
> >>>>>>
> >>>>>> If for comparison we look at how i915 handles things (where AuxCCS works
> >>>>>> fine), as it happens it has this same clflush before a frame buffer is
> >>>>>> pinned for display for the first time, courtesy the dynamic tracking of
> >>>>>> the buffer cache mode and setting the latter to uncached before handing
> >>>>>> to display.
> >>>>>>
> >>>>>> Since xe considers the buffer object caching mode as static we can
> >>>>>> implement the same approach by adding a flag telling us if the buffer
> >>>>>> was ever pinned for display and flush on the first pin. Subsequent re-pins
> >>>>>> will not repeat the clflush but so far I have not observed any glitching
> >>>>>> after the first pin.
> >>>>>>
> >>>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> >>>>>> ---
> >>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
> >>>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
> >>>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
> >>>>>>
> >>>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>> index d8aa23b8cf14..f247c0da6b9e 100644
> >>>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
> >>>>>> struct xe_validation_ctx ctx;
> >>>>>> struct drm_exec exec;
> >>>>>> + bool first_pin;
> >>>>>> int ret = 0;
> >>>>>>
> >>>>>> if (!vma)
> >>>>>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
> >>>>>> drm_exec_retry_on_contention(&exec);
> >>>>>> xe_validation_retry_on_oom(&ctx, &ret);
> >>>>>> - if (!ret)
> >>>>>> + if (!ret) {
> >>>>>> ttm_bo_pin(&bo->ttm);
> >>>>>> + first_pin = !bo->display_pin;
> >>>>>> + bo->display_pin = true;
> >>>>>> + }
> >>>>>> }
> >>>>>> if (ret)
> >>>>>> goto err;
> >>>>>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>> if (ret)
> >>>>>> goto err_unpin;
> >>>>>>
> >>>>>> + /*
> >>>>>> + * Force flush frame buffer data for non-coherent display access when
> >>>>>> + * AuxCCS formats are used.
> >>>>>> + */
> >>>>>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
> >>>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
> >>>>>> + drm_clflush_sg(xe_bo_sg(bo));
> >>>>>
> >>>>> You still haven't found the actual bug that causes the dirty cache?
> >>>>
> >>>> Sadly no. I cross referenced everything numerous times, including
> >>>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
> >>>> but this extra flush always remains required. I also heard that how
> >>>> flushing of the aux metadata works isn't documented anywhere and i915
> >>>> does have this flush, by design or accident I don't know.
> >>>
> >>> i915 has the flush for the *whole* bo because it started out as
> >>> cached. As soon as it undergoes a cached->uncached change (either
> >>> due to set_caching ioctl or becoming a display scanout buffer) we
> >>> clflush it and switch the GPU page tables from WB to UC. After
> >>> that the bo stays uncached, and will need no further clflushes,
> >>> assuming that everyone follows the rules:
> >>>
> >>> - CPU accesses via a WB mapping to an uncached bo will explicitly
> >>> clflush before (invalidate) and after (write-back) the access
> >>> - userspace always sets the GPU to use use "consult the PTE" MOCS
> >>> setting for any potential scanout buffer. That way the GPU will
> >>> use WB as long as the bo is cached, and once it becomes
> >>> uncached the GPU also switches to UC accesses
> >>>
> >>> With xe I presume the BO should already start out as UC/WC with
> >>> clean caches, and nothing should be dirtying the caches unless
> >>> there is a real bug somewhere.
> >>
> >> Correct, it is all WC and MOCS are correctly set as WC.
> >>
> >> For example for the media compression flavour that was broken and needed
> >> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
> >> index"). (For the render compression flavour MOCS was already correct.)
> >> But MOCS is not enough on its own for some reason.
> >>
> >> I also looked into the rendercopy surface state programming and that too
> >> looks okay. In fact it is possible to see how using the wrong MOCS makes
> >> things worse. But it also appears the surface state MOCS only applies to
> >> the main surface, while the aux state is the one which appears to
> >> contain cached/unflushed data.
> >
> > Are you saying that if you start scanning out a compressed buffer,
> > then clean the caches, and then do frontbuffer rendering you get
> > more cache dirt?
>
> Render with the GPU or CPU? Do you know of any tests or userspaces which
> do that?
On the GPU.
Can't think of anything nice off the top of my head.
I'd probably just write a quick igt:
1. create a compressed fb
2. flip to it
3. manually clflush the whole thing to be sure it's clean
4. rendercopy some junk around, and keep an eye out for cache dirt
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 00/13] AuxCCS handling and render compression modifiers
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
` (20 preceding siblings ...)
2025-09-23 14:12 ` ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev16) Patchwork
@ 2025-09-23 20:12 ` Ville Syrjälä
2025-09-24 7:59 ` Tvrtko Ursulin
21 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-23 20:12 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Tue, Sep 23, 2025 at 11:07:53AM +0100, Tvrtko Ursulin wrote:
> A series to fix and add xe support for AuxCSS framebuffers via DPT.
>
> Currently the auxiliary buffer data isn't mapped into the page tables at all so
> cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
> had to disable the support.
>
> On top of that there are missing flushes, invalidations and similar.
>
> Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
>
> [PLANE:32:plane 1A]: type=PRI
> uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
> hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>
> Display working fine - no artefacts, no DMAR/PIPE faults.
>
> All IGTs pass for me locally.
>
> v2:
> * More patches added to fix kms_flip_tiling.
>
> v3:
> * Rebased after some cleanup patches from v2 were merged.
> * Added people to Cc as suggested by Rodrigo.
> * Adjusted last patch title. (Rodrigo)
> * Apply GGTT flushing only to iomapped system memory buffers.
>
> v4:
> * Added patch for potentially misplaced Wa_14016712196.
> * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.
>
> v5:
> * Split out ring emission changes to smaller patches.
> * Fixed MAX_JOB_SIZE_DW even more.
> * Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.
>
> v6:
> * Added AuxCCS invalidation to indirect context workarounds.
> * Also added the indirect context handling and some other workarounds. They are
> unrelated but the series depends on it.
> * Dropped DPT pin alignment reduction since BMG appears not to be liking it for
> some reason.
I was wondering where that went. Someone should actually debug
that instead of leaving the bogus alignemnt in place.
We do have some unknown alignment issues on i915 as well,
with async flips specifically. On ADL we've papered over it
for now. But at least MTL is suffering from somewhat similar
issues that I failed to immediately understand. We really
should find someone who has a bit of time to dig into these...
BTW intel_fb_pin_to_ggtt() also passes the wrong alignment to
__xe_pin_fb_vma(). I suppose it won't help with DPT alignment
woes, but it's yet another xe issue that needs fixing.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 00/13] AuxCCS handling and render compression modifiers
2025-09-23 20:12 ` [PATCH v12 00/13] AuxCCS handling and render compression modifiers Ville Syrjälä
@ 2025-09-24 7:59 ` Tvrtko Ursulin
0 siblings, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-24 7:59 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 23/09/2025 21:12, Ville Syrjälä wrote:
> On Tue, Sep 23, 2025 at 11:07:53AM +0100, Tvrtko Ursulin wrote:
>> A series to fix and add xe support for AuxCSS framebuffers via DPT.
>>
>> Currently the auxiliary buffer data isn't mapped into the page tables at all so
>> cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
>> had to disable the support.
>>
>> On top of that there are missing flushes, invalidations and similar.
>>
>> Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
>>
>> [PLANE:32:plane 1A]: type=PRI
>> uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>> hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>>
>> Display working fine - no artefacts, no DMAR/PIPE faults.
>>
>> All IGTs pass for me locally.
>>
>> v2:
>> * More patches added to fix kms_flip_tiling.
>>
>> v3:
>> * Rebased after some cleanup patches from v2 were merged.
>> * Added people to Cc as suggested by Rodrigo.
>> * Adjusted last patch title. (Rodrigo)
>> * Apply GGTT flushing only to iomapped system memory buffers.
>>
>> v4:
>> * Added patch for potentially misplaced Wa_14016712196.
>> * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.
>>
>> v5:
>> * Split out ring emission changes to smaller patches.
>> * Fixed MAX_JOB_SIZE_DW even more.
>> * Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.
>>
>> v6:
>> * Added AuxCCS invalidation to indirect context workarounds.
>> * Also added the indirect context handling and some other workarounds. They are
>> unrelated but the series depends on it.
>> * Dropped DPT pin alignment reduction since BMG appears not to be liking it for
>> some reason.
>
> I was wondering where that went. Someone should actually debug
> that instead of leaving the bogus alignemnt in place.
I do not exactly remember what the failures were but I *think* they were
sporadic and I definitely fixed some other details since. So I think it
is possible I incorrectly blamed that patch at the time. I'll re-send
it to see what CI will say.
> We do have some unknown alignment issues on i915 as well,
> with async flips specifically. On ADL we've papered over it
> for now. But at least MTL is suffering from somewhat similar
> issues that I failed to immediately understand. We really
> should find someone who has a bit of time to dig into these...
>
> BTW intel_fb_pin_to_ggtt() also passes the wrong alignment to
> __xe_pin_fb_vma(). I suppose it won't help with DPT alignment
> woes, but it's yet another xe issue that needs fixing.
The last part looks obviously wrong indeed. I can send a fix for that.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-23 14:52 ` Ville Syrjälä
@ 2025-09-24 13:09 ` Tvrtko Ursulin
2025-09-24 22:35 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-24 13:09 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 23/09/2025 15:52, Ville Syrjälä wrote:
> On Tue, Sep 23, 2025 at 03:40:55PM +0100, Tvrtko Ursulin wrote:
>>
>> On 23/09/2025 14:20, Ville Syrjälä wrote:
>>> On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
>>>>
>>>> On 23/09/2025 13:01, Ville Syrjälä wrote:
>>>>> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
>>>>>>
>>>>>> On 23/09/2025 11:19, Ville Syrjälä wrote:
>>>>>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
>>>>>>>> Even though frame buffer objects are created as write-combined, in
>>>>>>>> practice, on top of all the ring buffer flushing, an additional clflush
>>>>>>>> seems to be needed before display engine can coherently scan out the
>>>>>>>> AuxCCS compressed data without transient artifacts.
>>>>>>>>
>>>>>>>> If for comparison we look at how i915 handles things (where AuxCCS works
>>>>>>>> fine), as it happens it has this same clflush before a frame buffer is
>>>>>>>> pinned for display for the first time, courtesy the dynamic tracking of
>>>>>>>> the buffer cache mode and setting the latter to uncached before handing
>>>>>>>> to display.
>>>>>>>>
>>>>>>>> Since xe considers the buffer object caching mode as static we can
>>>>>>>> implement the same approach by adding a flag telling us if the buffer
>>>>>>>> was ever pinned for display and flush on the first pin. Subsequent re-pins
>>>>>>>> will not repeat the clflush but so far I have not observed any glitching
>>>>>>>> after the first pin.
>>>>>>>>
>>>>>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>>>>>>>> ---
>>>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
>>>>>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
>>>>>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
>>>>>>>>
>>>>>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>> index d8aa23b8cf14..f247c0da6b9e 100644
>>>>>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
>>>>>>>> struct xe_validation_ctx ctx;
>>>>>>>> struct drm_exec exec;
>>>>>>>> + bool first_pin;
>>>>>>>> int ret = 0;
>>>>>>>>
>>>>>>>> if (!vma)
>>>>>>>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
>>>>>>>> drm_exec_retry_on_contention(&exec);
>>>>>>>> xe_validation_retry_on_oom(&ctx, &ret);
>>>>>>>> - if (!ret)
>>>>>>>> + if (!ret) {
>>>>>>>> ttm_bo_pin(&bo->ttm);
>>>>>>>> + first_pin = !bo->display_pin;
>>>>>>>> + bo->display_pin = true;
>>>>>>>> + }
>>>>>>>> }
>>>>>>>> if (ret)
>>>>>>>> goto err;
>>>>>>>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>> if (ret)
>>>>>>>> goto err_unpin;
>>>>>>>>
>>>>>>>> + /*
>>>>>>>> + * Force flush frame buffer data for non-coherent display access when
>>>>>>>> + * AuxCCS formats are used.
>>>>>>>> + */
>>>>>>>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
>>>>>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
>>>>>>>> + drm_clflush_sg(xe_bo_sg(bo));
>>>>>>>
>>>>>>> You still haven't found the actual bug that causes the dirty cache?
>>>>>>
>>>>>> Sadly no. I cross referenced everything numerous times, including
>>>>>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
>>>>>> but this extra flush always remains required. I also heard that how
>>>>>> flushing of the aux metadata works isn't documented anywhere and i915
>>>>>> does have this flush, by design or accident I don't know.
>>>>>
>>>>> i915 has the flush for the *whole* bo because it started out as
>>>>> cached. As soon as it undergoes a cached->uncached change (either
>>>>> due to set_caching ioctl or becoming a display scanout buffer) we
>>>>> clflush it and switch the GPU page tables from WB to UC. After
>>>>> that the bo stays uncached, and will need no further clflushes,
>>>>> assuming that everyone follows the rules:
>>>>>
>>>>> - CPU accesses via a WB mapping to an uncached bo will explicitly
>>>>> clflush before (invalidate) and after (write-back) the access
>>>>> - userspace always sets the GPU to use use "consult the PTE" MOCS
>>>>> setting for any potential scanout buffer. That way the GPU will
>>>>> use WB as long as the bo is cached, and once it becomes
>>>>> uncached the GPU also switches to UC accesses
>>>>>
>>>>> With xe I presume the BO should already start out as UC/WC with
>>>>> clean caches, and nothing should be dirtying the caches unless
>>>>> there is a real bug somewhere.
>>>>
>>>> Correct, it is all WC and MOCS are correctly set as WC.
>>>>
>>>> For example for the media compression flavour that was broken and needed
>>>> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
>>>> index"). (For the render compression flavour MOCS was already correct.)
>>>> But MOCS is not enough on its own for some reason.
>>>>
>>>> I also looked into the rendercopy surface state programming and that too
>>>> looks okay. In fact it is possible to see how using the wrong MOCS makes
>>>> things worse. But it also appears the surface state MOCS only applies to
>>>> the main surface, while the aux state is the one which appears to
>>>> contain cached/unflushed data.
>>>
>>> Are you saying that if you start scanning out a compressed buffer,
>>> then clean the caches, and then do frontbuffer rendering you get
>>> more cache dirt?
>>
>> Render with the GPU or CPU? Do you know of any tests or userspaces which
>> do that?
>
> On the GPU.
>
> Can't think of anything nice off the top of my head.
>
> I'd probably just write a quick igt:
> 1. create a compressed fb
> 2. flip to it
> 3. manually clflush the whole thing to be sure it's clean
> 4. rendercopy some junk around, and keep an eye out for cache dirt
Looks the same dirt on i915 and xe, which would support the theory that
MOCS settings do not apply to the aux surface.
If you look at these videos frame by frame you can see it:
https://people.igalia.com/tursulin/i915-ccs-cache-dirt.MOV
https://people.igalia.com/tursulin/xe-ccs-cache-dirt.MOV
Test "rendercopies" a square once a second so look just as each is
appearing.
This is the test code if you are curious:
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index f42f3791780f..03ede3a6fa20 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -2859,6 +2859,49 @@ static void copy_with_engine(struct
fb_blit_upload *blit,
fini_buf(src);
}
+static struct intel_buf *
+__create_buf(int fd,
+ struct buf_ops *bops,
+ const struct igt_fb *fb,
+ const char *name)
+{
+ return igt_fb_create_intel_buf(fd, bops, fb, name);
+}
+
+void intel_fb_engine_blit(int fd,
+ struct intel_bb *ibb,
+ struct buf_ops *bops,
+ const struct igt_fb *dst_fb,
+ uint32_t dst_x, uint32_t dst_y,
+ const struct igt_fb *src_fb,
+ uint32_t src_x, uint32_t src_y,
+ uint32_t width, uint32_t height)
+{
+ igt_render_copyfunc_t render_copy;
+ struct intel_buf *src, *dst;
+
+ igt_require(!use_vebox_copy(src_fb, dst_fb));
+
+ render_copy = igt_get_render_copyfunc(fd);
+ igt_require(render_copy);
+
+ igt_assert_eq(dst_fb->offsets[0], 0);
+ igt_assert_eq(src_fb->offsets[0], 0);
+
+ src = __create_buf(fd, bops, src_fb, "cairo enginecopy src");
+ dst = __create_buf(fd, bops, dst_fb, "cairo enginecopy dst");
+
+ render_copy(ibb,
+ src,
+ src_x, src_y,
+ width, height,
+ dst,
+ dst_x, dst_y);
+
+ fini_buf(dst);
+ fini_buf(src);
+}
+
static struct blt_copy_object *allocate_and_initialize_blt(const
struct igt_fb *fb,
uint32_t handle,
uint32_t memregion,
diff --git a/lib/igt_fb.h b/lib/igt_fb.h
index d5aa1e88ad5d..b90b6bbd2032 100644
--- a/lib/igt_fb.h
+++ b/lib/igt_fb.h
@@ -236,5 +236,16 @@ int igt_fill_cts_color_square_framebuffer(uint32_t
*pixmap,
int igt_fb_get_fnv1a_crc(struct igt_fb *fb, igt_crc_t *crc);
const char *igt_fb_modifier_name(uint64_t modifier);
+struct intel_bb;
+
+void intel_fb_engine_blit(int fd,
+ struct intel_bb *ibb,
+ struct buf_ops *bops,
+ const struct igt_fb *dst_fb,
+ uint32_t dst_x, uint32_t dst_y,
+ const struct igt_fb *src_fb,
+ uint32_t src_x, uint32_t src_y,
+ uint32_t width, uint32_t height);
+
#endif /* __IGT_FB_H__ */
diff --git a/tests/intel/kms_flip_tiling.c b/tests/intel/kms_flip_tiling.c
index ff9ad1229748..767c8051c85f 100644
--- a/tests/intel/kms_flip_tiling.c
+++ b/tests/intel/kms_flip_tiling.c
@@ -158,6 +158,92 @@ test_flip_tiling(data_t *data, enum pipe pipe,
igt_output_t *output, uint64_t mo
igt_remove_fb(data->drm_fd, &data->old_fb[1]);
}
+static void
+test_frontbuffer(data_t *data, enum pipe pipe, igt_output_t *output,
uint64_t modifier[2])
+{
+ struct intel_bb *batch;
+ drmModeModeInfo *mode;
+ struct buf_ops *bops;
+ igt_plane_t *primary;
+ int fb_id;
+
+ memcpy(&data->old_fb, &data->fb, sizeof(data->fb));
+
+ bops = buf_ops_create(data->drm_fd);
+
+ mode = igt_output_get_mode(output);
+
+ primary = igt_output_get_plane(output, 0);
+
+ fb_id = igt_create_pattern_fb(data->drm_fd,
+ mode->hdisplay, mode->vdisplay,
+ data->testformat, modifier[0],
+ &data->fb[0]);
+ igt_assert(fb_id);
+
+ fb_id = igt_create_color_pattern_fb(data->drm_fd,
+ mode->hdisplay, mode->vdisplay,
+ data->testformat, modifier[1],
+ 0.5, 0.5, 0.5, &data->fb[1]);
+ igt_assert(fb_id);
+
+ igt_plane_set_fb(primary, &data->fb[0]);
+ igt_require_f(try_commit(&data->display) == 0,
+ "commit failed with " IGT_MODIFIER_FMT "\n",
+ IGT_MODIFIER_ARGS(modifier[0]));
+
+ igt_until_timeout(60) {
+ const unsigned int w = 256;
+ const unsigned int h = 256;
+ unsigned int x = random() % (mode->hdisplay - w);
+ unsigned int y = random() % (mode->vdisplay - h);
+
+ usleep(1000000);
+
+ batch = intel_bb_create(data->drm_fd, 4096);
+ intel_fb_engine_blit(data->drm_fd,
+ batch,
+ bops,
+ &data->fb[0],
+ x, y,
+ &data->fb[1],
+ x, y,
+ w, h);
+ intel_bb_destroy(batch);
+#if 0
+ igt_plane_set_fb(primary, &data->fb[1]);
+ igt_require_f(try_commit(&data->display) == 0,
+ "commit failed with " IGT_MODIFIER_FMT "\n",
+ IGT_MODIFIER_ARGS(modifier[0]));
+ igt_plane_set_fb(primary, &data->fb[0]);
+ igt_require_f(try_commit(&data->display) == 0,
+ "commit failed with " IGT_MODIFIER_FMT "\n",
+ IGT_MODIFIER_ARGS(modifier[0]));
+#endif
+ }
+
+ printf("press any key\n");
+ getchar();
+
+ igt_plane_set_fb(primary, &data->fb[1]);
+ igt_require_f(try_commit(&data->display) == 0,
+ "commit failed with " IGT_MODIFIER_FMT "\n",
+ IGT_MODIFIER_ARGS(modifier[0]));
+ igt_plane_set_fb(primary, &data->fb[0]);
+ igt_require_f(try_commit(&data->display) == 0,
+ "commit failed with " IGT_MODIFIER_FMT "\n",
+ IGT_MODIFIER_ARGS(modifier[0]));
+
+ printf("press any key\n");
+ getchar();
+
+
+ igt_remove_fb(data->drm_fd, &data->old_fb[0]);
+ igt_remove_fb(data->drm_fd, &data->old_fb[1]);
+
+ buf_ops_destroy(bops);
+}
+
static void test_cleanup(data_t *data, enum pipe pipe, igt_output_t
*output)
{
igt_plane_t *primary;
@@ -257,6 +343,49 @@ igt_main
}
}
+ igt_subtest_with_dynamic("frontbuffer-rendering") {
+ enum pipe pipe;
+
+ for_each_pipe_with_valid_output(&data.display, pipe, output) {
+ igt_plane_t *plane;
+
+ igt_display_reset(&data.display);
+ pipe_crc_free(&data);
+
+ igt_output_set_pipe(output, pipe);
+ if (!intel_pipe_output_combo_valid(&data.display))
+ continue;
+
+ plane = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+
+ for (int i = 0; i < plane->format_mod_count; i++) {
+ if (plane->formats[i] != data.testformat)
+ continue;
+
+ for (int j = 0; j < plane->format_mod_count; j++) {
+ uint64_t modifier[2] = {
+ plane->modifiers[i],
+ plane->modifiers[j],
+ };
+
+ if (plane->formats[j] != data.testformat)
+ continue;
+
+ igt_dynamic_f("frontbuffer-%s-%s-%s-to-%s",
+ kmstest_pipe_name(pipe),
+ igt_output_name(output),
+ igt_fb_modifier_name(modifier[0]),
+ igt_fb_modifier_name(modifier[1]))
+ test_frontbuffer(&data, pipe, output, modifier);
+
+ if (data.flipevent_in_queue)
+ handle_lost_event(&data);
+ }
+ }
+ test_cleanup(&data, pipe, output);
+ }
+ }
+
igt_fixture {
igt_display_fini(&data.display);
drm_close_driver(data.drm_fd);
Run it for example like this:
sudo tests/kms_flip_tiling --dynamic-subtest
frontbuffer-A-eDP-1-y-rc-ccs-to-y-rc-ccs
Regards,
Tvrtko
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-24 13:09 ` Tvrtko Ursulin
@ 2025-09-24 22:35 ` Ville Syrjälä
2025-09-25 7:24 ` Tvrtko Ursulin
0 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-24 22:35 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Wed, Sep 24, 2025 at 02:09:42PM +0100, Tvrtko Ursulin wrote:
>
> On 23/09/2025 15:52, Ville Syrjälä wrote:
> > On Tue, Sep 23, 2025 at 03:40:55PM +0100, Tvrtko Ursulin wrote:
> >>
> >> On 23/09/2025 14:20, Ville Syrjälä wrote:
> >>> On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
> >>>>
> >>>> On 23/09/2025 13:01, Ville Syrjälä wrote:
> >>>>> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
> >>>>>>
> >>>>>> On 23/09/2025 11:19, Ville Syrjälä wrote:
> >>>>>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
> >>>>>>>> Even though frame buffer objects are created as write-combined, in
> >>>>>>>> practice, on top of all the ring buffer flushing, an additional clflush
> >>>>>>>> seems to be needed before display engine can coherently scan out the
> >>>>>>>> AuxCCS compressed data without transient artifacts.
> >>>>>>>>
> >>>>>>>> If for comparison we look at how i915 handles things (where AuxCCS works
> >>>>>>>> fine), as it happens it has this same clflush before a frame buffer is
> >>>>>>>> pinned for display for the first time, courtesy the dynamic tracking of
> >>>>>>>> the buffer cache mode and setting the latter to uncached before handing
> >>>>>>>> to display.
> >>>>>>>>
> >>>>>>>> Since xe considers the buffer object caching mode as static we can
> >>>>>>>> implement the same approach by adding a flag telling us if the buffer
> >>>>>>>> was ever pinned for display and flush on the first pin. Subsequent re-pins
> >>>>>>>> will not repeat the clflush but so far I have not observed any glitching
> >>>>>>>> after the first pin.
> >>>>>>>>
> >>>>>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> >>>>>>>> ---
> >>>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
> >>>>>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
> >>>>>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
> >>>>>>>>
> >>>>>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>>>> index d8aa23b8cf14..f247c0da6b9e 100644
> >>>>>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>>>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
> >>>>>>>> struct xe_validation_ctx ctx;
> >>>>>>>> struct drm_exec exec;
> >>>>>>>> + bool first_pin;
> >>>>>>>> int ret = 0;
> >>>>>>>>
> >>>>>>>> if (!vma)
> >>>>>>>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
> >>>>>>>> drm_exec_retry_on_contention(&exec);
> >>>>>>>> xe_validation_retry_on_oom(&ctx, &ret);
> >>>>>>>> - if (!ret)
> >>>>>>>> + if (!ret) {
> >>>>>>>> ttm_bo_pin(&bo->ttm);
> >>>>>>>> + first_pin = !bo->display_pin;
> >>>>>>>> + bo->display_pin = true;
> >>>>>>>> + }
> >>>>>>>> }
> >>>>>>>> if (ret)
> >>>>>>>> goto err;
> >>>>>>>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>>>> if (ret)
> >>>>>>>> goto err_unpin;
> >>>>>>>>
> >>>>>>>> + /*
> >>>>>>>> + * Force flush frame buffer data for non-coherent display access when
> >>>>>>>> + * AuxCCS formats are used.
> >>>>>>>> + */
> >>>>>>>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
> >>>>>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
> >>>>>>>> + drm_clflush_sg(xe_bo_sg(bo));
> >>>>>>>
> >>>>>>> You still haven't found the actual bug that causes the dirty cache?
> >>>>>>
> >>>>>> Sadly no. I cross referenced everything numerous times, including
> >>>>>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
> >>>>>> but this extra flush always remains required. I also heard that how
> >>>>>> flushing of the aux metadata works isn't documented anywhere and i915
> >>>>>> does have this flush, by design or accident I don't know.
> >>>>>
> >>>>> i915 has the flush for the *whole* bo because it started out as
> >>>>> cached. As soon as it undergoes a cached->uncached change (either
> >>>>> due to set_caching ioctl or becoming a display scanout buffer) we
> >>>>> clflush it and switch the GPU page tables from WB to UC. After
> >>>>> that the bo stays uncached, and will need no further clflushes,
> >>>>> assuming that everyone follows the rules:
> >>>>>
> >>>>> - CPU accesses via a WB mapping to an uncached bo will explicitly
> >>>>> clflush before (invalidate) and after (write-back) the access
> >>>>> - userspace always sets the GPU to use use "consult the PTE" MOCS
> >>>>> setting for any potential scanout buffer. That way the GPU will
> >>>>> use WB as long as the bo is cached, and once it becomes
> >>>>> uncached the GPU also switches to UC accesses
> >>>>>
> >>>>> With xe I presume the BO should already start out as UC/WC with
> >>>>> clean caches, and nothing should be dirtying the caches unless
> >>>>> there is a real bug somewhere.
> >>>>
> >>>> Correct, it is all WC and MOCS are correctly set as WC.
> >>>>
> >>>> For example for the media compression flavour that was broken and needed
> >>>> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
> >>>> index"). (For the render compression flavour MOCS was already correct.)
> >>>> But MOCS is not enough on its own for some reason.
> >>>>
> >>>> I also looked into the rendercopy surface state programming and that too
> >>>> looks okay. In fact it is possible to see how using the wrong MOCS makes
> >>>> things worse. But it also appears the surface state MOCS only applies to
> >>>> the main surface, while the aux state is the one which appears to
> >>>> contain cached/unflushed data.
> >>>
> >>> Are you saying that if you start scanning out a compressed buffer,
> >>> then clean the caches, and then do frontbuffer rendering you get
> >>> more cache dirt?
> >>
> >> Render with the GPU or CPU? Do you know of any tests or userspaces which
> >> do that?
> >
> > On the GPU.
> >
> > Can't think of anything nice off the top of my head.
> >
> > I'd probably just write a quick igt:
> > 1. create a compressed fb
> > 2. flip to it
> > 3. manually clflush the whole thing to be sure it's clean
> > 4. rendercopy some junk around, and keep an eye out for cache dirt
>
> Looks the same dirt on i915 and xe, which would support the theory that
> MOCS settings do not apply to the aux surface.
>
> If you look at these videos frame by frame you can see it:
>
> https://people.igalia.com/tursulin/i915-ccs-cache-dirt.MOV
> https://people.igalia.com/tursulin/xe-ccs-cache-dirt.MOV
>
That doesn't really look like cache dirt since it doesn't linger.
So I'd say that is more tearing than anything. Tearing can look
rather weird with tiled/compressed buffers.
To raelly see cache dirt you should tweak the test to
select a wb mocs.
Oh, and disable CPU c-states. Turns out deep c-states cause extra
cache flushes all the time which will hide the dirt in short order.
Without those extra flushes cache dirt will linger for a long time
on screen.
And also enable_psr=0 + enable_fbc=0 to make sure the display
engine is really fetching from the memory we just wrote.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-24 22:35 ` Ville Syrjälä
@ 2025-09-25 7:24 ` Tvrtko Ursulin
2025-09-25 10:08 ` Tvrtko Ursulin
0 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-25 7:24 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 24/09/2025 23:35, Ville Syrjälä wrote:
> On Wed, Sep 24, 2025 at 02:09:42PM +0100, Tvrtko Ursulin wrote:
>>
>> On 23/09/2025 15:52, Ville Syrjälä wrote:
>>> On Tue, Sep 23, 2025 at 03:40:55PM +0100, Tvrtko Ursulin wrote:
>>>>
>>>> On 23/09/2025 14:20, Ville Syrjälä wrote:
>>>>> On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
>>>>>>
>>>>>> On 23/09/2025 13:01, Ville Syrjälä wrote:
>>>>>>> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
>>>>>>>>
>>>>>>>> On 23/09/2025 11:19, Ville Syrjälä wrote:
>>>>>>>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
>>>>>>>>>> Even though frame buffer objects are created as write-combined, in
>>>>>>>>>> practice, on top of all the ring buffer flushing, an additional clflush
>>>>>>>>>> seems to be needed before display engine can coherently scan out the
>>>>>>>>>> AuxCCS compressed data without transient artifacts.
>>>>>>>>>>
>>>>>>>>>> If for comparison we look at how i915 handles things (where AuxCCS works
>>>>>>>>>> fine), as it happens it has this same clflush before a frame buffer is
>>>>>>>>>> pinned for display for the first time, courtesy the dynamic tracking of
>>>>>>>>>> the buffer cache mode and setting the latter to uncached before handing
>>>>>>>>>> to display.
>>>>>>>>>>
>>>>>>>>>> Since xe considers the buffer object caching mode as static we can
>>>>>>>>>> implement the same approach by adding a flag telling us if the buffer
>>>>>>>>>> was ever pinned for display and flush on the first pin. Subsequent re-pins
>>>>>>>>>> will not repeat the clflush but so far I have not observed any glitching
>>>>>>>>>> after the first pin.
>>>>>>>>>>
>>>>>>>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>>>>>>>>>> ---
>>>>>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
>>>>>>>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
>>>>>>>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
>>>>>>>>>>
>>>>>>>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>>>> index d8aa23b8cf14..f247c0da6b9e 100644
>>>>>>>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>>>> @@ -382,6 +382,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
>>>>>>>>>> struct xe_validation_ctx ctx;
>>>>>>>>>> struct drm_exec exec;
>>>>>>>>>> + bool first_pin;
>>>>>>>>>> int ret = 0;
>>>>>>>>>>
>>>>>>>>>> if (!vma)
>>>>>>>>>> @@ -422,8 +423,11 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
>>>>>>>>>> drm_exec_retry_on_contention(&exec);
>>>>>>>>>> xe_validation_retry_on_oom(&ctx, &ret);
>>>>>>>>>> - if (!ret)
>>>>>>>>>> + if (!ret) {
>>>>>>>>>> ttm_bo_pin(&bo->ttm);
>>>>>>>>>> + first_pin = !bo->display_pin;
>>>>>>>>>> + bo->display_pin = true;
>>>>>>>>>> + }
>>>>>>>>>> }
>>>>>>>>>> if (ret)
>>>>>>>>>> goto err;
>>>>>>>>>> @@ -436,6 +440,14 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>>>> if (ret)
>>>>>>>>>> goto err_unpin;
>>>>>>>>>>
>>>>>>>>>> + /*
>>>>>>>>>> + * Force flush frame buffer data for non-coherent display access when
>>>>>>>>>> + * AuxCCS formats are used.
>>>>>>>>>> + */
>>>>>>>>>> + if (first_pin && !xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo) &&
>>>>>>>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
>>>>>>>>>> + drm_clflush_sg(xe_bo_sg(bo));
>>>>>>>>>
>>>>>>>>> You still haven't found the actual bug that causes the dirty cache?
>>>>>>>>
>>>>>>>> Sadly no. I cross referenced everything numerous times, including
>>>>>>>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer programming,
>>>>>>>> but this extra flush always remains required. I also heard that how
>>>>>>>> flushing of the aux metadata works isn't documented anywhere and i915
>>>>>>>> does have this flush, by design or accident I don't know.
>>>>>>>
>>>>>>> i915 has the flush for the *whole* bo because it started out as
>>>>>>> cached. As soon as it undergoes a cached->uncached change (either
>>>>>>> due to set_caching ioctl or becoming a display scanout buffer) we
>>>>>>> clflush it and switch the GPU page tables from WB to UC. After
>>>>>>> that the bo stays uncached, and will need no further clflushes,
>>>>>>> assuming that everyone follows the rules:
>>>>>>>
>>>>>>> - CPU accesses via a WB mapping to an uncached bo will explicitly
>>>>>>> clflush before (invalidate) and after (write-back) the access
>>>>>>> - userspace always sets the GPU to use use "consult the PTE" MOCS
>>>>>>> setting for any potential scanout buffer. That way the GPU will
>>>>>>> use WB as long as the bo is cached, and once it becomes
>>>>>>> uncached the GPU also switches to UC accesses
>>>>>>>
>>>>>>> With xe I presume the BO should already start out as UC/WC with
>>>>>>> clean caches, and nothing should be dirtying the caches unless
>>>>>>> there is a real bug somewhere.
>>>>>>
>>>>>> Correct, it is all WC and MOCS are correctly set as WC.
>>>>>>
>>>>>> For example for the media compression flavour that was broken and needed
>>>>>> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
>>>>>> index"). (For the render compression flavour MOCS was already correct.)
>>>>>> But MOCS is not enough on its own for some reason.
>>>>>>
>>>>>> I also looked into the rendercopy surface state programming and that too
>>>>>> looks okay. In fact it is possible to see how using the wrong MOCS makes
>>>>>> things worse. But it also appears the surface state MOCS only applies to
>>>>>> the main surface, while the aux state is the one which appears to
>>>>>> contain cached/unflushed data.
>>>>>
>>>>> Are you saying that if you start scanning out a compressed buffer,
>>>>> then clean the caches, and then do frontbuffer rendering you get
>>>>> more cache dirt?
>>>>
>>>> Render with the GPU or CPU? Do you know of any tests or userspaces which
>>>> do that?
>>>
>>> On the GPU.
>>>
>>> Can't think of anything nice off the top of my head.
>>>
>>> I'd probably just write a quick igt:
>>> 1. create a compressed fb
>>> 2. flip to it
>>> 3. manually clflush the whole thing to be sure it's clean
>>> 4. rendercopy some junk around, and keep an eye out for cache dirt
>>
>> Looks the same dirt on i915 and xe, which would support the theory that
>> MOCS settings do not apply to the aux surface.
>>
>> If you look at these videos frame by frame you can see it:
>>
>> https://people.igalia.com/tursulin/i915-ccs-cache-dirt.MOV
>> https://people.igalia.com/tursulin/xe-ccs-cache-dirt.MOV
>>
>
> That doesn't really look like cache dirt since it doesn't linger.
> So I'd say that is more tearing than anything. Tearing can look
> rather weird with tiled/compressed buffers.
Some occurrences have two frames of artefacts before the grey square
settles. With a 90Hz display and camera taking 60fps video can it be
tearing?
> To raelly see cache dirt you should tweak the test to
> select a wb mocs.
>
> Oh, and disable CPU c-states. Turns out deep c-states cause extra
> cache flushes all the time which will hide the dirt in short order.
> Without those extra flushes cache dirt will linger for a long time
> on screen.
This I didn't do, will try.
> And also enable_psr=0 + enable_fbc=0 to make sure the display
> engine is really fetching from the memory we just wrote.
>
This I did since the laptop has PSR.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-25 7:24 ` Tvrtko Ursulin
@ 2025-09-25 10:08 ` Tvrtko Ursulin
2025-09-26 7:41 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-09-25 10:08 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 25/09/2025 08:24, Tvrtko Ursulin wrote:
>
> On 24/09/2025 23:35, Ville Syrjälä wrote:
>> On Wed, Sep 24, 2025 at 02:09:42PM +0100, Tvrtko Ursulin wrote:
>>>
>>> On 23/09/2025 15:52, Ville Syrjälä wrote:
>>>> On Tue, Sep 23, 2025 at 03:40:55PM +0100, Tvrtko Ursulin wrote:
>>>>>
>>>>> On 23/09/2025 14:20, Ville Syrjälä wrote:
>>>>>> On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
>>>>>>>
>>>>>>> On 23/09/2025 13:01, Ville Syrjälä wrote:
>>>>>>>> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
>>>>>>>>>
>>>>>>>>> On 23/09/2025 11:19, Ville Syrjälä wrote:
>>>>>>>>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
>>>>>>>>>>> Even though frame buffer objects are created as write-
>>>>>>>>>>> combined, in
>>>>>>>>>>> practice, on top of all the ring buffer flushing, an
>>>>>>>>>>> additional clflush
>>>>>>>>>>> seems to be needed before display engine can coherently scan
>>>>>>>>>>> out the
>>>>>>>>>>> AuxCCS compressed data without transient artifacts.
>>>>>>>>>>>
>>>>>>>>>>> If for comparison we look at how i915 handles things (where
>>>>>>>>>>> AuxCCS works
>>>>>>>>>>> fine), as it happens it has this same clflush before a frame
>>>>>>>>>>> buffer is
>>>>>>>>>>> pinned for display for the first time, courtesy the dynamic
>>>>>>>>>>> tracking of
>>>>>>>>>>> the buffer cache mode and setting the latter to uncached
>>>>>>>>>>> before handing
>>>>>>>>>>> to display.
>>>>>>>>>>>
>>>>>>>>>>> Since xe considers the buffer object caching mode as static
>>>>>>>>>>> we can
>>>>>>>>>>> implement the same approach by adding a flag telling us if
>>>>>>>>>>> the buffer
>>>>>>>>>>> was ever pinned for display and flush on the first pin.
>>>>>>>>>>> Subsequent re-pins
>>>>>>>>>>> will not repeat the clflush but so far I have not observed
>>>>>>>>>>> any glitching
>>>>>>>>>>> after the first pin.
>>>>>>>>>>>
>>>>>>>>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>>>>>>>>>>> ---
>>>>>>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
>>>>>>>>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
>>>>>>>>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
>>>>>>>>>>>
>>>>>>>>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/
>>>>>>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>>>>> index d8aa23b8cf14..f247c0da6b9e 100644
>>>>>>>>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>>>>>>>>>>> @@ -382,6 +382,7 @@ static struct i915_vma
>>>>>>>>>>> *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
>>>>>>>>>>> struct xe_validation_ctx ctx;
>>>>>>>>>>> struct drm_exec exec;
>>>>>>>>>>> + bool first_pin;
>>>>>>>>>>> int ret = 0;
>>>>>>>>>>> if (!vma)
>>>>>>>>>>> @@ -422,8 +423,11 @@ static struct i915_vma
>>>>>>>>>>> *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
>>>>>>>>>>> drm_exec_retry_on_contention(&exec);
>>>>>>>>>>> xe_validation_retry_on_oom(&ctx, &ret);
>>>>>>>>>>> - if (!ret)
>>>>>>>>>>> + if (!ret) {
>>>>>>>>>>> ttm_bo_pin(&bo->ttm);
>>>>>>>>>>> + first_pin = !bo->display_pin;
>>>>>>>>>>> + bo->display_pin = true;
>>>>>>>>>>> + }
>>>>>>>>>>> }
>>>>>>>>>>> if (ret)
>>>>>>>>>>> goto err;
>>>>>>>>>>> @@ -436,6 +440,14 @@ static struct i915_vma
>>>>>>>>>>> *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>>>>>>>>>>> if (ret)
>>>>>>>>>>> goto err_unpin;
>>>>>>>>>>> + /*
>>>>>>>>>>> + * Force flush frame buffer data for non-coherent
>>>>>>>>>>> display access when
>>>>>>>>>>> + * AuxCCS formats are used.
>>>>>>>>>>> + */
>>>>>>>>>>> + if (first_pin && !xe_bo_is_vram(bo) && !
>>>>>>>>>>> xe_bo_is_stolen(bo) &&
>>>>>>>>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
>>>>>>>>>>> + drm_clflush_sg(xe_bo_sg(bo));
>>>>>>>>>>
>>>>>>>>>> You still haven't found the actual bug that causes the dirty
>>>>>>>>>> cache?
>>>>>>>>>
>>>>>>>>> Sadly no. I cross referenced everything numerous times, including
>>>>>>>>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer
>>>>>>>>> programming,
>>>>>>>>> but this extra flush always remains required. I also heard that
>>>>>>>>> how
>>>>>>>>> flushing of the aux metadata works isn't documented anywhere
>>>>>>>>> and i915
>>>>>>>>> does have this flush, by design or accident I don't know.
>>>>>>>>
>>>>>>>> i915 has the flush for the *whole* bo because it started out as
>>>>>>>> cached. As soon as it undergoes a cached->uncached change (either
>>>>>>>> due to set_caching ioctl or becoming a display scanout buffer) we
>>>>>>>> clflush it and switch the GPU page tables from WB to UC. After
>>>>>>>> that the bo stays uncached, and will need no further clflushes,
>>>>>>>> assuming that everyone follows the rules:
>>>>>>>>
>>>>>>>> - CPU accesses via a WB mapping to an uncached bo will explicitly
>>>>>>>> clflush before (invalidate) and after (write-back) the access
>>>>>>>> - userspace always sets the GPU to use use "consult the PTE" MOCS
>>>>>>>> setting for any potential scanout buffer. That way the GPU
>>>>>>>> will
>>>>>>>> use WB as long as the bo is cached, and once it becomes
>>>>>>>> uncached the GPU also switches to UC accesses
>>>>>>>>
>>>>>>>> With xe I presume the BO should already start out as UC/WC with
>>>>>>>> clean caches, and nothing should be dirtying the caches unless
>>>>>>>> there is a real bug somewhere.
>>>>>>>
>>>>>>> Correct, it is all WC and MOCS are correctly set as WC.
>>>>>>>
>>>>>>> For example for the media compression flavour that was broken and
>>>>>>> needed
>>>>>>> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
>>>>>>> index"). (For the render compression flavour MOCS was already
>>>>>>> correct.)
>>>>>>> But MOCS is not enough on its own for some reason.
>>>>>>>
>>>>>>> I also looked into the rendercopy surface state programming and
>>>>>>> that too
>>>>>>> looks okay. In fact it is possible to see how using the wrong
>>>>>>> MOCS makes
>>>>>>> things worse. But it also appears the surface state MOCS only
>>>>>>> applies to
>>>>>>> the main surface, while the aux state is the one which appears to
>>>>>>> contain cached/unflushed data.
>>>>>>
>>>>>> Are you saying that if you start scanning out a compressed buffer,
>>>>>> then clean the caches, and then do frontbuffer rendering you get
>>>>>> more cache dirt?
>>>>>
>>>>> Render with the GPU or CPU? Do you know of any tests or userspaces
>>>>> which
>>>>> do that?
>>>>
>>>> On the GPU.
>>>>
>>>> Can't think of anything nice off the top of my head.
>>>>
>>>> I'd probably just write a quick igt:
>>>> 1. create a compressed fb
>>>> 2. flip to it
>>>> 3. manually clflush the whole thing to be sure it's clean
>>>> 4. rendercopy some junk around, and keep an eye out for cache dirt
>>>
>>> Looks the same dirt on i915 and xe, which would support the theory that
>>> MOCS settings do not apply to the aux surface.
>>>
>>> If you look at these videos frame by frame you can see it:
>>>
>>> https://people.igalia.com/tursulin/i915-ccs-cache-dirt.MOV
>>> https://people.igalia.com/tursulin/xe-ccs-cache-dirt.MOV
>>>
>>
>> That doesn't really look like cache dirt since it doesn't linger.
>> So I'd say that is more tearing than anything. Tearing can look
>> rather weird with tiled/compressed buffers.
>
> Some occurrences have two frames of artefacts before the grey square
> settles. With a 90Hz display and camera taking 60fps video can it be
> tearing?
>
>> To raelly see cache dirt you should tweak the test to
>> select a wb mocs.
>>
>> Oh, and disable CPU c-states. Turns out deep c-states cause extra
>> cache flushes all the time which will hide the dirt in short order.
>> Without those extra flushes cache dirt will linger for a long time
>> on screen.
>
> This I didn't do, will try.
With no C-states results are indeed much more "fun". Although still the
same between i915 and xe:
https://people.igalia.com/tursulin/i915-ccs-cache-dirt-nocstates.MOV
https://people.igalia.com/tursulin/xe-ccs-cache-dirt-nocstates.MOV
Still MOCS 3 so uncached in render state verified for both.
Regards,
Tvrtko
>
>> And also enable_psr=0 + enable_fbc=0 to make sure the display
>> engine is really fetching from the memory we just wrote.
>>
>
> This I did since the laptop has PSR.
>
> Regards,
>
> Tvrtko
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-25 10:08 ` Tvrtko Ursulin
@ 2025-09-26 7:41 ` Ville Syrjälä
2025-09-26 19:35 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-26 7:41 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Thu, Sep 25, 2025 at 11:08:50AM +0100, Tvrtko Ursulin wrote:
>
> On 25/09/2025 08:24, Tvrtko Ursulin wrote:
> >
> > On 24/09/2025 23:35, Ville Syrjälä wrote:
> >> On Wed, Sep 24, 2025 at 02:09:42PM +0100, Tvrtko Ursulin wrote:
> >>>
> >>> On 23/09/2025 15:52, Ville Syrjälä wrote:
> >>>> On Tue, Sep 23, 2025 at 03:40:55PM +0100, Tvrtko Ursulin wrote:
> >>>>>
> >>>>> On 23/09/2025 14:20, Ville Syrjälä wrote:
> >>>>>> On Tue, Sep 23, 2025 at 01:25:58PM +0100, Tvrtko Ursulin wrote:
> >>>>>>>
> >>>>>>> On 23/09/2025 13:01, Ville Syrjälä wrote:
> >>>>>>>> On Tue, Sep 23, 2025 at 11:48:59AM +0100, Tvrtko Ursulin wrote:
> >>>>>>>>>
> >>>>>>>>> On 23/09/2025 11:19, Ville Syrjälä wrote:
> >>>>>>>>>> On Tue, Sep 23, 2025 at 11:08:04AM +0100, Tvrtko Ursulin wrote:
> >>>>>>>>>>> Even though frame buffer objects are created as write-
> >>>>>>>>>>> combined, in
> >>>>>>>>>>> practice, on top of all the ring buffer flushing, an
> >>>>>>>>>>> additional clflush
> >>>>>>>>>>> seems to be needed before display engine can coherently scan
> >>>>>>>>>>> out the
> >>>>>>>>>>> AuxCCS compressed data without transient artifacts.
> >>>>>>>>>>>
> >>>>>>>>>>> If for comparison we look at how i915 handles things (where
> >>>>>>>>>>> AuxCCS works
> >>>>>>>>>>> fine), as it happens it has this same clflush before a frame
> >>>>>>>>>>> buffer is
> >>>>>>>>>>> pinned for display for the first time, courtesy the dynamic
> >>>>>>>>>>> tracking of
> >>>>>>>>>>> the buffer cache mode and setting the latter to uncached
> >>>>>>>>>>> before handing
> >>>>>>>>>>> to display.
> >>>>>>>>>>>
> >>>>>>>>>>> Since xe considers the buffer object caching mode as static
> >>>>>>>>>>> we can
> >>>>>>>>>>> implement the same approach by adding a flag telling us if
> >>>>>>>>>>> the buffer
> >>>>>>>>>>> was ever pinned for display and flush on the first pin.
> >>>>>>>>>>> Subsequent re-pins
> >>>>>>>>>>> will not repeat the clflush but so far I have not observed
> >>>>>>>>>>> any glitching
> >>>>>>>>>>> after the first pin.
> >>>>>>>>>>>
> >>>>>>>>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> >>>>>>>>>>> ---
> >>>>>>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 14 +++++++++++++-
> >>>>>>>>>>> drivers/gpu/drm/xe/xe_bo_types.h | 14 +++++++++-----
> >>>>>>>>>>> 2 files changed, 22 insertions(+), 6 deletions(-)
> >>>>>>>>>>>
> >>>>>>>>>>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/
> >>>>>>>>>>> drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>>>>>>> index d8aa23b8cf14..f247c0da6b9e 100644
> >>>>>>>>>>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>>>>>>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> >>>>>>>>>>> @@ -382,6 +382,7 @@ static struct i915_vma
> >>>>>>>>>>> *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>>>>>>> struct xe_bo *bo = gem_to_xe_bo(obj);
> >>>>>>>>>>> struct xe_validation_ctx ctx;
> >>>>>>>>>>> struct drm_exec exec;
> >>>>>>>>>>> + bool first_pin;
> >>>>>>>>>>> int ret = 0;
> >>>>>>>>>>> if (!vma)
> >>>>>>>>>>> @@ -422,8 +423,11 @@ static struct i915_vma
> >>>>>>>>>>> *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>>>>>>> ret = xe_bo_validate(bo, NULL, true, &exec);
> >>>>>>>>>>> drm_exec_retry_on_contention(&exec);
> >>>>>>>>>>> xe_validation_retry_on_oom(&ctx, &ret);
> >>>>>>>>>>> - if (!ret)
> >>>>>>>>>>> + if (!ret) {
> >>>>>>>>>>> ttm_bo_pin(&bo->ttm);
> >>>>>>>>>>> + first_pin = !bo->display_pin;
> >>>>>>>>>>> + bo->display_pin = true;
> >>>>>>>>>>> + }
> >>>>>>>>>>> }
> >>>>>>>>>>> if (ret)
> >>>>>>>>>>> goto err;
> >>>>>>>>>>> @@ -436,6 +440,14 @@ static struct i915_vma
> >>>>>>>>>>> *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >>>>>>>>>>> if (ret)
> >>>>>>>>>>> goto err_unpin;
> >>>>>>>>>>> + /*
> >>>>>>>>>>> + * Force flush frame buffer data for non-coherent
> >>>>>>>>>>> display access when
> >>>>>>>>>>> + * AuxCCS formats are used.
> >>>>>>>>>>> + */
> >>>>>>>>>>> + if (first_pin && !xe_bo_is_vram(bo) && !
> >>>>>>>>>>> xe_bo_is_stolen(bo) &&
> >>>>>>>>>>> + intel_fb_is_ccs_modifier(fb->base.modifier))
> >>>>>>>>>>> + drm_clflush_sg(xe_bo_sg(bo));
> >>>>>>>>>>
> >>>>>>>>>> You still haven't found the actual bug that causes the dirty
> >>>>>>>>>> cache?
> >>>>>>>>>
> >>>>>>>>> Sadly no. I cross referenced everything numerous times, including
> >>>>>>>>> workarounds, tried pretty much 1:1 i915 vs xe ring buffer
> >>>>>>>>> programming,
> >>>>>>>>> but this extra flush always remains required. I also heard that
> >>>>>>>>> how
> >>>>>>>>> flushing of the aux metadata works isn't documented anywhere
> >>>>>>>>> and i915
> >>>>>>>>> does have this flush, by design or accident I don't know.
> >>>>>>>>
> >>>>>>>> i915 has the flush for the *whole* bo because it started out as
> >>>>>>>> cached. As soon as it undergoes a cached->uncached change (either
> >>>>>>>> due to set_caching ioctl or becoming a display scanout buffer) we
> >>>>>>>> clflush it and switch the GPU page tables from WB to UC. After
> >>>>>>>> that the bo stays uncached, and will need no further clflushes,
> >>>>>>>> assuming that everyone follows the rules:
> >>>>>>>>
> >>>>>>>> - CPU accesses via a WB mapping to an uncached bo will explicitly
> >>>>>>>> clflush before (invalidate) and after (write-back) the access
> >>>>>>>> - userspace always sets the GPU to use use "consult the PTE" MOCS
> >>>>>>>> setting for any potential scanout buffer. That way the GPU
> >>>>>>>> will
> >>>>>>>> use WB as long as the bo is cached, and once it becomes
> >>>>>>>> uncached the GPU also switches to UC accesses
> >>>>>>>>
> >>>>>>>> With xe I presume the BO should already start out as UC/WC with
> >>>>>>>> clean caches, and nothing should be dirtying the caches unless
> >>>>>>>> there is a real bug somewhere.
> >>>>>>>
> >>>>>>> Correct, it is all WC and MOCS are correctly set as WC.
> >>>>>>>
> >>>>>>> For example for the media compression flavour that was broken and
> >>>>>>> needed
> >>>>>>> fixing in b412b144685f ("lib/intel/veboxcopy: Respect buffer MOCS
> >>>>>>> index"). (For the render compression flavour MOCS was already
> >>>>>>> correct.)
> >>>>>>> But MOCS is not enough on its own for some reason.
> >>>>>>>
> >>>>>>> I also looked into the rendercopy surface state programming and
> >>>>>>> that too
> >>>>>>> looks okay. In fact it is possible to see how using the wrong
> >>>>>>> MOCS makes
> >>>>>>> things worse. But it also appears the surface state MOCS only
> >>>>>>> applies to
> >>>>>>> the main surface, while the aux state is the one which appears to
> >>>>>>> contain cached/unflushed data.
> >>>>>>
> >>>>>> Are you saying that if you start scanning out a compressed buffer,
> >>>>>> then clean the caches, and then do frontbuffer rendering you get
> >>>>>> more cache dirt?
> >>>>>
> >>>>> Render with the GPU or CPU? Do you know of any tests or userspaces
> >>>>> which
> >>>>> do that?
> >>>>
> >>>> On the GPU.
> >>>>
> >>>> Can't think of anything nice off the top of my head.
> >>>>
> >>>> I'd probably just write a quick igt:
> >>>> 1. create a compressed fb
> >>>> 2. flip to it
> >>>> 3. manually clflush the whole thing to be sure it's clean
> >>>> 4. rendercopy some junk around, and keep an eye out for cache dirt
> >>>
> >>> Looks the same dirt on i915 and xe, which would support the theory that
> >>> MOCS settings do not apply to the aux surface.
> >>>
> >>> If you look at these videos frame by frame you can see it:
> >>>
> >>> https://people.igalia.com/tursulin/i915-ccs-cache-dirt.MOV
> >>> https://people.igalia.com/tursulin/xe-ccs-cache-dirt.MOV
> >>>
> >>
> >> That doesn't really look like cache dirt since it doesn't linger.
> >> So I'd say that is more tearing than anything. Tearing can look
> >> rather weird with tiled/compressed buffers.
> >
> > Some occurrences have two frames of artefacts before the grey square
> > settles. With a 90Hz display and camera taking 60fps video can it be
> > tearing?
> >
> >> To raelly see cache dirt you should tweak the test to
> >> select a wb mocs.
> >>
> >> Oh, and disable CPU c-states. Turns out deep c-states cause extra
> >> cache flushes all the time which will hide the dirt in short order.
> >> Without those extra flushes cache dirt will linger for a long time
> >> on screen.
> >
> > This I didn't do, will try.
>
> With no C-states results are indeed much more "fun". Although still the
> same between i915 and xe:
>
> https://people.igalia.com/tursulin/i915-ccs-cache-dirt-nocstates.MOV
> https://people.igalia.com/tursulin/xe-ccs-cache-dirt-nocstates.MOV
>
> Still MOCS 3 so uncached in render state verified for both.
I reverse engineered this a bit and there's definitely a
MOCS issue at play.
First I noticed that if filled the entire MOCS table with
UC the problem went away. I then filled the entire table
with WB and essentially bisected what I need to make UC
to fix it. And I had to repeat that same process starting
from the other end of table.
Looks like there is some undocumented magic in the hardware.
MOCS 61 really is special:
- MOCS 61 UC, others WB, select MOCS 61 -> no corruption
MOCS 0 and 63 are special in other ways:
- MOCS X UC, others WB, select MOCS X -> corruption
- MOCS X+0 UC, others WB, select MOCS X -> corruption
- MOCS X+63 UC, others WB, select MOCS X -> corruption
- MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
where X != 61
I didn't actually test all values of X there, but I did spot
check a handful of them.
Also, ADL is affected, but TGL doesn't seem to be. Though I
still need to check the situation on TGL a bit more thoroughly.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-26 7:41 ` Ville Syrjälä
@ 2025-09-26 19:35 ` Ville Syrjälä
2025-10-02 14:01 ` Tvrtko Ursulin
0 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-09-26 19:35 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Fri, Sep 26, 2025 at 10:41:56AM +0300, Ville Syrjälä wrote:
> I reverse engineered this a bit and there's definitely a
> MOCS issue at play.
>
> First I noticed that if filled the entire MOCS table with
> UC the problem went away. I then filled the entire table
> with WB and essentially bisected what I need to make UC
> to fix it. And I had to repeat that same process starting
> from the other end of table.
>
> Looks like there is some undocumented magic in the hardware.
>
> MOCS 61 really is special:
> - MOCS 61 UC, others WB, select MOCS 61 -> no corruption
>
> MOCS 0 and 63 are special in other ways:
> - MOCS X UC, others WB, select MOCS X -> corruption
> - MOCS X+0 UC, others WB, select MOCS X -> corruption
> - MOCS X+63 UC, others WB, select MOCS X -> corruption
> - MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
> where X != 61
OK, the MOCS 63 issue was caused by me having L3=WB still in
MOCS X. If I change MOCS X to L3=UC, MOCS 63 no longer makes
a difference. I suppose that means MOCS 63 is still used for
L3 evictions, even though bspec no longer mentions that fact
explicitly.
So MOCS 0 is the thing that really matters for CCS. And for
MOCS 0 only the LLC WB vs. UC selection matters. L3 WB vs. UC
doesn't seem to make any difference.
It's interesting that MOCS 60 is documented as a "CCS special case",
but in reality it's MOCS 0 that matters for CCS. I wonder if some
wires got crossed in the hw design and the wrong MOCS entry ended
up being used for CCS and no one noticed...
>
> I didn't actually test all values of X there, but I did spot
> check a handful of them.
>
> Also, ADL is affected, but TGL doesn't seem to be. Though I
> still need to check the situation on TGL a bit more thoroughly.
TGL actually works exactly the same as ADL. The only reason why
TGL worked correctly out of the box was that we use a different
MOCS table for TGL/RKL (IIRC because we started out with the
wrong table and early Mesa versions depended on that), and in
that table MOCS 0 is just 0x0, whereas on ADL MOCS 0 is WB.
And now I'm wondering how much performance we're leaving on
the floor with CCS by having a suboptimal MOCS 0 on TGL/RKL...
And I'm also curious about older platforms. I think those also
have MOCS 0 as UC. I'll need to test if those also have this
MOCS 0 special case for CCS...
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 02/13] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
2025-09-23 10:07 ` [PATCH v12 02/13] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
@ 2025-10-01 15:47 ` Rodrigo Vivi
0 siblings, 0 replies; 45+ messages in thread
From: Rodrigo Vivi @ 2025-10-01 15:47 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Tue, Sep 23, 2025 at 11:07:55AM +0100, Tvrtko Ursulin wrote:
> According to i915 commit
> ad8ebf12217e ("drm/i915/gt: Ensure memory quiesced before invalidation")
> quiescing of the memory traffic is required before invalidating the AuxCCS
> tables.
>
> Add an extra pipe control flush to achieve that.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_ring_ops.c | 10 +++++++++-
> drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +-
> 2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index 25259b2784bc..af0141c6f809 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -358,10 +358,18 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> struct xe_gt *gt = job->q->gt;
> struct xe_device *xe = gt_to_xe(gt);
> bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
> + const bool aux_ccs = has_aux_ccs(xe);
> u32 mask_flags = 0;
>
> i = emit_copy_timestamp(lrc, dw, i);
>
> + /*
> + * On AuxCCS platforms the invalidation of the Aux table requires
> + * quiescing the memory traffic beforehand.
> + */
> + if (aux_ccs)
> + i = emit_render_cache_flush(job, dw, i);
> +
> dw[i++] = preparser_disable(true);
> if (lacks_render)
> mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS;
> @@ -372,7 +380,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> i = emit_pipe_invalidate(mask_flags, job->ring_ops_flush_tlb, dw, i);
>
> /* hsdes: 1809175790 */
> - if (has_aux_ccs(xe))
> + if (aux_ccs)
> i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
>
> dw[i++] = preparser_disable(false);
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
> index d7e3e150a9a5..477dc7defd72 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
> +++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
> @@ -8,7 +8,7 @@
>
> struct xe_sched_job;
>
> -#define MAX_JOB_SIZE_DW 58
> +#define MAX_JOB_SIZE_DW 70
> #define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
>
> /**
> --
> 2.48.0
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-09-26 19:35 ` Ville Syrjälä
@ 2025-10-02 14:01 ` Tvrtko Ursulin
2025-10-02 14:36 ` Tvrtko Ursulin
2025-10-02 16:23 ` Ville Syrjälä
0 siblings, 2 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-10-02 14:01 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
Hi,
On 26/09/2025 20:35, Ville Syrjälä wrote:
> On Fri, Sep 26, 2025 at 10:41:56AM +0300, Ville Syrjälä wrote:
>> I reverse engineered this a bit and there's definitely a
>> MOCS issue at play.
>>
>> First I noticed that if filled the entire MOCS table with
>> UC the problem went away. I then filled the entire table
>> with WB and essentially bisected what I need to make UC
>> to fix it. And I had to repeat that same process starting
>> from the other end of table.
>>
>> Looks like there is some undocumented magic in the hardware.
>>
>> MOCS 61 really is special:
>> - MOCS 61 UC, others WB, select MOCS 61 -> no corruption
>>
>> MOCS 0 and 63 are special in other ways:
>> - MOCS X UC, others WB, select MOCS X -> corruption
>> - MOCS X+0 UC, others WB, select MOCS X -> corruption
>> - MOCS X+63 UC, others WB, select MOCS X -> corruption
>> - MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
>> where X != 61
>
> OK, the MOCS 63 issue was caused by me having L3=WB still in
> MOCS X. If I change MOCS X to L3=UC, MOCS 63 no longer makes
> a difference. I suppose that means MOCS 63 is still used for
> L3 evictions, even though bspec no longer mentions that fact
> explicitly.
>
> So MOCS 0 is the thing that really matters for CCS. And for
> MOCS 0 only the LLC WB vs. UC selection matters. L3 WB vs. UC
> doesn't seem to make any difference.
>
> It's interesting that MOCS 60 is documented as a "CCS special case",
> but in reality it's MOCS 0 that matters for CCS. I wonder if some
> wires got crossed in the hw design and the wrong MOCS entry ended
> up being used for CCS and no one noticed...
Oh wow, that is an amazing discovery!
I verified it on my end too. Setting MOCS 0 to uncached and cache dirt
is gone. No need to the explicit cache flush patch on first pin.
Luckily ADL is unsupported so we could change it to UC. I will send a
series for CI to see what it will say.
>> I didn't actually test all values of X there, but I did spot
>> check a handful of them.
>>
>> Also, ADL is affected, but TGL doesn't seem to be. Though I
>> still need to check the situation on TGL a bit more thoroughly.
>
> TGL actually works exactly the same as ADL. The only reason why
> TGL worked correctly out of the box was that we use a different
> MOCS table for TGL/RKL (IIRC because we started out with the
> wrong table and early Mesa versions depended on that), and in
> that table MOCS 0 is just 0x0, whereas on ADL MOCS 0 is WB.
Kind of sounds familiar but the only commit I found was 3f027d61663f
("drm/i915/gt: Add separate MOCS table for Gen12 devices other than
TGL/RKL") but it is about MOCS 1. What am I missing? Are the hw defaults
maybe different and not the code?
Regards,
Tvrtko
> And now I'm wondering how much performance we're leaving on
> the floor with CCS by having a suboptimal MOCS 0 on TGL/RKL...
>
> And I'm also curious about older platforms. I think those also
> have MOCS 0 as UC. I'll need to test if those also have this
> MOCS 0 special case for CCS...
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-10-02 14:01 ` Tvrtko Ursulin
@ 2025-10-02 14:36 ` Tvrtko Ursulin
2025-10-02 16:23 ` Ville Syrjälä
1 sibling, 0 replies; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-10-02 14:36 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 02/10/2025 15:01, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 26/09/2025 20:35, Ville Syrjälä wrote:
>> On Fri, Sep 26, 2025 at 10:41:56AM +0300, Ville Syrjälä wrote:
>>> I reverse engineered this a bit and there's definitely a
>>> MOCS issue at play.
>>>
>>> First I noticed that if filled the entire MOCS table with
>>> UC the problem went away. I then filled the entire table
>>> with WB and essentially bisected what I need to make UC
>>> to fix it. And I had to repeat that same process starting
>>> from the other end of table.
>>>
>>> Looks like there is some undocumented magic in the hardware.
>>>
>>> MOCS 61 really is special:
>>> - MOCS 61 UC, others WB, select MOCS 61 -> no corruption
>>>
>>> MOCS 0 and 63 are special in other ways:
>>> - MOCS X UC, others WB, select MOCS X -> corruption
>>> - MOCS X+0 UC, others WB, select MOCS X -> corruption
>>> - MOCS X+63 UC, others WB, select MOCS X -> corruption
>>> - MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
>>> where X != 61
>>
>> OK, the MOCS 63 issue was caused by me having L3=WB still in
>> MOCS X. If I change MOCS X to L3=UC, MOCS 63 no longer makes
>> a difference. I suppose that means MOCS 63 is still used for
>> L3 evictions, even though bspec no longer mentions that fact
>> explicitly.
>>
>> So MOCS 0 is the thing that really matters for CCS. And for
>> MOCS 0 only the LLC WB vs. UC selection matters. L3 WB vs. UC
>> doesn't seem to make any difference.
>>
>> It's interesting that MOCS 60 is documented as a "CCS special case",
>> but in reality it's MOCS 0 that matters for CCS. I wonder if some
>> wires got crossed in the hw design and the wrong MOCS entry ended
>> up being used for CCS and no one noticed...
>
> Oh wow, that is an amazing discovery!
>
> I verified it on my end too. Setting MOCS 0 to uncached and cache dirt
> is gone. No need to the explicit cache flush patch on first pin.
>
> Luckily ADL is unsupported so we could change it to UC. I will send a
> series for CI to see what it will say.
Doh, but it would be bad to change it for all uses which actually do not
want UC. Sorry did not wake up fully... So assuming the test CI runs
will be all clear it will still be a difficult situation on what to do.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-10-02 14:01 ` Tvrtko Ursulin
2025-10-02 14:36 ` Tvrtko Ursulin
@ 2025-10-02 16:23 ` Ville Syrjälä
2025-10-02 17:04 ` Tvrtko Ursulin
1 sibling, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-10-02 16:23 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Thu, Oct 02, 2025 at 03:01:08PM +0100, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 26/09/2025 20:35, Ville Syrjälä wrote:
> > On Fri, Sep 26, 2025 at 10:41:56AM +0300, Ville Syrjälä wrote:
> >> I reverse engineered this a bit and there's definitely a
> >> MOCS issue at play.
> >>
> >> First I noticed that if filled the entire MOCS table with
> >> UC the problem went away. I then filled the entire table
> >> with WB and essentially bisected what I need to make UC
> >> to fix it. And I had to repeat that same process starting
> >> from the other end of table.
> >>
> >> Looks like there is some undocumented magic in the hardware.
> >>
> >> MOCS 61 really is special:
> >> - MOCS 61 UC, others WB, select MOCS 61 -> no corruption
> >>
> >> MOCS 0 and 63 are special in other ways:
> >> - MOCS X UC, others WB, select MOCS X -> corruption
> >> - MOCS X+0 UC, others WB, select MOCS X -> corruption
> >> - MOCS X+63 UC, others WB, select MOCS X -> corruption
> >> - MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
> >> where X != 61
> >
> > OK, the MOCS 63 issue was caused by me having L3=WB still in
> > MOCS X. If I change MOCS X to L3=UC, MOCS 63 no longer makes
> > a difference. I suppose that means MOCS 63 is still used for
> > L3 evictions, even though bspec no longer mentions that fact
> > explicitly.
> >
> > So MOCS 0 is the thing that really matters for CCS. And for
> > MOCS 0 only the LLC WB vs. UC selection matters. L3 WB vs. UC
> > doesn't seem to make any difference.
> >
> > It's interesting that MOCS 60 is documented as a "CCS special case",
> > but in reality it's MOCS 0 that matters for CCS. I wonder if some
> > wires got crossed in the hw design and the wrong MOCS entry ended
> > up being used for CCS and no one noticed...
>
> Oh wow, that is an amazing discovery!
>
> I verified it on my end too. Setting MOCS 0 to uncached and cache dirt
> is gone. No need to the explicit cache flush patch on first pin.
>
> Luckily ADL is unsupported so we could change it to UC. I will send a
> series for CI to see what it will say.
I think the real fix is to change igt to use MOCS 61 for tgl/adl.
That is what Mesa uses as well.
Looks like Mesa uses a different MOCS for DG1 and DG2. Those
do seem to like up with what's in bspec, so probably someone
needs to just copy the whole MOCS thing from Mesa into igt.
Looks like Mesa doesn't even use a UC MOCS for anything except
on MTL, so possibly we can just change the TGL MOCS 0 to be the
same WB as on ADL, and maybe that gives some performance benefit
in some cases.
>
> >> I didn't actually test all values of X there, but I did spot
> >> check a handful of them.
> >>
> >> Also, ADL is affected, but TGL doesn't seem to be. Though I
> >> still need to check the situation on TGL a bit more thoroughly.
> >
> > TGL actually works exactly the same as ADL. The only reason why
> > TGL worked correctly out of the box was that we use a different
> > MOCS table for TGL/RKL (IIRC because we started out with the
> > wrong table and early Mesa versions depended on that), and in
> > that table MOCS 0 is just 0x0, whereas on ADL MOCS 0 is WB.
>
> Kind of sounds familiar but the only commit I found was 3f027d61663f
> ("drm/i915/gt: Add separate MOCS table for Gen12 devices other than
> TGL/RKL") but it is about MOCS 1. What am I missing? Are the hw defaults
> maybe different and not the code?
The defaults are somehow populated differently dependign on
unused_entries_index which is also being set in a very confusing
way (first set it to 1(PTE) on everything and the overwritten
with some other value for some of the platforms). The code could
certainly use a good cleanup pass.
Anyways, the default index ends up being different on TGL and ADL
and thus MOCS 0 ends up different as well.
Since MOCS 0 seems to be special, we should probablya populate
it explicitly. And I suppose we should first figure out if
other platforms are also affected.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-10-02 16:23 ` Ville Syrjälä
@ 2025-10-02 17:04 ` Tvrtko Ursulin
2025-10-02 17:14 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Tvrtko Ursulin @ 2025-10-02 17:04 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe, kernel-dev
On 02/10/2025 17:23, Ville Syrjälä wrote:
> On Thu, Oct 02, 2025 at 03:01:08PM +0100, Tvrtko Ursulin wrote:
>>
>> Hi,
>>
>> On 26/09/2025 20:35, Ville Syrjälä wrote:
>>> On Fri, Sep 26, 2025 at 10:41:56AM +0300, Ville Syrjälä wrote:
>>>> I reverse engineered this a bit and there's definitely a
>>>> MOCS issue at play.
>>>>
>>>> First I noticed that if filled the entire MOCS table with
>>>> UC the problem went away. I then filled the entire table
>>>> with WB and essentially bisected what I need to make UC
>>>> to fix it. And I had to repeat that same process starting
>>>> from the other end of table.
>>>>
>>>> Looks like there is some undocumented magic in the hardware.
>>>>
>>>> MOCS 61 really is special:
>>>> - MOCS 61 UC, others WB, select MOCS 61 -> no corruption
>>>>
>>>> MOCS 0 and 63 are special in other ways:
>>>> - MOCS X UC, others WB, select MOCS X -> corruption
>>>> - MOCS X+0 UC, others WB, select MOCS X -> corruption
>>>> - MOCS X+63 UC, others WB, select MOCS X -> corruption
>>>> - MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
>>>> where X != 61
>>>
>>> OK, the MOCS 63 issue was caused by me having L3=WB still in
>>> MOCS X. If I change MOCS X to L3=UC, MOCS 63 no longer makes
>>> a difference. I suppose that means MOCS 63 is still used for
>>> L3 evictions, even though bspec no longer mentions that fact
>>> explicitly.
>>>
>>> So MOCS 0 is the thing that really matters for CCS. And for
>>> MOCS 0 only the LLC WB vs. UC selection matters. L3 WB vs. UC
>>> doesn't seem to make any difference.
>>>
>>> It's interesting that MOCS 60 is documented as a "CCS special case",
>>> but in reality it's MOCS 0 that matters for CCS. I wonder if some
>>> wires got crossed in the hw design and the wrong MOCS entry ended
>>> up being used for CCS and no one noticed...
>>
>> Oh wow, that is an amazing discovery!
>>
>> I verified it on my end too. Setting MOCS 0 to uncached and cache dirt
>> is gone. No need to the explicit cache flush patch on first pin.
>>
>> Luckily ADL is unsupported so we could change it to UC. I will send a
>> series for CI to see what it will say.
So the MOCS 0 UC experiment did not seem to be 100% glitch free. It
*looks* it helps, maybe even a lot, but not fully - three tests still
failed due CRC mismatches.
> I think the real fix is to change igt to use MOCS 61 for tgl/adl.
> That is what Mesa uses as well.
I somehow glossed over the fact you initially wrote 61 worked fine for
you and focused only on your X+0+63 combinations. :(
61 works fine for me locally too. Very curious hw behaviour.
It would be nice to do a CI run with IGT changed to 61 but AFAIK the xe
patchwork/CI does not support the Test-with tag.
> Looks like Mesa uses a different MOCS for DG1 and DG2. Those
> do seem to like up with what's in bspec, so probably someone
> needs to just copy the whole MOCS thing from Mesa into igt.
I can have a look.
> Looks like Mesa doesn't even use a UC MOCS for anything except
> on MTL, so possibly we can just change the TGL MOCS 0 to be the
> same WB as on ADL, and maybe that gives some performance benefit
> in some cases.
On xe, i915 or both?
>>>> I didn't actually test all values of X there, but I did spot
>>>> check a handful of them.
>>>>
>>>> Also, ADL is affected, but TGL doesn't seem to be. Though I
>>>> still need to check the situation on TGL a bit more thoroughly.
>>>
>>> TGL actually works exactly the same as ADL. The only reason why
>>> TGL worked correctly out of the box was that we use a different
>>> MOCS table for TGL/RKL (IIRC because we started out with the
>>> wrong table and early Mesa versions depended on that), and in
>>> that table MOCS 0 is just 0x0, whereas on ADL MOCS 0 is WB.
>>
>> Kind of sounds familiar but the only commit I found was 3f027d61663f
>> ("drm/i915/gt: Add separate MOCS table for Gen12 devices other than
>> TGL/RKL") but it is about MOCS 1. What am I missing? Are the hw defaults
>> maybe different and not the code?
>
> The defaults are somehow populated differently dependign on
> unused_entries_index which is also being set in a very confusing
> way (first set it to 1(PTE) on everything and the overwritten
> with some other value for some of the platforms). The code could
> certainly use a good cleanup pass.
>
> Anyways, the default index ends up being different on TGL and ADL
> and thus MOCS 0 ends up different as well.
Yep. I missed it and forgot about cfbe5291a189 ("drm/i915/gt: Initialize
unused MOCS entries with device specific values").
> Since MOCS 0 seems to be special, we should probablya populate
> it explicitly. And I suppose we should first figure out if
> other platforms are also affected.
Yeah. If we could only get the full understanding on the details of
"specialness".
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-10-02 17:04 ` Tvrtko Ursulin
@ 2025-10-02 17:14 ` Ville Syrjälä
2025-10-02 22:02 ` Ville Syrjälä
0 siblings, 1 reply; 45+ messages in thread
From: Ville Syrjälä @ 2025-10-02 17:14 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Thu, Oct 02, 2025 at 06:04:28PM +0100, Tvrtko Ursulin wrote:
>
> On 02/10/2025 17:23, Ville Syrjälä wrote:
> > On Thu, Oct 02, 2025 at 03:01:08PM +0100, Tvrtko Ursulin wrote:
> >>
> >> Hi,
> >>
> >> On 26/09/2025 20:35, Ville Syrjälä wrote:
> >>> On Fri, Sep 26, 2025 at 10:41:56AM +0300, Ville Syrjälä wrote:
> >>>> I reverse engineered this a bit and there's definitely a
> >>>> MOCS issue at play.
> >>>>
> >>>> First I noticed that if filled the entire MOCS table with
> >>>> UC the problem went away. I then filled the entire table
> >>>> with WB and essentially bisected what I need to make UC
> >>>> to fix it. And I had to repeat that same process starting
> >>>> from the other end of table.
> >>>>
> >>>> Looks like there is some undocumented magic in the hardware.
> >>>>
> >>>> MOCS 61 really is special:
> >>>> - MOCS 61 UC, others WB, select MOCS 61 -> no corruption
> >>>>
> >>>> MOCS 0 and 63 are special in other ways:
> >>>> - MOCS X UC, others WB, select MOCS X -> corruption
> >>>> - MOCS X+0 UC, others WB, select MOCS X -> corruption
> >>>> - MOCS X+63 UC, others WB, select MOCS X -> corruption
> >>>> - MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
> >>>> where X != 61
> >>>
> >>> OK, the MOCS 63 issue was caused by me having L3=WB still in
> >>> MOCS X. If I change MOCS X to L3=UC, MOCS 63 no longer makes
> >>> a difference. I suppose that means MOCS 63 is still used for
> >>> L3 evictions, even though bspec no longer mentions that fact
> >>> explicitly.
> >>>
> >>> So MOCS 0 is the thing that really matters for CCS. And for
> >>> MOCS 0 only the LLC WB vs. UC selection matters. L3 WB vs. UC
> >>> doesn't seem to make any difference.
> >>>
> >>> It's interesting that MOCS 60 is documented as a "CCS special case",
> >>> but in reality it's MOCS 0 that matters for CCS. I wonder if some
> >>> wires got crossed in the hw design and the wrong MOCS entry ended
> >>> up being used for CCS and no one noticed...
> >>
> >> Oh wow, that is an amazing discovery!
> >>
> >> I verified it on my end too. Setting MOCS 0 to uncached and cache dirt
> >> is gone. No need to the explicit cache flush patch on first pin.
> >>
> >> Luckily ADL is unsupported so we could change it to UC. I will send a
> >> series for CI to see what it will say.
>
> So the MOCS 0 UC experiment did not seem to be 100% glitch free. It
> *looks* it helps, maybe even a lot, but not fully - three tests still
> failed due CRC mismatches.
>
> > I think the real fix is to change igt to use MOCS 61 for tgl/adl.
> > That is what Mesa uses as well.
> I somehow glossed over the fact you initially wrote 61 worked fine for
> you and focused only on your X+0+63 combinations. :(
>
> 61 works fine for me locally too. Very curious hw behaviour.
>
> It would be nice to do a CI run with IGT changed to 61 but AFAIK the xe
> patchwork/CI does not support the Test-with tag.
>
> > Looks like Mesa uses a different MOCS for DG1 and DG2. Those
> > do seem to like up with what's in bspec, so probably someone
> > needs to just copy the whole MOCS thing from Mesa into igt.
>
> I can have a look.
>
> > Looks like Mesa doesn't even use a UC MOCS for anything except
> > on MTL, so possibly we can just change the TGL MOCS 0 to be the
> > same WB as on ADL, and maybe that gives some performance benefit
> > in some cases.
>
> On xe, i915 or both?
Both.
Does xe not program the table already according to bspec? I doubt
we should really care about the "ancient Mesa + xe + TGL" case,
so the special TGL MOCS table shouldn't be needed on xe IMO.
>
> >>>> I didn't actually test all values of X there, but I did spot
> >>>> check a handful of them.
> >>>>
> >>>> Also, ADL is affected, but TGL doesn't seem to be. Though I
> >>>> still need to check the situation on TGL a bit more thoroughly.
> >>>
> >>> TGL actually works exactly the same as ADL. The only reason why
> >>> TGL worked correctly out of the box was that we use a different
> >>> MOCS table for TGL/RKL (IIRC because we started out with the
> >>> wrong table and early Mesa versions depended on that), and in
> >>> that table MOCS 0 is just 0x0, whereas on ADL MOCS 0 is WB.
> >>
> >> Kind of sounds familiar but the only commit I found was 3f027d61663f
> >> ("drm/i915/gt: Add separate MOCS table for Gen12 devices other than
> >> TGL/RKL") but it is about MOCS 1. What am I missing? Are the hw defaults
> >> maybe different and not the code?
> >
> > The defaults are somehow populated differently dependign on
> > unused_entries_index which is also being set in a very confusing
> > way (first set it to 1(PTE) on everything and the overwritten
> > with some other value for some of the platforms). The code could
> > certainly use a good cleanup pass.
> >
> > Anyways, the default index ends up being different on TGL and ADL
> > and thus MOCS 0 ends up different as well.
>
> Yep. I missed it and forgot about cfbe5291a189 ("drm/i915/gt: Initialize
> unused MOCS entries with device specific values").
>
> > Since MOCS 0 seems to be special, we should probablya populate
> > it explicitly. And I suppose we should first figure out if
> > other platforms are also affected.
>
> Yeah. If we could only get the full understanding on the details of
> "specialness".
I filed a bspec issue for it now. I guess we'll see if anyone
cares anymore...
And I do still want to reverse engineer this on other platforms
as well.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out
2025-10-02 17:14 ` Ville Syrjälä
@ 2025-10-02 22:02 ` Ville Syrjälä
0 siblings, 0 replies; 45+ messages in thread
From: Ville Syrjälä @ 2025-10-02 22:02 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev
On Thu, Oct 02, 2025 at 08:14:03PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 02, 2025 at 06:04:28PM +0100, Tvrtko Ursulin wrote:
> >
> > On 02/10/2025 17:23, Ville Syrjälä wrote:
> > > On Thu, Oct 02, 2025 at 03:01:08PM +0100, Tvrtko Ursulin wrote:
> > >>
> > >> Hi,
> > >>
> > >> On 26/09/2025 20:35, Ville Syrjälä wrote:
> > >>> On Fri, Sep 26, 2025 at 10:41:56AM +0300, Ville Syrjälä wrote:
> > >>>> I reverse engineered this a bit and there's definitely a
> > >>>> MOCS issue at play.
> > >>>>
> > >>>> First I noticed that if filled the entire MOCS table with
> > >>>> UC the problem went away. I then filled the entire table
> > >>>> with WB and essentially bisected what I need to make UC
> > >>>> to fix it. And I had to repeat that same process starting
> > >>>> from the other end of table.
> > >>>>
> > >>>> Looks like there is some undocumented magic in the hardware.
> > >>>>
> > >>>> MOCS 61 really is special:
> > >>>> - MOCS 61 UC, others WB, select MOCS 61 -> no corruption
> > >>>>
> > >>>> MOCS 0 and 63 are special in other ways:
> > >>>> - MOCS X UC, others WB, select MOCS X -> corruption
> > >>>> - MOCS X+0 UC, others WB, select MOCS X -> corruption
> > >>>> - MOCS X+63 UC, others WB, select MOCS X -> corruption
> > >>>> - MOCS X+0+63 UC, others WB, select MOCS X -> no corruption
> > >>>> where X != 61
> > >>>
> > >>> OK, the MOCS 63 issue was caused by me having L3=WB still in
> > >>> MOCS X. If I change MOCS X to L3=UC, MOCS 63 no longer makes
> > >>> a difference. I suppose that means MOCS 63 is still used for
> > >>> L3 evictions, even though bspec no longer mentions that fact
> > >>> explicitly.
> > >>>
> > >>> So MOCS 0 is the thing that really matters for CCS. And for
> > >>> MOCS 0 only the LLC WB vs. UC selection matters. L3 WB vs. UC
> > >>> doesn't seem to make any difference.
> > >>>
> > >>> It's interesting that MOCS 60 is documented as a "CCS special case",
> > >>> but in reality it's MOCS 0 that matters for CCS. I wonder if some
> > >>> wires got crossed in the hw design and the wrong MOCS entry ended
> > >>> up being used for CCS and no one noticed...
> > >>
> > >> Oh wow, that is an amazing discovery!
> > >>
> > >> I verified it on my end too. Setting MOCS 0 to uncached and cache dirt
> > >> is gone. No need to the explicit cache flush patch on first pin.
> > >>
> > >> Luckily ADL is unsupported so we could change it to UC. I will send a
> > >> series for CI to see what it will say.
> >
> > So the MOCS 0 UC experiment did not seem to be 100% glitch free. It
> > *looks* it helps, maybe even a lot, but not fully - three tests still
> > failed due CRC mismatches.
> >
> > > I think the real fix is to change igt to use MOCS 61 for tgl/adl.
> > > That is what Mesa uses as well.
> > I somehow glossed over the fact you initially wrote 61 worked fine for
> > you and focused only on your X+0+63 combinations. :(
> >
> > 61 works fine for me locally too. Very curious hw behaviour.
> >
> > It would be nice to do a CI run with IGT changed to 61 but AFAIK the xe
> > patchwork/CI does not support the Test-with tag.
> >
> > > Looks like Mesa uses a different MOCS for DG1 and DG2. Those
> > > do seem to like up with what's in bspec, so probably someone
> > > needs to just copy the whole MOCS thing from Mesa into igt.
> >
> > I can have a look.
> >
> > > Looks like Mesa doesn't even use a UC MOCS for anything except
> > > on MTL, so possibly we can just change the TGL MOCS 0 to be the
> > > same WB as on ADL, and maybe that gives some performance benefit
> > > in some cases.
> >
> > On xe, i915 or both?
>
> Both.
>
> Does xe not program the table already according to bspec? I doubt
> we should really care about the "ancient Mesa + xe + TGL" case,
> so the special TGL MOCS table shouldn't be needed on xe IMO.
>
> >
> > >>>> I didn't actually test all values of X there, but I did spot
> > >>>> check a handful of them.
> > >>>>
> > >>>> Also, ADL is affected, but TGL doesn't seem to be. Though I
> > >>>> still need to check the situation on TGL a bit more thoroughly.
> > >>>
> > >>> TGL actually works exactly the same as ADL. The only reason why
> > >>> TGL worked correctly out of the box was that we use a different
> > >>> MOCS table for TGL/RKL (IIRC because we started out with the
> > >>> wrong table and early Mesa versions depended on that), and in
> > >>> that table MOCS 0 is just 0x0, whereas on ADL MOCS 0 is WB.
> > >>
> > >> Kind of sounds familiar but the only commit I found was 3f027d61663f
> > >> ("drm/i915/gt: Add separate MOCS table for Gen12 devices other than
> > >> TGL/RKL") but it is about MOCS 1. What am I missing? Are the hw defaults
> > >> maybe different and not the code?
> > >
> > > The defaults are somehow populated differently dependign on
> > > unused_entries_index which is also being set in a very confusing
> > > way (first set it to 1(PTE) on everything and the overwritten
> > > with some other value for some of the platforms). The code could
> > > certainly use a good cleanup pass.
> > >
> > > Anyways, the default index ends up being different on TGL and ADL
> > > and thus MOCS 0 ends up different as well.
> >
> > Yep. I missed it and forgot about cfbe5291a189 ("drm/i915/gt: Initialize
> > unused MOCS entries with device specific values").
> >
> > > Since MOCS 0 seems to be special, we should probablya populate
> > > it explicitly. And I suppose we should first figure out if
> > > other platforms are also affected.
> >
> > Yeah. If we could only get the full understanding on the details of
> > "specialness".
>
> I filed a bspec issue for it now. I guess we'll see if anyone
> cares anymore...
>
> And I do still want to reverse engineer this on other platforms
> as well.
I did a quick test on ICL (not affected) and MTL (inconclusive
due to apparent lack of L4).
I still couldn't see what is supposed to be special about MOCS 60.
I've not seen any behavioral difference between it and any other
MOCS entry (apart from MOCS 61). I suspect what has happened is
that the hardware was supposed to use MOCS 60 for some non-display
(ie. not rendered with MOCS 61) CCS stuff but due to some mishap
it actually ends up using MOCS 0.
Apparently MTL still has those special MOCS entries. Though they
might be borked due the number of MOCS entries being reduced to
16 (4 bits) while the hw might still be internally looking for
the full 6 bit special values (60 and 61). But since MTL
apparently has no L4 it supposedly doesn't matter.
On ARL they added a way to configure those special MOCS indices
via SARB_CHICKEN1. Default for what was MOCS 61 seems to be 13
(just the same value truncated to 4 bits), but the default for
the old MOCS 60 seems to be 0 on ARL. We don't appear to change
those defaults anywhere. So I guess if someone has an ARL with
L4 (dunno if it actually exists) they might see the same
behaviour even if the hardware actually tries to use the
configured MOCS index correctly for the non-display CCS use
case.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 45+ messages in thread
end of thread, other threads:[~2025-10-02 22:02 UTC | newest]
Thread overview: 45+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-23 10:07 [PATCH v12 00/13] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 01/13] drm/xe/xelpg: Flush CCS when flushing caches Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 02/13] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
2025-10-01 15:47 ` Rodrigo Vivi
2025-09-23 10:07 ` [PATCH v12 03/13] drm/xe/xelp: Support auxccs invalidation on blitter Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 04/13] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 05/13] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
2025-09-23 10:07 ` [PATCH v12 06/13] drm/xe: Export xe_emit_aux_table_inv Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 07/13] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 08/13] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 09/13] drm/xe: Handle DPT in system memory Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 10/13] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 11/13] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-09-23 10:19 ` Ville Syrjälä
2025-09-23 10:48 ` Tvrtko Ursulin
2025-09-23 12:01 ` Ville Syrjälä
2025-09-23 12:25 ` Tvrtko Ursulin
2025-09-23 13:20 ` Ville Syrjälä
2025-09-23 14:40 ` Tvrtko Ursulin
2025-09-23 14:52 ` Ville Syrjälä
2025-09-24 13:09 ` Tvrtko Ursulin
2025-09-24 22:35 ` Ville Syrjälä
2025-09-25 7:24 ` Tvrtko Ursulin
2025-09-25 10:08 ` Tvrtko Ursulin
2025-09-26 7:41 ` Ville Syrjälä
2025-09-26 19:35 ` Ville Syrjälä
2025-10-02 14:01 ` Tvrtko Ursulin
2025-10-02 14:36 ` Tvrtko Ursulin
2025-10-02 16:23 ` Ville Syrjälä
2025-10-02 17:04 ` Tvrtko Ursulin
2025-10-02 17:14 ` Ville Syrjälä
2025-10-02 22:02 ` Ville Syrjälä
2025-09-23 10:44 ` [PATCH v13 " Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 12/13] drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS Tvrtko Ursulin
2025-09-23 10:08 ` [PATCH v12 13/13] drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe Tvrtko Ursulin
2025-09-23 10:15 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev15) Patchwork
2025-09-23 10:16 ` ✓ CI.KUnit: success " Patchwork
2025-09-23 11:15 ` ✓ Xe.CI.BAT: " Patchwork
2025-09-23 11:21 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev16) Patchwork
2025-09-23 11:22 ` ✓ CI.KUnit: success " Patchwork
2025-09-23 12:03 ` ✓ Xe.CI.BAT: " Patchwork
2025-09-23 13:26 ` ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev15) Patchwork
2025-09-23 14:12 ` ✗ Xe.CI.Full: failure for AuxCCS handling and render compression modifiers (rev16) Patchwork
2025-09-23 20:12 ` [PATCH v12 00/13] AuxCCS handling and render compression modifiers Ville Syrjälä
2025-09-24 7:59 ` Tvrtko Ursulin
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox