* RE: [EXT] Re: [PATCH v8 1/2] media: dt-bindings: Add CSI Pixel Formatter DT bindings
From: G.N. Zhou @ 2026-05-26 9:33 UTC (permalink / raw)
To: Krzysztof Kozlowski, G.N. Zhou (OSS)
Cc: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Frank Li, imx@lists.linux.dev,
linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Krzysztof Kozlowski
In-Reply-To: <20260526-towering-essential-civet-19a5ad@quoll>
Hi Krzysztof,
Thanks for your review.
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Tuesday, May 26, 2026 5:14 PM
> To: G.N. Zhou (OSS) <guoniu.zhou@oss.nxp.com>
> Cc: Mauro Carvalho Chehab <mchehab@kernel.org>; Rob Herring
> <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha Hauer
> <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Laurent
> Pinchart <laurent.pinchart@ideasonboard.com>; Frank Li <frank.li@nxp.com>;
> imx@lists.linux.dev; linux-media@vger.kernel.org; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; G.N. Zhou
> <guoniu.zhou@nxp.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski@oss.qualcomm.com>
> Subject: [EXT] Re: [PATCH v8 1/2] media: dt-bindings: Add CSI Pixel Formatter
> DT bindings
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report this
> email' button
>
>
> On Mon, May 25, 2026 at 04:12:22PM +0800, Guoniu Zhou wrote:
> > From: Guoniu Zhou <guoniu.zhou@nxp.com>
> >
> > The i.MX95 CSI pixel formatting module uses packet info, pixel and
> > non-pixel data from the CSI-2 host controller and reformat them to
> > match Pixel Link(PL) definition.
> >
> > Reviewed-by: Frank Li <Frank.Li@nxp.com>
> > Reviewed-by: Krzysztof Kozlowski
> > <krzysztof.kozlowski@oss.qualcomm.com>
>
> Drop both review tags and request re-review since you made significant
> changes.
>
> > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> > ---
> > Changes in v8:
> > - Use standard port reference instead of video-interfaces.yaml
>
> Why? Properties are not applicable?
Yes, the properties defined in video-interfaces.yaml (such as hsync-active,
vsync-active, pclk-sample, data-lanes, etc.) are not applicable to this
device. The device only requires the basic port/endpoint structure to
describe the connection topology, so the standard port reference is
sufficient.
>
> > - Add parent syscon node in example to show device integration
> > - Add required constraints for port@0 and port@1 in ports node
> >
> > Changes in v7:
> > - Change compatible to imx95-csi-formatter as IP is i.MX95 specific per
> Marco's suggestion
> > Link:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore
> > .kernel.org%2Flinux-media%2F20260511-csi_formatter-v6-0-
> 01028e312e2b%4
> >
> 0oss.nxp.com%2FT%2F%23mcd135b3de179b3cb69daa1fd6e0e8e27c85b3332
> &data=0
> >
> 5%7C02%7Cguoniu.zhou%40nxp.com%7C3fc5c66c19574e666c7c08debb0713
> 3d%7C68
> >
> 6ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C639153836249231043%7
> CUnknown%
> >
> 7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJ
> XaW4z
> >
> MiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=ZNSc0TBvF
> V61YL
> > q4u49sEUs7zo5aPODxSKK36y9azAQ%3D&reserved=0
> > ---
> > .../bindings/media/fsl,imx95-csi-formatter.yaml | 92
> ++++++++++++++++++++++
> > 1 file changed, 92 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
> > b/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
> > new file mode 100644
> > index 000000000000..bc2f5d448fe5
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.
> > +++ yaml
> > @@ -0,0 +1,92 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fschemas%2Fmedia%2Ffsl%2Cimx95-csi-
> formatter.yaml%23&data
> >
> +=05%7C02%7Cguoniu.zhou%40nxp.com%7C3fc5c66c19574e666c7c08debb0
> 7133d%7
> >
> +C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63915383624927629
> 7%7CUnkn
> >
> +own%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCI
> sIlAiOiJ
> >
> +XaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=4y
> rIJ8Bn
> > +KlbEdq4%2BbZWNeoSWB4g8N1sChHSQ9z3VRZ0%3D&reserved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-
> schemas%2Fcore.yaml%23&data=05%7C02%7Cguoniu.zhou%4
> >
> +0nxp.com%7C3fc5c66c19574e666c7c08debb07133d%7C686ea1d3bc2b4c6fa
> 92cd99
> >
> +c5c301635%7C0%7C0%7C639153836249307152%7CUnknown%7CTWFpbGZ
> sb3d8eyJFbX
> >
> +B0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWF
> pbCI
> >
> +sIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=MEUhKnYWZqo0gMxynCFUEB
> X8TLGC9aK6
> > +lNgrHXdqpx0%3D&reserved=0
> > +
> > +title: i.MX95 CSI Pixel Formatter
> > +
> > +maintainers:
> > + - Guoniu Zhou <guoniu.zhou@nxp.com>
> > +
> > +description:
> > + The CSI pixel formatting module found on i.MX95 uses packet info,
> > +pixel
> > + and non-pixel data from the CSI-2 host controller and reformat them
> > +to
> > + match Pixel Link(PL) definition.
> > +
> > +properties:
> > + compatible:
> > + const: fsl,imx95-csi-formatter
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: MIPI CSI-2 RX IDI interface
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: Pixel Link Interface
> > +
> > + required:
> > + - port@0
> > + - port@1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - power-domains
> > + - ports
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/nxp,imx95-clock.h>
> > +
> > + syscon@4ac10000 {
> > + compatible = "nxp,imx95-camera-csr", "syscon";
>
> Drop entire node, not relevant. Or actually this example could be in the parent
> binding example.
Okay.
>
>
> > + reg = <0x0 0x4ac10000 0x0 0x10000>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + formatter@20 {
> > + compatible = "fsl,imx95-csi-formatter";
> > + reg = <0x20 0x100>;
> > + clocks = <&cameramix_csr IMX95_CLK_CAMBLK_CSI2_FOR0>;
> > + power-domains = <&scmi_devpd 3>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > +
> > + endpoint {
> > + remote-endpoint = <&mipi_csi_0_out>;
> > + };
> > + };
> > +
> > + port@1 {
>
> Messed indentation.
>
> Best regards,
> Krzysztof
^ permalink raw reply
* Re: [PATCH v5 15/19] drm/connector: Add new atomic_create_state callback
From: Thomas Zimmermann @ 2026-05-26 9:28 UTC (permalink / raw)
To: Maxime Ripard, Maarten Lankhorst, David Airlie, Simona Vetter,
Jonathan Corbet, Shuah Khan, Dmitry Baryshkov, Jyri Sarha,
Tomi Valkeinen, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Simon Ser,
Harry Wentland, Melissa Wen, Sebastian Wick, Alex Hung,
Jani Nikula, Rodrigo Vivi, Joonas Lahtinen, Tvrtko Ursulin,
Chen-Yu Tsai, Samuel Holland, Dave Stevenson, Maíra Canal,
Raspberry Pi Kernel Maintenance
Cc: dri-devel, linux-doc, linux-kernel, Daniel Stone, intel-gfx,
intel-xe, linux-arm-kernel, linux-sunxi, Laurent Pinchart
In-Reply-To: <20260519-drm-mode-config-init-v5-15-388b03321e38@kernel.org>
Am 19.05.26 um 11:01 schrieb Maxime Ripard:
> Commit 47b5ac7daa46 ("drm/atomic: Add new atomic_create_state callback
> to drm_private_obj") introduced a new pattern for allocating drm object
> states.
>
> Instead of relying on the reset() callback, it created a new
> atomic_create_state hook. This is helpful because reset is a bit
> overloaded: it's used to create the initial software state, reset it,
> but also reset the hardware.
>
> It can also be used either at probe time, to create the initial state
> and possibly reset the hardware to an expected default, but also during
> suspend/resume.
>
> Both these cases come with different expectations too: during the
> initialization, we want to initialize all states, but during
> suspend/resume, drm_private_states for example are expected to be kept
> around.
>
> reset() also isn't fallible, which makes it harder to handle
> initialization errors properly. This is only really relevant for some
> drivers though, since all the helpers for reset only create a new
> state, and don't touch the hardware at all.
>
> It was thus decided to create a new hook that would allocate and
> initialize a pristine state without any side effect:
> atomic_create_state to untangle a bit some of it, and to separate the
> initialization with the actual reset one might need during a
> suspend/resume.
>
> Continue the transition to the new pattern with connectors.
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
> drivers/gpu/drm/drm_atomic_state_helper.c | 26 ++++++++++++++++++++++++++
> drivers/gpu/drm/drm_connector.c | 10 +++++++++-
> drivers/gpu/drm/drm_mode_config.c | 31 ++++++++++++++++++++++++++++++-
> include/drm/drm_atomic_state_helper.h | 2 ++
> include/drm/drm_connector.h | 16 ++++++++++++++++
> 5 files changed, 83 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c
> index e2e5a1b8a820..07686e94aae0 100644
> --- a/drivers/gpu/drm/drm_atomic_state_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_state_helper.c
> @@ -532,10 +532,36 @@ void drm_atomic_helper_connector_reset(struct drm_connector *connector)
> kfree(connector->state);
> __drm_atomic_helper_connector_reset(connector, conn_state);
> }
> EXPORT_SYMBOL(drm_atomic_helper_connector_reset);
>
> +/**
> + * drm_atomic_helper_connector_create_state - default &drm_connector_funcs.atomic_create_state hook for connectors
> + * @connector: connector object
> + *
> + * Allocates and initializes pristine @drm_connector_state.
> + *
> + * This is useful for drivers that don't subclass @drm_connector_state.
> + *
> + * RETURNS:
> + * Pointer to new connector state, or ERR_PTR on failure.
> + */
> +struct drm_connector_state *
> +drm_atomic_helper_connector_create_state(struct drm_connector *connector)
> +{
> + struct drm_connector_state *state;
> +
> + state = kzalloc_obj(*state);
> + if (!state)
> + return ERR_PTR(-ENOMEM);
> +
> + __drm_atomic_helper_connector_state_init(state, connector);
> +
> + return state;
> +}
> +EXPORT_SYMBOL(drm_atomic_helper_connector_create_state);
> +
> /**
> * drm_atomic_helper_connector_tv_margins_reset - Resets TV connector properties
> * @connector: DRM connector
> *
> * Resets the TV-related properties attached to a connector.
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index 3fa4d2082cd7..a0b132c658a1 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -616,11 +616,19 @@ int drmm_connector_hdmi_init(struct drm_device *dev,
>
> /*
> * drm_connector_attach_max_bpc_property() requires the
> * connector to have a state.
> */
> - if (connector->funcs->reset)
> + if (connector->funcs->atomic_create_state) {
> + struct drm_connector_state *state;
> +
> + state = connector->funcs->atomic_create_state(connector);
> + if (IS_ERR(state))
> + return PTR_ERR(state);
> +
> + connector->state = state;
> + } else if (connector->funcs->reset)
> connector->funcs->reset(connector);
>
> drm_connector_attach_max_bpc_property(connector, 8, max_bpc);
> connector->max_bpc = max_bpc;
>
> diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
> index 2e2cd18a14b4..9d240817f8b6 100644
> --- a/drivers/gpu/drm/drm_mode_config.c
> +++ b/drivers/gpu/drm/drm_mode_config.c
> @@ -235,10 +235,36 @@ static int drm_mode_config_crtc_reset_with_create_state(struct drm_crtc *crtc)
> }
>
> return drm_mode_config_crtc_create_state(crtc);
> }
>
> +static int drm_mode_config_connector_create_state(struct drm_connector *connector)
> +{
> + struct drm_connector_state *conn_state;
> +
> + if (!connector->funcs->atomic_create_state)
> + return 0;
> +
> + conn_state = connector->funcs->atomic_create_state(connector);
> + if (IS_ERR(conn_state))
> + return PTR_ERR(conn_state);
> +
> + connector->state = conn_state;
> +
> + return 0;
> +}
> +
> +static int drm_mode_config_connector_reset_with_create_state(struct drm_connector *connector)
> +{
> + if (connector->state) {
> + connector->funcs->atomic_destroy_state(connector, connector->state);
> + connector->state = NULL;
> + }
> +
> + return drm_mode_config_connector_create_state(connector);
> +}
> +
> /**
> * drm_mode_config_reset - call ->reset callbacks
> * @dev: drm device
> *
> * This functions calls all the crtc's, encoder's and connector's ->reset
> @@ -278,13 +304,16 @@ void drm_mode_config_reset(struct drm_device *dev)
> drm_for_each_encoder(encoder, dev)
> if (encoder->funcs && encoder->funcs->reset)
> encoder->funcs->reset(encoder);
>
> drm_connector_list_iter_begin(dev, &conn_iter);
> - drm_for_each_connector_iter(connector, &conn_iter)
> + drm_for_each_connector_iter(connector, &conn_iter) {
> if (connector->funcs->reset)
> connector->funcs->reset(connector);
> + else if (connector->funcs->atomic_create_state)
> + drm_mode_config_connector_reset_with_create_state(connector);
> + }
> drm_connector_list_iter_end(&conn_iter);
> }
> EXPORT_SYMBOL(drm_mode_config_reset);
>
> /*
> diff --git a/include/drm/drm_atomic_state_helper.h b/include/drm/drm_atomic_state_helper.h
> index 9634a70e0401..f4b6d8833bc2 100644
> --- a/include/drm/drm_atomic_state_helper.h
> +++ b/include/drm/drm_atomic_state_helper.h
> @@ -73,10 +73,12 @@ void drm_atomic_helper_plane_destroy_state(struct drm_plane *plane,
> void __drm_atomic_helper_connector_state_init(struct drm_connector_state *conn_state,
> struct drm_connector *connector);
> void __drm_atomic_helper_connector_reset(struct drm_connector *connector,
> struct drm_connector_state *conn_state);
> void drm_atomic_helper_connector_reset(struct drm_connector *connector);
> +struct drm_connector_state *
> +drm_atomic_helper_connector_create_state(struct drm_connector *connector);
> void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector);
> int drm_atomic_helper_connector_tv_check(struct drm_connector *connector,
> struct drm_atomic_commit *state);
> void drm_atomic_helper_connector_tv_margins_reset(struct drm_connector *connector);
> void
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 5ad62c207d00..529755c2e862 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -1569,10 +1569,26 @@ struct drm_connector_funcs {
> * when a connector is being hot-unplugged for drivers that support
> * connector hotplugging (e.g. DisplayPort MST).
> */
> void (*destroy)(struct drm_connector *connector);
>
> + /**
> + * @atomic_create_state:
> + *
> + * Allocate a pristine, initialized, state for the connector
> + * object and return it. This callback must have no side
> + * effects: in particular, the returned state must not be
> + * assigned to the object's state pointer and it must not affect
> + * the hardware state.
> + *
> + * RETURNS:
> + *
> + * A new, pristine, connector state instance or an error pointer
> + * on failure.
> + */
> + struct drm_connector_state *(*atomic_create_state)(struct drm_connector *connector);
> +
> /**
> * @atomic_duplicate_state:
> *
> * Duplicate the current atomic state for this connector and return it.
> * The core and helpers guarantee that any atomic state duplicated with
>
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
^ permalink raw reply
* [PATCH v7 7/7] arm64: dts: st: Add boot phase tags for STMicroelectronics mp2 boards
From: Patrice Chotard @ 2026-05-26 9:26 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Patrick Delaunay, Christoph Niedermaier,
Marek Vasut
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel, kernel,
Patrice Chotard
In-Reply-To: <20260526-upstream_uboot_properties-v7-0-e17cd424d5db@foss.st.com>
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
arch/arm64/boot/dts/st/stm32mp211.dtsi | 4 +-
arch/arm64/boot/dts/st/stm32mp215f-dk.dts | 29 ++++++++
arch/arm64/boot/dts/st/stm32mp231.dtsi | 4 +-
arch/arm64/boot/dts/st/stm32mp235f-dk.dts | 95 ++++++++++++++++++++++++++
arch/arm64/boot/dts/st/stm32mp251.dtsi | 4 +-
arch/arm64/boot/dts/st/stm32mp255.dtsi | 2 +-
arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 103 ++++++++++++++++++++++++++++
arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 105 +++++++++++++++++++++++++++++
8 files changed, 339 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/st/stm32mp211.dtsi
index 4bfd58b26b51..a79c056fdfb1 100644
--- a/arch/arm64/boot/dts/st/stm32mp211.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp211.dtsi
@@ -47,7 +47,7 @@ ck_flexgen_51: clock-200000000 {
};
firmware {
- optee {
+ optee: optee {
compatible = "linaro,optee-tz";
method = "smc";
};
@@ -70,7 +70,7 @@ scmi_reset: protocol@16 {
};
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
};
diff --git a/arch/arm64/boot/dts/st/stm32mp215f-dk.dts b/arch/arm64/boot/dts/st/stm32mp215f-dk.dts
index a1285abc80ca..100f787168d6 100644
--- a/arch/arm64/boot/dts/st/stm32mp215f-dk.dts
+++ b/arch/arm64/boot/dts/st/stm32mp215f-dk.dts
@@ -48,6 +48,35 @@ &bsec {
bootph-all;
};
+&optee {
+ bootph-all;
+};
+
+&psci {
+ bootph-all;
+};
+
+&rifsc {
+ bootph-all;
+};
+
+&scmi {
+ bootph-all;
+};
+
+&scmi_clk {
+ bootph-all;
+};
+
+&scmi_reset {
+ bootph-all;
+};
+
+&syscfg {
+ bootph-all;
+};
+
&usart2 {
+ bootph-all;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/st/stm32mp231.dtsi
index 9e1d240888ff..8942a5a29a1c 100644
--- a/arch/arm64/boot/dts/st/stm32mp231.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi
@@ -65,7 +65,7 @@ optee: optee {
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
- scmi {
+ scmi: scmi {
compatible = "linaro,scmi-optee";
#address-cells = <1>;
#size-cells = <0>;
@@ -117,7 +117,7 @@ scmi_vdda18adc: regulator@7 {
};
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
diff --git a/arch/arm64/boot/dts/st/stm32mp235f-dk.dts b/arch/arm64/boot/dts/st/stm32mp235f-dk.dts
index dd4efbe5a46e..0608b978cbe5 100644
--- a/arch/arm64/boot/dts/st/stm32mp235f-dk.dts
+++ b/arch/arm64/boot/dts/st/stm32mp235f-dk.dts
@@ -131,6 +131,10 @@ &arm_wdt {
status = "okay";
};
+&bsec {
+ bootph-all;
+};
+
ðernet1 {
pinctrl-0 = <ð1_rgmii_pins_b>;
pinctrl-1 = <ð1_rgmii_sleep_pins_b>;
@@ -153,6 +157,46 @@ phy1_eth1: ethernet-phy@1 {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&i2c2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_b>;
@@ -219,6 +263,38 @@ lvds_out0: endpoint {
};
};
+&optee {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
+&rifsc {
+ bootph-all;
+};
+
+&scmi {
+ bootph-all;
+};
+
+&scmi_clk {
+ bootph-all;
+};
+
&scmi_regu {
scmi_vddio1: regulator@0 {
regulator-min-microvolt = <1800000>;
@@ -258,6 +334,10 @@ scmi_vdd_sdcard: regulator@23 {
};
};
+&scmi_reset {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
@@ -272,12 +352,27 @@ &sdmmc1 {
status = "okay";
};
+&syscfg {
+ bootph-all;
+};
+
&usart2 {
pinctrl-names = "default", "idle", "sleep";
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_idle_pins_a>;
pinctrl-2 = <&usart2_sleep_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+
+&usart2_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 673fbc5632e6..190877cec012 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -68,7 +68,7 @@ optee: optee {
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
- scmi {
+ scmi: scmi {
compatible = "linaro,scmi-optee";
#address-cells = <1>;
#size-cells = <0>;
@@ -139,7 +139,7 @@ v2m0: v2m@48090000 {
};
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi
index 7a598f53a2a0..3ba4e6166586 100644
--- a/arch/arm64/boot/dts/st/stm32mp255.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi
@@ -40,4 +40,4 @@ venc: venc@480e0000 {
clocks = <&rcc CK_BUS_VENC>;
access-controllers = <&rifsc 90>;
};
-};
\ No newline at end of file
+};
diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
index 8daf3dfd5133..7e0b6502467e 100644
--- a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
+++ b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
@@ -138,6 +138,10 @@ &arm_wdt {
status = "okay";
};
+&bsec {
+ bootph-all;
+};
+
ðernet1 {
pinctrl-0 = <ð1_rgmii_pins_b>;
pinctrl-1 = <ð1_rgmii_sleep_pins_b>;
@@ -160,6 +164,54 @@ phy1_eth1: ethernet-phy@1 {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&i2c2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_b>;
@@ -226,6 +278,38 @@ lvds_out0: endpoint {
};
};
+&optee {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
+&rifsc {
+ bootph-all;
+};
+
+&scmi {
+ bootph-all;
+};
+
+&scmi_clk {
+ bootph-all;
+};
+
&scmi_regu {
scmi_vddio1: regulator@0 {
regulator-min-microvolt = <1800000>;
@@ -265,6 +349,10 @@ scmi_vdd_sdcard: regulator@23 {
};
};
+&scmi_reset {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
@@ -279,12 +367,27 @@ &sdmmc1 {
status = "okay";
};
+&syscfg {
+ bootph-all;
+};
+
&usart2 {
pinctrl-names = "default", "idle", "sleep";
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_idle_pins_a>;
pinctrl-2 = <&usart2_sleep_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+
+&usart2_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
index 14e033f365e3..dab54742e01c 100644
--- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
+++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
@@ -167,6 +167,10 @@ &arm_wdt {
status = "okay";
};
+&bsec {
+ bootph-all;
+};
+
&combophy {
clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>;
clock-names = "apb", "ker", "pad";
@@ -253,6 +257,54 @@ phy0_eth2: ethernet-phy@1 {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&i2c2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_a>;
@@ -344,6 +396,7 @@ timer {
};
<dc {
+ bootph-all;
status = "okay";
port {
ltdc_ep0_out: endpoint {
@@ -353,6 +406,7 @@ ltdc_ep0_out: endpoint {
};
&lvds {
+ bootph-all;
status = "okay";
ports {
#address-cells = <1>;
@@ -374,6 +428,10 @@ lvds_out0: endpoint {
};
};
+&optee {
+ bootph-all;
+};
+
&pcie_ep {
pinctrl-names = "default", "init";
pinctrl-0 = <&pcie_pins_a>;
@@ -395,10 +453,38 @@ pcie@0,0 {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rtc {
status = "okay";
};
+&rifsc {
+ bootph-all;
+};
+
+&scmi {
+ bootph-all;
+};
+
+&scmi_clk {
+ bootph-all;
+};
+
&scmi_regu {
scmi_vddio1: regulator@0 {
regulator-min-microvolt = <1800000>;
@@ -430,6 +516,10 @@ scmi_vdd_sdcard: regulator@23 {
};
};
+&scmi_reset {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
@@ -444,6 +534,10 @@ &sdmmc1 {
status = "okay";
};
+&syscfg {
+ bootph-all;
+};
+
&spi3 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi3_pins_a>;
@@ -521,11 +615,22 @@ &usart2 {
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_idle_pins_a>;
pinctrl-2 = <&usart2_sleep_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&usart2_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usart6 {
pinctrl-names = "default", "idle", "sleep";
pinctrl-0 = <&usart6_pins_a>;
--
2.43.0
^ permalink raw reply related
* [PATCH v7 3/7] ARM: dts: stm32: Add boot phase tags for STMicroelectronics h7 boards
From: Patrice Chotard @ 2026-05-26 9:26 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Patrick Delaunay, Christoph Niedermaier,
Marek Vasut
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel, kernel,
Patrice Chotard
In-Reply-To: <20260526-upstream_uboot_properties-v7-0-e17cd424d5db@foss.st.com>
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
arch/arm/boot/dts/st/stm32h743i-disco.dts | 69 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32h743i-eval.dts | 69 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32h747i-disco.dts | 69 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32h750i-art-pi.dts | 69 ++++++++++++++++++++++++++++++
4 files changed, 276 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32h743i-disco.dts b/arch/arm/boot/dts/st/stm32h743i-disco.dts
index 78d55b77db7c..1b4b9bc5c72d 100644
--- a/arch/arm/boot/dts/st/stm32h743i-disco.dts
+++ b/arch/arm/boot/dts/st/stm32h743i-disco.dts
@@ -107,6 +107,59 @@ u-boot {
&clk_hse {
clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_i2s {
+ bootph-all;
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
};
&mac {
@@ -126,6 +179,18 @@ phy0: ethernet-phy@0 {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
@@ -138,6 +203,10 @@ &sdmmc1 {
status = "okay";
};
+&timer5 {
+ bootph-all;
+};
+
&usart2 {
pinctrl-0 = <&usart2_pins_a>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/st/stm32h743i-eval.dts b/arch/arm/boot/dts/st/stm32h743i-eval.dts
index e5e10b0758ee..55674fe05431 100644
--- a/arch/arm/boot/dts/st/stm32h743i-eval.dts
+++ b/arch/arm/boot/dts/st/stm32h743i-eval.dts
@@ -124,6 +124,59 @@ adc1: adc@0 {
&clk_hse {
clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_i2s {
+ bootph-all;
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
};
&i2c1 {
@@ -155,6 +208,18 @@ phy0: ethernet-phy@0 {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
@@ -169,6 +234,10 @@ &sdmmc1 {
status = "okay";
};
+&timer5 {
+ bootph-all;
+};
+
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/st/stm32h747i-disco.dts b/arch/arm/boot/dts/st/stm32h747i-disco.dts
index c9dcc680e26d..ef36454808d5 100644
--- a/arch/arm/boot/dts/st/stm32h747i-disco.dts
+++ b/arch/arm/boot/dts/st/stm32h747i-disco.dts
@@ -104,6 +104,59 @@ u-boot {
&clk_hse {
clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_i2s {
+ bootph-all;
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
};
&mac {
@@ -123,6 +176,18 @@ phy0: ethernet-phy@0 {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
@@ -136,6 +201,10 @@ &sdmmc1 {
status = "okay";
};
+&timer5 {
+ bootph-all;
+};
+
&usart1 {
pinctrl-0 = <&usart1_pins_b>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/st/stm32h750i-art-pi.dts b/arch/arm/boot/dts/st/stm32h750i-art-pi.dts
index 56c53e262da7..8dddc70c37a1 100644
--- a/arch/arm/boot/dts/st/stm32h750i-art-pi.dts
+++ b/arch/arm/boot/dts/st/stm32h750i-art-pi.dts
@@ -114,6 +114,15 @@ wlan_pwr: regulator-wlan {
&clk_hse {
clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_i2s {
+ bootph-all;
};
&dma1 {
@@ -124,6 +133,50 @@ &dma2 {
status = "okay";
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
&mac {
status = "disabled";
pinctrl-0 = <ðernet_rmii>;
@@ -141,6 +194,18 @@ phy0: ethernet-phy@0 {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
@@ -196,6 +261,10 @@ partition@0 {
};
};
+&timer5 {
+ bootph-all;
+};
+
&usart2 {
pinctrl-0 = <&usart2_pins_a>;
pinctrl-names = "default";
--
2.43.0
^ permalink raw reply related
* [PATCH v7 6/7] ARM: dts: stm32: Add boot phase tags for STMicroelectronics mp15 boards
From: Patrice Chotard @ 2026-05-26 9:26 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Patrick Delaunay, Christoph Niedermaier,
Marek Vasut
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel, kernel,
Patrice Chotard
In-Reply-To: <20260526-upstream_uboot_properties-v7-0-e17cd424d5db@foss.st.com>
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp151.dtsi | 2 +-
arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts | 19 +++
.../st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 1 +
.../dts/st/stm32mp157a-icore-stm32mp1-ctouch2.dts | 25 +++
.../dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts | 26 +++
.../boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi | 100 ++++++++++++
...m32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 27 ++++
.../stm32mp157a-microgea-stm32mp1-microdev2.0.dts | 27 ++++
.../boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi | 97 ++++++++++++
arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts | 5 +
arch/arm/boot/dts/st/stm32mp157c-dk2.dts | 1 +
arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | 19 +++
arch/arm/boot/dts/st/stm32mp157c-ed1.dts | 151 ++++++++++++++++++
arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts | 5 +
arch/arm/boot/dts/st/stm32mp157c-ev1.dts | 38 +++++
arch/arm/boot/dts/st/stm32mp157c-lxa-mc1.dts | 1 +
arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi | 119 ++++++++++++++
arch/arm/boot/dts/st/stm32mp157c-odyssey.dts | 21 +++
arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts | 1 +
arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi | 5 +
arch/arm/boot/dts/st/stm32mp157f-dk2.dts | 1 +
arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi | 2 +-
arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi | 175 +++++++++++++++++++++
.../boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi | 55 +++++++
.../boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi | 50 ++++++
arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi | 157 ++++++++++++++++++
.../boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi | 50 ++++++
arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi | 122 ++++++++++++++
28 files changed, 1300 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi
index 84f68e8563d8..57443697e6e0 100644
--- a/arch/arm/boot/dts/st/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp151.dtsi
@@ -31,7 +31,7 @@ arm-pmu {
interrupt-parent = <&intc>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
index 847b360f02fc..b81b6e168b67 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
@@ -65,6 +65,7 @@ &m4_rproc {
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ bootph-some-ram;
};
&rcc {
@@ -85,3 +86,21 @@ &rng1 {
&rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
};
+
+&scmi {
+ bootph-some-ram;
+};
+
+&uart4 {
+ bootph-all;
+};
+
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts
index df97e03d2a5a..4ad1313efca9 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts
@@ -92,6 +92,7 @@ bridge_out: endpoint {
};
<dc {
+ bootph-some-ram;
status = "okay";
port {
diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2.dts
index 60ce4425a7fd..ac4e313ca371 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2.dts
@@ -35,15 +35,40 @@ &sdmmc1 {
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&v3v3>;
+ bootph-all;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ bias-pull-up;
+ };
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts
index f8e404346396..cc24a29fba15 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts
@@ -92,6 +92,7 @@ bridge_out_panel: endpoint {
};
<dc {
+ bootph-some-ram;
status = "okay";
port {
@@ -110,15 +111,40 @@ &sdmmc1 {
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&v3v3>;
+ bootph-all;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ bias-pull-up;
+ };
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi
index 569a7e940ecc..db93934019d1 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi
@@ -61,6 +61,7 @@ vddcore: regulator-vddcore {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
+ bootph-all;
};
vdd: regulator-vdd {
@@ -69,6 +70,7 @@ vdd: regulator-vdd {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
+ bootph-all;
};
vdd_usb: regulator-vdd-usb {
@@ -77,6 +79,7 @@ vdd_usb: regulator-vdd-usb {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
+ bootph-all;
};
vdda: regulator-vdda {
@@ -85,6 +88,7 @@ vdda: regulator-vdda {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
+ bootph-all;
};
vdd_ddr: regulator-vdd-ddr {
@@ -93,6 +97,7 @@ vdd_ddr: regulator-vdd-ddr {
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
+ bootph-all;
};
vtt_ddr: regulator-vtt-ddr {
@@ -102,6 +107,7 @@ vtt_ddr: regulator-vtt-ddr {
regulator-max-microvolt = <675000>;
regulator-always-on;
vin-supply = <&vdd>;
+ bootph-all;
};
vref_ddr: regulator-vref-ddr {
@@ -111,6 +117,7 @@ vref_ddr: regulator-vref-ddr {
regulator-max-microvolt = <675000>;
regulator-always-on;
vin-supply = <&vdd>;
+ bootph-all;
};
vdd_sd: regulator-vdd-sd {
@@ -119,6 +126,7 @@ vdd_sd: regulator-vdd-sd {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
+ bootph-all;
};
v3v3: regulator-v3v3 {
@@ -127,6 +135,7 @@ v3v3: regulator-v3v3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
+ bootph-all;
};
v2v8: regulator-v2v8 {
@@ -136,6 +145,7 @@ v2v8: regulator-v2v8 {
regulator-max-microvolt = <2800000>;
regulator-always-on;
vin-supply = <&v3v3>;
+ bootph-all;
};
v1v8: regulator-v1v8 {
@@ -145,13 +155,86 @@ v1v8: regulator-v1v8 {
regulator-max-microvolt = <1800000>;
regulator-always-on;
vin-supply = <&v3v3>;
+ bootph-all;
};
};
+&bsec {
+ bootph-all;
+};
+
+&clk_hse {
+ bootph-all;
+};
+
+&clk_hsi {
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_lsi {
+ bootph-all;
+};
+
+&clk_csi {
+ bootph-all;
+};
+
&dts {
status = "okay";
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&i2c2 {
i2c-scl-falling-time-ns = <20>;
i2c-scl-rising-time-ns = <185>;
@@ -167,6 +250,7 @@ &ipcc {
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -180,6 +264,22 @@ &m4_rproc {
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rng1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts
index 5116a7785201..7bfd7da4a8db 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts
@@ -78,6 +78,7 @@ &i2c2 {
<dc {
pinctrl-names = "default";
pinctrl-0 = <<dc_pins>;
+ bootph-some-ram;
status = "okay";
port {
@@ -134,19 +135,45 @@ &sdmmc1 {
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&vdd>;
+ bootph-all;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-all;
+
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_a {
+ bootph-all;
+
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ };
+};
+
/* J31: RS323 */
&uart8 {
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0.dts b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
index d949559be020..a1f79659d7c5 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
@@ -36,19 +36,46 @@ &sdmmc1 {
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&vdd>;
+ bootph-all;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-all;
+
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_a {
+ bootph-all;
+
+ pins1 {
+ bootph-all;
+ };
+
+ pins2 {
+ bootph-all;
+ bias-pull-up;
+ };
+};
+
/* J31: RS323 */
&uart8 {
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi
index a75f50cf7123..4f6f4712d634 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi
@@ -61,6 +61,7 @@ vin: regulator-vin {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
+ bootph-all;
};
vddcore: regulator-vddcore {
@@ -70,6 +71,7 @@ vddcore: regulator-vddcore {
regulator-max-microvolt = <1200000>;
regulator-always-on;
vin-supply = <&vin>;
+ bootph-all;
};
vdd: regulator-vdd {
@@ -79,6 +81,7 @@ vdd: regulator-vdd {
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&vin>;
+ bootph-all;
};
vddq_ddr: regulator-vddq-ddr {
@@ -88,9 +91,34 @@ vddq_ddr: regulator-vddq-ddr {
regulator-max-microvolt = <1350000>;
regulator-always-on;
vin-supply = <&vin>;
+ bootph-all;
};
};
+&bsec {
+ bootph-all;
+};
+
+&clk_hse {
+ bootph-all;
+};
+
+&clk_hsi {
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_lsi {
+ bootph-all;
+};
+
+&clk_csi {
+ bootph-all;
+};
+
&dts {
status = "okay";
};
@@ -113,12 +141,61 @@ nand@0 {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&ipcc {
status = "okay";
};
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -132,6 +209,26 @@ &m4_rproc {
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
+&pwr_regulators {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rng1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
index 43280289759d..e192d033626e 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
@@ -71,6 +71,7 @@ &m4_rproc {
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ bootph-some-ram;
};
&rcc {
@@ -91,3 +92,7 @@ &rng1 {
&rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
};
+
+&scmi {
+ bootph-some-ram;
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts
index 1ec3b8f2faa9..bf9fdf0d611c 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts
@@ -80,6 +80,7 @@ touchscreen@38 {
};
<dc {
+ bootph-some-ram;
status = "okay";
port {
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
index 6f27d794d270..f053a70cb254 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
@@ -70,6 +70,7 @@ &m4_rproc {
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ bootph-some-ram;
};
&rcc {
@@ -90,3 +91,21 @@ &rng1 {
&rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
};
+
+&scmi {
+ bootph-some-ram;
+};
+
+&uart4 {
+ bootph-all;
+};
+
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts
index 49dd555cc228..ef71ebd65518 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts
@@ -145,6 +145,31 @@ channel@6 {
};
};
+
+&bsec {
+ bootph-all;
+};
+
+&clk_hse {
+ bootph-all;
+};
+
+&clk_hsi {
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_lsi {
+ bootph-all;
+};
+
+&clk_csi {
+ bootph-all;
+};
+
&crc1 {
status = "okay";
};
@@ -170,6 +195,54 @@ &dts {
status = "okay";
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&hash1 {
status = "okay";
};
@@ -181,7 +254,9 @@ &i2c4 {
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
clock-frequency = <400000>;
+ bootph-all;
status = "okay";
+
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
@@ -192,6 +267,7 @@ pmic: stpmic@33 {
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ bootph-all;
status = "okay";
regulators {
@@ -327,12 +403,20 @@ watchdog {
};
};
+&i2c4_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
&ipcc {
status = "okay";
};
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -348,9 +432,26 @@ &m4_rproc {
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
};
&rng1 {
@@ -378,9 +479,30 @@ &sdmmc1 {
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc1_dir_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
@@ -394,9 +516,27 @@ &sdmmc2 {
vmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd>;
mmc-ddr-3_3v;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc2_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc2_d47_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
&timers6 {
status = "okay";
/* spare dmas for other usage */
@@ -412,11 +552,22 @@ &uart4 {
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usbotg_hs {
vbus-supply = <&vbus_otg>;
};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
index 6ae391bffee5..17295d67ab85 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
@@ -75,6 +75,7 @@ &m4_rproc {
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ bootph-some-ram;
};
&rcc {
@@ -95,3 +96,7 @@ &rng1 {
&rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
};
+
+&scmi {
+ bootph-some-ram;
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
index 0e65a1862eb5..c4be802ef1e7 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
@@ -283,6 +283,7 @@ &i2c5 {
};
<dc {
+ bootph-some-ram;
status = "okay";
port {
@@ -314,6 +315,7 @@ &qspi_bk2_sleep_pins_a
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
+ bootph-pre-ram;
status = "okay";
flash0: flash@0 {
@@ -323,6 +325,7 @@ flash0: flash@0 {
spi-max-frequency = <108000000>;
#address-cells = <1>;
#size-cells = <1>;
+ bootph-pre-ram;
};
flash1: flash@1 {
@@ -335,6 +338,41 @@ flash1: flash@1 {
};
};
+&qspi_clk_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_bk1_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_cs1_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_bk2_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_cs2_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc3 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc3_b4_pins_a>;
diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-mc1.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-mc1.dts
index eada9cf257be..9f513045c559 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-lxa-mc1.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-lxa-mc1.dts
@@ -158,6 +158,7 @@ <dc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <<dc_pins_c>;
pinctrl-1 = <<dc_sleep_pins_c>;
+ bootph-some-ram;
status = "okay";
port {
diff --git a/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi b/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi
index cf7485251490..1c5517f57ecd 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi
@@ -75,11 +75,84 @@ led-blue {
};
};
+&bsec {
+ bootph-all;
+};
+
+&clk_hse {
+ bootph-all;
+};
+
+&clk_hsi {
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_lsi {
+ bootph-all;
+};
+
+&clk_csi {
+ bootph-all;
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
+ bootph-all;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
@@ -91,6 +164,7 @@ pmic: stpmic@33 {
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ bootph-all;
regulators {
compatible = "st,stpmic1-regulators";
@@ -218,12 +292,20 @@ watchdog {
};
};
+&i2c2_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
&ipcc {
status = "okay";
};
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -237,6 +319,26 @@ &m4_rproc {
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
+&pwr_regulators {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rng1 {
status = "okay";
};
@@ -258,6 +360,23 @@ &sdmmc2 {
vmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd>;
mmc-ddr-3_3v;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc2_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc2_d47_pins_d {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-odyssey.dts b/arch/arm/boot/dts/st/stm32mp157c-odyssey.dts
index a8b3f7a54703..92bc25b3f563 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-odyssey.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-odyssey.dts
@@ -75,14 +75,35 @@ &sdmmc1 {
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&v3v3>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts
index 36e6055b5665..b404ea3752d9 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts
@@ -131,6 +131,7 @@ i2s2_endpoint: endpoint {
};
<dc {
+ bootph-some-ram;
status = "okay";
port {
diff --git a/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi b/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi
index 89de85a2eff3..5d29c2154b46 100644
--- a/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi
@@ -87,6 +87,7 @@ &mdma1 {
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ bootph-some-ram;
};
&pwr_regulators {
@@ -114,6 +115,10 @@ &rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
};
+&scmi {
+ bootph-some-ram;
+};
+
&scmi_reguls {
scmi_vddcore: regulator@3 {
reg = <VOLTD_SCMI_STPMIC1_BUCK1>;
diff --git a/arch/arm/boot/dts/st/stm32mp157f-dk2.dts b/arch/arm/boot/dts/st/stm32mp157f-dk2.dts
index 8fa61e54d026..4d857b3575fd 100644
--- a/arch/arm/boot/dts/st/stm32mp157f-dk2.dts
+++ b/arch/arm/boot/dts/st/stm32mp157f-dk2.dts
@@ -97,6 +97,7 @@ stpmic@33 {
};
<dc {
+ bootph-some-ram;
status = "okay";
port {
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
index 0075d9391181..d8eb10339679 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
@@ -122,6 +122,7 @@ &i2c5 { /* Header X21 */
pinctrl-0 = <&i2c5_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
+ bootph-some-ram;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
@@ -149,7 +150,6 @@ sgtl5000_rx_endpoint: endpoint@1 {
remote-endpoint = <&sai2b_endpoint>;
};
};
-
};
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi
index 4cc633683c6b..04e91d02cc28 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi
@@ -103,6 +103,10 @@ channel@1 {
};
};
+&bsec {
+ bootph-all;
+};
+
&crc1 {
status = "okay";
};
@@ -121,6 +125,26 @@ dac2: dac@2 {
};
};
+&clk_hse {
+ bootph-all;
+};
+
+&clk_hsi {
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_lsi {
+ bootph-all;
+};
+
+&clk_csi {
+ bootph-all;
+};
+
&dts {
status = "okay";
};
@@ -190,6 +214,7 @@ &gpioa {
"", "", "DHCOM-K", "",
"", "", "", "",
"", "", "", "";
+ bootph-all;
};
&gpiob {
@@ -197,6 +222,7 @@ &gpiob {
"", "", "", "",
"DHCOM-Q", "", "", "",
"", "", "", "";
+ bootph-all;
};
&gpioc {
@@ -204,6 +230,7 @@ &gpioc {
"", "", "DHCOM-E", "",
"", "", "", "",
"", "", "", "";
+ bootph-all;
};
&gpiod {
@@ -211,6 +238,7 @@ &gpiod {
"", "", "DHCOM-B", "",
"", "", "", "DHCOM-F",
"DHCOM-D", "", "", "";
+ bootph-all;
};
&gpioe {
@@ -218,6 +246,7 @@ &gpioe {
"", "", "DHCOM-P", "",
"", "", "", "",
"", "", "", "";
+ bootph-all;
};
&gpiof {
@@ -225,6 +254,7 @@ &gpiof {
"", "", "", "",
"", "", "", "",
"", "", "", "";
+ bootph-all;
};
&gpiog {
@@ -232,6 +262,7 @@ &gpiog {
"", "", "", "",
"DHCOM-L", "", "", "",
"", "", "", "";
+ bootph-all;
};
&gpioh {
@@ -239,6 +270,7 @@ &gpioh {
"", "", "", "DHCOM-N",
"DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
"DHCOM-T", "", "DHCOM-S", "";
+ bootph-all;
};
&gpioi {
@@ -246,6 +278,20 @@ &gpioi {
"DHCOM-R", "DHCOM-M", "", "",
"", "", "", "",
"", "", "", "";
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
};
&i2c4 {
@@ -253,6 +299,8 @@ &i2c4 {
pinctrl-0 = <&i2c4_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
+ bootph-all;
+ bootph-pre-ram;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
@@ -269,6 +317,8 @@ pmic: stpmic@33 {
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ bootph-all;
+ bootph-pre-ram;
regulators {
compatible = "st,stpmic1-regulators";
@@ -279,6 +329,7 @@ regulators {
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;
+ bootph-pre-ram;
vddcore: buck1 {
regulator-name = "vddcore";
@@ -409,12 +460,20 @@ eeprom@50 {
};
};
+&i2c4_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
&ipcc {
status = "okay";
};
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -428,9 +487,22 @@ &m4_rproc {
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
+ bootph-all;
};
&qspi {
@@ -444,6 +516,7 @@ &qspi_bk1_sleep_pins_a
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
+ bootph-pre-ram;
status = "okay";
flash0: flash@0 {
@@ -453,6 +526,28 @@ flash0: flash@0 {
spi-max-frequency = <108000000>;
#address-cells = <1>;
#size-cells = <1>;
+ bootph-pre-ram;
+ };
+};
+
+&qspi_clk_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_bk1_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_cs1_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
};
};
@@ -469,6 +564,15 @@ &rcc {
assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>;
assigned-clock-parents = <&rcc PLL4_P>;
assigned-clock-rates = <50000000>, <100000000>;
+ bootph-all;
+};
+
+®11 {
+ bootph-pre-ram;
+};
+
+®18 {
+ bootph-pre-ram;
};
&rng1 {
@@ -495,6 +599,7 @@ &sdmmc1 {
st,ckin-gpios = <&gpioe 4 0>;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
+ bootph-pre-ram;
status = "okay";
};
@@ -504,11 +609,24 @@ &sdmmc1_b4_pins_a {
* - optional on SoMs with SD voltage translator
* - mandatory on SoMs without SD voltage translator
*/
+ bootph-pre-ram;
pins1 {
bias-pull-up;
+ bootph-pre-ram;
};
pins2 {
bias-pull-up;
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc1_dir_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
};
};
@@ -525,9 +643,27 @@ &sdmmc2 {
vmmc-supply = <&v3v3>;
vqmmc-supply = <&v3v3>;
mmc-ddr-3_3v;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc2_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc2_d47_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc3 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc3_b4_pins_a>;
@@ -545,7 +681,46 @@ &sdmmc3 {
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
+&usb33 {
+ bootph-pre-ram;
+};
+
+&usbotg_hs_pins_a {
+ bootph-pre-ram;
+};
+
+&usbotg_hs {
+ bootph-pre-ram;
+};
+
+&usbphyc {
+ bootph-pre-ram;
+};
+
+&usbphyc_port0 {
+ bootph-pre-ram;
+};
+
+&usbphyc_port1 {
+ bootph-pre-ram;
+};
+
+&vdd_usb {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi
index 85d93ddfa12a..c8e2c0a4ec4c 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi
@@ -349,6 +349,7 @@ <dc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <<dc_pins_d>;
pinctrl-1 = <<dc_sleep_pins_d>;
+ bootph-some-ram;
status = "okay";
port {
@@ -396,9 +397,30 @@ &sdmmc1 {
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
vqmmc-supply = <&sd_switch>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc1_dir_pins_b {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
@@ -412,9 +434,27 @@ &sdmmc2 {
st,neg-edge;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd_io>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc2_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc2_d47_pins_c {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc3 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc3_b4_pins_b>;
@@ -449,11 +489,22 @@ &uart4 {
label = "LS-UART1";
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_b>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_b {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart7 {
/* On Low speed expansion header */
label = "LS-UART0";
@@ -506,3 +557,7 @@ &usbphyc_port0 {
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
};
+
+&vdd_io {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi
index bc4ddcbdd5cf..9c6a04b4c2e3 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi
@@ -231,9 +231,30 @@ &sdmmc1 { /* MicroSD */
bus-width = <4>;
vmmc-supply = <&vdd>;
vqmmc-supply = <&vdd>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc1_dir_pins_b {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc2 { /* eMMC */
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
@@ -246,9 +267,27 @@ &sdmmc2 { /* eMMC */
st,neg-edge;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc2_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc2_d47_pins_c {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc3 { /* SDIO Wi-Fi */
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc3_b4_pins_a>;
@@ -276,11 +315,22 @@ &uart4 {
label = "UART0";
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_d>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_d {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart5 { /* X11 UART */
label = "X11-UART5";
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi
index 89881a26c614..3d469e29d41a 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi
@@ -63,6 +63,30 @@ retram: retram@38000000 {
};
};
+&bsec {
+ bootph-all;
+};
+
+&clk_hse {
+ bootph-all;
+};
+
+&clk_hsi {
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_lsi {
+ bootph-all;
+};
+
+&clk_csi {
+ bootph-all;
+};
+
&crc1 {
status = "okay";
};
@@ -71,11 +95,61 @@ &dts {
status = "okay";
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
+ bootph-all;
+ bootph-pre-ram;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
@@ -86,6 +160,8 @@ pmic: stpmic@33 {
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ bootph-all;
+ bootph-pre-ram;
status = "okay";
regulators {
@@ -98,6 +174,7 @@ regulators {
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;
+ bootph-pre-ram;
vddcore: buck1 {
regulator-name = "vddcore";
@@ -215,12 +292,20 @@ watchdog {
};
};
+&i2c4_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
&ipcc {
status = "okay";
};
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -234,9 +319,23 @@ &m4_rproc {
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
+ bootph-all;
+ bootph-pre-ram;
};
&qspi {
@@ -250,6 +349,7 @@ &qspi_bk1_sleep_pins_a
reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
#address-cells = <1>;
#size-cells = <0>;
+ bootph-pre-ram;
status = "okay";
flash0: flash@0 {
@@ -262,6 +362,35 @@ flash0: flash@0 {
};
};
+&qspi_clk_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_bk1_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&qspi_cs1_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+®11 {
+ bootph-pre-ram;
+};
+
+®18 {
+ bootph-pre-ram;
+};
+
&rng1 {
status = "okay";
};
@@ -269,3 +398,31 @@ &rng1 {
&rtc {
status = "okay";
};
+
+&usb33 {
+ bootph-pre-ram;
+};
+
+&usbotg_hs_pins_a {
+ bootph-pre-ram;
+};
+
+&usbotg_hs {
+ bootph-pre-ram;
+};
+
+&usbphyc {
+ bootph-pre-ram;
+};
+
+&usbphyc_port0 {
+ bootph-pre-ram;
+};
+
+&usbphyc_port1 {
+ bootph-pre-ram;
+};
+
+&vdd_usb {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi
index 6e79c4b6fe32..3b5debd0ffc9 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi
@@ -131,9 +131,30 @@ &sdmmc1 {
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
vqmmc-supply = <&sd_switch>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc1_dir_pins_b {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
@@ -147,17 +168,46 @@ &sdmmc2 {
st,neg-edge;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&v3v3>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc2_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc2_d47_pins_c {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_b>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_b {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart7 {
pinctrl-names = "default";
pinctrl-0 = <&uart7_pins_a>;
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
index 599ea07bdb19..4b190d1e5a78 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
@@ -144,6 +144,10 @@ channel@19 {
};
};
+&bsec {
+ bootph-all;
+};
+
&cec {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cec_pins_b>;
@@ -151,6 +155,26 @@ &cec {
status = "okay";
};
+&clk_hse {
+ bootph-all;
+};
+
+&clk_hsi {
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_lsi {
+ bootph-all;
+};
+
+&clk_csi {
+ bootph-all;
+};
+
&crc1 {
status = "okay";
};
@@ -199,6 +223,54 @@ &dts {
status = "okay";
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
ðernet0 {
status = "okay";
pinctrl-0 = <ðernet0_rgmii_pins_a>;
@@ -304,6 +376,7 @@ &i2c4 {
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
clock-frequency = <400000>;
+ bootph-all;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
@@ -339,6 +412,7 @@ pmic: stpmic@33 {
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ bootph-all;
status = "okay";
regulators {
@@ -477,6 +551,13 @@ watchdog {
};
};
+&i2c4_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
&i2c5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c5_pins_a>;
@@ -513,6 +594,7 @@ &ipcc {
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -520,6 +602,7 @@ <dc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <<dc_pins_a>;
pinctrl-1 = <<dc_sleep_pins_a>;
+ bootph-some-ram;
status = "okay";
port {
@@ -541,9 +624,26 @@ &m4_rproc {
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&pinctrl_z {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
};
&rng1 {
@@ -608,9 +708,20 @@ &sdmmc1 {
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&v3v3>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-pre-ram;
+ pins1 {
+ bootph-pre-ram;
+ };
+ pins2 {
+ bootph-pre-ram;
+ };
+};
+
&sdmmc3 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc3_b4_pins_a>;
@@ -731,11 +842,22 @@ &uart4 {
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
+ bootph-all;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart7 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart7_pins_c>;
--
2.43.0
^ permalink raw reply related
* [PATCH v7 0/7] Add boot phase tags for STMicroelectronics boards
From: Patrice Chotard @ 2026-05-26 9:26 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Patrick Delaunay, Christoph Niedermaier,
Marek Vasut
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel, kernel,
Patrice Chotard
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
Changes in v7:
- Rebase on top of stm32-next.
_ Fix sdmmc2_b4_pins_a's node in stm32mp15xx-dhcom-som.dtsi.
- Link to v6: https://lore.kernel.org/r/20260203-upstream_uboot_properties-v6-0-0a2280e84d31@foss.st.com
Changes in v6:
- Add bootph-all property in syscfg node of stm32mp215f-dk.dtsi.
- Split patch 4 in 2 parts, first part for reordering nodes, second part
for adding bootph-all property.
- Rebase on top of stm32-dt-for-v6.20-1.
- Link to v5: https://lore.kernel.org/r/20260123-upstream_uboot_properties-v5-0-5167929d5af5@foss.st.com
Changes in v5:
- Initial implementation allows to factorize and add bootph-* properties in a limited number of DT files.
After internal discussion with Alexandre, choice has been done to add bootph-* properties only
in board DT files instead of SoCs/pinctrl/boards DT files.This impacts a greater number of DT boards files.
- Link to v4: https://lore.kernel.org/r/20260109-upstream_uboot_properties-v4-0-75e06657c600@foss.st.com
Changes in v4:
- Remove useless nodes in stm32mp15-scmi.dtsi
- Link to v3: https://lore.kernel.org/r/20260108-upstream_uboot_properties-v3-0-c1b9d4f2ce8d@foss.st.com
Changes in v3:
- Remove duplicate bootph-all property in ltdc node
- Link to v2: https://lore.kernel.org/r/20251114-upstream_uboot_properties-v2-0-3784ff668ae0@foss.st.com
Changes in v2:
- Fix 'pinmux' is a required property for arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dtb
- Add bootph-all property for lvds and ltdc nodes for stm32mp2
---
Patrice Chotard (7):
ARM: dts: stm32: Add boot phase tags for STMicroelectronics f4 boards
ARM: dts: stm32: Add boot phase tags for STMicroelectronics f7 boards
ARM: dts: stm32: Add boot phase tags for STMicroelectronics h7 boards
ARM: dts: stm32: Sort uart nodes by alphabetical order in stm32mp13xx-dhcor-som.dtsi
ARM: dts: stm32: Add boot phase tags for STMicroelectronics mp13 boards
ARM: dts: stm32: Add boot phase tags for STMicroelectronics mp15 boards
arm64: dts: st: Add boot phase tags for STMicroelectronics mp2 boards
arch/arm/boot/dts/st/stm32429i-eval.dts | 80 ++++++++++
arch/arm/boot/dts/st/stm32746g-eval.dts | 10 ++
arch/arm/boot/dts/st/stm32f429-disco.dts | 80 ++++++++++
arch/arm/boot/dts/st/stm32f469-disco.dts | 72 +++++++++
arch/arm/boot/dts/st/stm32f746-disco.dts | 75 +++++++++
arch/arm/boot/dts/st/stm32f746.dtsi | 2 +-
arch/arm/boot/dts/st/stm32f769-disco.dts | 76 ++++++++-
arch/arm/boot/dts/st/stm32h743i-disco.dts | 69 ++++++++
arch/arm/boot/dts/st/stm32h743i-eval.dts | 69 ++++++++
arch/arm/boot/dts/st/stm32h747i-disco.dts | 69 ++++++++
arch/arm/boot/dts/st/stm32h750i-art-pi.dts | 69 ++++++++
arch/arm/boot/dts/st/stm32mp131.dtsi | 4 +-
arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts | 21 +++
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 101 ++++++++++++
arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi | 145 ++++++++++++++---
arch/arm/boot/dts/st/stm32mp151.dtsi | 2 +-
arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts | 19 +++
.../st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 1 +
.../dts/st/stm32mp157a-icore-stm32mp1-ctouch2.dts | 25 +++
.../dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts | 26 +++
.../boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi | 100 ++++++++++++
...m32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 27 ++++
.../stm32mp157a-microgea-stm32mp1-microdev2.0.dts | 27 ++++
.../boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi | 97 ++++++++++++
arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts | 5 +
arch/arm/boot/dts/st/stm32mp157c-dk2.dts | 1 +
arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | 19 +++
arch/arm/boot/dts/st/stm32mp157c-ed1.dts | 151 ++++++++++++++++++
arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts | 5 +
arch/arm/boot/dts/st/stm32mp157c-ev1.dts | 38 +++++
arch/arm/boot/dts/st/stm32mp157c-lxa-mc1.dts | 1 +
arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi | 119 ++++++++++++++
arch/arm/boot/dts/st/stm32mp157c-odyssey.dts | 21 +++
arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts | 1 +
arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi | 5 +
arch/arm/boot/dts/st/stm32mp157f-dk2.dts | 1 +
arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi | 2 +-
arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi | 175 +++++++++++++++++++++
.../boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi | 55 +++++++
.../boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi | 50 ++++++
arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi | 157 ++++++++++++++++++
.../boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi | 50 ++++++
arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi | 122 ++++++++++++++
arch/arm64/boot/dts/st/stm32mp211.dtsi | 4 +-
arch/arm64/boot/dts/st/stm32mp215f-dk.dts | 29 ++++
arch/arm64/boot/dts/st/stm32mp231.dtsi | 4 +-
arch/arm64/boot/dts/st/stm32mp235f-dk.dts | 95 +++++++++++
arch/arm64/boot/dts/st/stm32mp251.dtsi | 4 +-
arch/arm64/boot/dts/st/stm32mp255.dtsi | 2 +-
arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 103 ++++++++++++
arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 105 +++++++++++++
51 files changed, 2552 insertions(+), 38 deletions(-)
---
base-commit: a0d6c2a06fffff47bcca4d5bfdab4cc428a315fc
change-id: 20251112-upstream_uboot_properties-22480b0b4b1c
Best regards,
--
Patrice Chotard <patrice.chotard@foss.st.com>
^ permalink raw reply
* [PATCH v7 5/7] ARM: dts: stm32: Add boot phase tags for STMicroelectronics mp13 boards
From: Patrice Chotard @ 2026-05-26 9:26 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Patrick Delaunay, Christoph Niedermaier,
Marek Vasut
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel, kernel,
Patrice Chotard
In-Reply-To: <20260526-upstream_uboot_properties-v7-0-e17cd424d5db@foss.st.com>
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp131.dtsi | 4 +-
arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts | 21 +++++
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 101 +++++++++++++++++++++++
arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi | 101 +++++++++++++++++++++++
4 files changed, 225 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index 83ae59b73dd0..ec1e91101971 100644
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -37,7 +37,7 @@ arm_wdt: watchdog {
};
firmware {
- optee {
+ optee: optee {
method = "smc";
compatible = "linaro,optee-tz";
interrupt-parent = <&intc>;
@@ -92,7 +92,7 @@ intc: interrupt-controller@a0021000 {
<0xa0022000 0x2000>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
};
diff --git a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts
index 70d85af46735..06b5b68e5f78 100644
--- a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts
@@ -354,6 +354,21 @@ timer@12 {
};
};
+&uart4 {
+ bootph-all;
+};
+
+&uart4_pins_b {
+ bootph-all;
+
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usart1 { /* Expansion connector: RX:pin33 TX:pin37 */
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart1_pins_b>;
@@ -371,6 +386,10 @@ &usart2 { /* Expansion connector: RX:pin10 TX:pin8 RTS:pin11 CTS:pin36 */
status = "okay";
};
+&usbphyc {
+ bootph-all;
+};
+
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
@@ -436,6 +455,7 @@ connector {
/* LDO2 is expansion connector 3V3 supply on STM32MP13xx DHCOR DHSBC rev.200 */
&vdd_ldo2 {
+ bootph-all;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
@@ -444,6 +464,7 @@ &vdd_ldo2 {
/* LDO5 is carrier board 3V3 supply on STM32MP13xx DHCOR DHSBC rev.200 */
&vdd_sd {
+ bootph-all;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
index 6022e73f58af..43b8a7eed01b 100644
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -182,6 +182,10 @@ &arm_wdt {
status = "okay";
};
+&bsec {
+ bootph-all;
+};
+
&crc1 {
status = "okay";
};
@@ -253,6 +257,42 @@ phy0_eth1: ethernet-phy@0 {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
&i2c1 {
pinctrl-names = "default", "sleep";
/* SDA on PE8 = CN8.27, SCL on PD12 = CN8.28 */
@@ -388,6 +428,7 @@ goodix: goodix-ts@5d {
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
@@ -395,6 +436,7 @@ <dc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <<dc_pins_a>;
pinctrl-1 = <<dc_sleep_pins_a>;
+ bootph-some-ram;
status = "okay";
port {
@@ -404,6 +446,22 @@ ltdc_out_rgb: endpoint {
};
};
+&optee {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rtc {
pinctrl-names = "default";
pinctrl-0 = <&rtc_rsvd_pins_a>;
@@ -415,6 +473,14 @@ rtc_lsco_pins_a: rtc-lsco-0 {
};
};
+&scmi {
+ bootph-all;
+};
+
+&scmi_clk {
+ bootph-all;
+};
+
&scmi_regu {
scmi_vdd_adc: regulator@10 {
reg = <VOLTD_SCMI_STPMIC1_LDO1>;
@@ -438,6 +504,10 @@ scmi_v3v3_sw: regulator@19 {
};
};
+&scmi_reset {
+ bootph-all;
+};
+
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
@@ -448,9 +518,24 @@ &sdmmc1 {
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&scmi_vdd_sd>;
+ bootph-pre-ram;
status = "okay";
};
+&sdmmc1_b4_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
+&sdmmc1_clk_pins_a {
+ bootph-pre-ram;
+ pins {
+ bootph-pre-ram;
+ };
+};
+
/* Wifi */
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
@@ -482,6 +567,10 @@ &spi5 {
status = "disabled";
};
+&syscfg {
+ bootph-all;
+};
+
&timers3 {
/delete-property/dmas;
/delete-property/dma-names;
@@ -575,9 +664,20 @@ &uart4 {
pinctrl-2 = <&uart4_idle_pins_a>;
/delete-property/dmas;
/delete-property/dma-names;
+ bootph-all;
status = "okay";
};
+&uart4_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&uart8 {
pinctrl-names = "default", "sleep", "idle";
/* TX on PE1 = CN8.37, RX on PF9 = CN8.33 */
@@ -645,6 +745,7 @@ usbotg_hs_ep: endpoint {
};
&usbphyc {
+ bootph-all;
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
index 54ece71085c1..4efaca84a72c 100644
--- a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
@@ -54,6 +54,46 @@ vin: vin {
};
};
+&bsec {
+ bootph-all;
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
&i2c3 {
i2c-scl-rising-time-ns = <96>;
i2c-scl-falling-time-ns = <3>;
@@ -216,9 +256,18 @@ eeprom0wl: eeprom@58 {
&iwdg2 {
timeout-sec = <32>;
+ bootph-all;
status = "okay";
};
+&pinctrl {
+ bootph-all;
+};
+
+&psci {
+ bootph-some-ram;
+};
+
&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a
@@ -229,6 +278,7 @@ &qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
#address-cells = <1>;
#size-cells = <0>;
+ bootph-all;
status = "okay";
flash0: flash@0 {
@@ -238,9 +288,35 @@ flash0: flash@0 {
spi-max-frequency = <108000000>;
#address-cells = <1>;
#size-cells = <1>;
+ bootph-all;
};
};
+&qspi_clk_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
+&qspi_bk1_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
+&qspi_cs1_pins_a {
+ bootph-all;
+ pins {
+ bootph-all;
+ };
+};
+
+&rcc {
+ bootph-all;
+};
+
/* SDIO WiFi */
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
@@ -285,6 +361,10 @@ &sdmmc2 {
status = "okay";
};
+&syscfg {
+ bootph-all;
+};
+
/* Console UART */
&uart4 {
pinctrl-names = "default", "sleep", "idle";
@@ -312,3 +392,24 @@ bluetooth {
shutdown-gpios = <&gpioi 2 GPIO_ACTIVE_HIGH>;
};
};
+
+&vdd {
+ bootph-all;
+};
+
+&vddcpu {
+ bootph-all;
+};
+
+
+&vddcore {
+ bootph-all;
+};
+
+&vdd_ddr {
+ bootph-all;
+};
+
+&vref_ddr {
+ bootph-all;
+};
--
2.43.0
^ permalink raw reply related
* [PATCH v7 2/7] ARM: dts: stm32: Add boot phase tags for STMicroelectronics f7 boards
From: Patrice Chotard @ 2026-05-26 9:26 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Patrick Delaunay, Christoph Niedermaier,
Marek Vasut
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel, kernel,
Patrice Chotard
In-Reply-To: <20260526-upstream_uboot_properties-v7-0-e17cd424d5db@foss.st.com>
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
arch/arm/boot/dts/st/stm32746g-eval.dts | 10 +++++
arch/arm/boot/dts/st/stm32f746-disco.dts | 75 +++++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32f746.dtsi | 2 +-
arch/arm/boot/dts/st/stm32f769-disco.dts | 76 ++++++++++++++++++++++++++++++--
4 files changed, 158 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/st/stm32746g-eval.dts b/arch/arm/boot/dts/st/stm32746g-eval.dts
index 6772c1f9d03e..d66b670de6f2 100644
--- a/arch/arm/boot/dts/st/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/st/stm32746g-eval.dts
@@ -226,6 +226,16 @@ &usart1 {
status = "okay";
};
+&usart1_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usbotg_hs {
dr_mode = "otg";
phys = <&usbotg_hs_phy>;
diff --git a/arch/arm/boot/dts/st/stm32f746-disco.dts b/arch/arm/boot/dts/st/stm32f746-disco.dts
index 61ca41ea523e..5db37bbe6c2a 100644
--- a/arch/arm/boot/dts/st/stm32f746-disco.dts
+++ b/arch/arm/boot/dts/st/stm32f746-disco.dts
@@ -150,6 +150,51 @@ panel_in_rgb: endpoint {
&clk_hse {
clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
};
&i2c1 {
@@ -179,6 +224,7 @@ touchscreen@38 {
<dc {
pinctrl-0 = <<dc_pins_a>;
pinctrl-names = "default";
+ bootph-all;
status = "okay";
port {
@@ -188,6 +234,22 @@ ltdc_out_rgb: endpoint {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
+&soc {
+ bootph-all;
+};
+
&sdio1 {
status = "okay";
vmmc-supply = <&vcc_3v3>;
@@ -203,6 +265,7 @@ &timers5 {
/* Override timer5 to act as clockevent */
compatible = "st,stm32-timer";
interrupts = <50>;
+ bootph-all;
status = "okay";
/delete-property/#address-cells;
/delete-property/#size-cells;
@@ -214,9 +277,21 @@ &timers5 {
&usart1 {
pinctrl-0 = <&usart1_pins_b>;
pinctrl-names = "default";
+ bootph-all;
status = "okay";
};
+
+&usart1_pins_b {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usbotg_fs {
dr_mode = "host";
pinctrl-0 = <&usbotg_fs_pins_a>;
diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi
index 208f8c6dfc9d..1fede5bdc347 100644
--- a/arch/arm/boot/dts/st/stm32f746.dtsi
+++ b/arch/arm/boot/dts/st/stm32f746.dtsi
@@ -75,7 +75,7 @@ clk_i2s_ckin: clk-i2s-ckin {
};
};
- soc {
+ soc: soc {
timers2: timers@40000000 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/st/stm32f769-disco.dts b/arch/arm/boot/dts/st/stm32f769-disco.dts
index e5854fa1071b..7338e78847b6 100644
--- a/arch/arm/boot/dts/st/stm32f769-disco.dts
+++ b/arch/arm/boot/dts/st/stm32f769-disco.dts
@@ -128,10 +128,6 @@ vcc_3v3: vcc-3v3 {
};
};
-&rcc {
- compatible = "st,stm32f769-rcc", "st,stm32f746-rcc", "st,stm32-rcc";
-};
-
&cec {
pinctrl-0 = <&cec_pins_a>;
pinctrl-names = "default";
@@ -140,11 +136,13 @@ &cec {
&clk_hse {
clock-frequency = <25000000>;
+ bootph-all;
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
+ bootph-all;
status = "okay";
ports {
@@ -181,6 +179,50 @@ dsi_panel_in: endpoint {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
&i2c1 {
pinctrl-0 = <&i2c1_pins_b>;
pinctrl-names = "default";
@@ -190,6 +232,7 @@ &i2c1 {
};
<dc {
+ bootph-all;
status = "okay";
port {
@@ -199,6 +242,19 @@ ltdc_out_dsi: endpoint {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ compatible = "st,stm32f769-rcc", "st,stm32f746-rcc", "st,stm32-rcc";
+ bootph-all;
+};
+
&rtc {
status = "okay";
};
@@ -219,6 +275,7 @@ &timers5 {
/* Override timer5 to act as clockevent */
compatible = "st,stm32-timer";
interrupts = <50>;
+ bootph-all;
status = "okay";
/delete-property/#address-cells;
/delete-property/#size-cells;
@@ -230,9 +287,20 @@ &timers5 {
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
+ bootph-all;
status = "okay";
};
+&usart1_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usbotg_hs {
dr_mode = "otg";
phys = <&usbotg_hs_phy>;
--
2.43.0
^ permalink raw reply related
* [PATCH v7 1/7] ARM: dts: stm32: Add boot phase tags for STMicroelectronics f4 boards
From: Patrice Chotard @ 2026-05-26 9:26 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Patrick Delaunay, Christoph Niedermaier,
Marek Vasut
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel, kernel,
Patrice Chotard
In-Reply-To: <20260526-upstream_uboot_properties-v7-0-e17cd424d5db@foss.st.com>
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
arch/arm/boot/dts/st/stm32429i-eval.dts | 80 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32f429-disco.dts | 80 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32f469-disco.dts | 72 ++++++++++++++++++++++++++++
3 files changed, 232 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32429i-eval.dts b/arch/arm/boot/dts/st/stm32429i-eval.dts
index f4b1c4eb64f2..8a08b9f6b837 100644
--- a/arch/arm/boot/dts/st/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/st/stm32429i-eval.dts
@@ -188,6 +188,15 @@ adc3: adc@200 {
&clk_hse {
clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_i2s_ckin {
+ bootph-all;
};
&crc {
@@ -209,6 +218,50 @@ dcmi_0: endpoint {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
@@ -278,6 +331,18 @@ phy1: ethernet-phy@1 {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rtc {
status = "okay";
};
@@ -293,6 +358,10 @@ &sdio {
max-frequency = <12500000>;
};
+&syscfg {
+ bootph-all;
+};
+
&timers1 {
status = "okay";
@@ -325,6 +394,7 @@ &timers5 {
/* Override timer5 to act as clockevent */
compatible = "st,stm32-timer";
interrupts = <50>;
+ bootph-all;
status = "okay";
/delete-property/#address-cells;
/delete-property/#size-cells;
@@ -339,6 +409,16 @@ &usart1 {
status = "okay";
};
+&usart1_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usbotg_hs {
dr_mode = "host";
phys = <&usbotg_hs_phy>;
diff --git a/arch/arm/boot/dts/st/stm32f429-disco.dts b/arch/arm/boot/dts/st/stm32f429-disco.dts
index ded369abee4f..047845ab3d5f 100644
--- a/arch/arm/boot/dts/st/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/st/stm32f429-disco.dts
@@ -113,12 +113,65 @@ vcc5v_otg: vcc5v-otg-regulator {
&clk_hse {
clock-frequency = <8000000>;
+ bootph-all;
+};
+
+&clk_lse {
+ bootph-all;
+};
+
+&clk_i2s_ckin {
+ bootph-all;
};
&crc {
status = "okay";
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
@@ -176,6 +229,18 @@ ltdc_out_rgb: endpoint {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rtc {
assigned-clocks = <&rcc 1 CLK_RTC>;
assigned-clock-parents = <&rcc 1 CLK_LSI>;
@@ -216,10 +281,15 @@ panel_in_rgb: endpoint {
};
};
+&syscfg {
+ bootph-all;
+};
+
&timers5 {
/* Override timer5 to act as clockevent */
compatible = "st,stm32-timer";
interrupts = <50>;
+ bootph-all;
status = "okay";
/delete-property/#address-cells;
/delete-property/#size-cells;
@@ -234,6 +304,16 @@ &usart1 {
status = "okay";
};
+&usart1_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usbotg_hs {
compatible = "st,stm32f4x9-fsotg";
dr_mode = "host";
diff --git a/arch/arm/boot/dts/st/stm32f469-disco.dts b/arch/arm/boot/dts/st/stm32f469-disco.dts
index 943afba06b5f..ecd33d6003b3 100644
--- a/arch/arm/boot/dts/st/stm32f469-disco.dts
+++ b/arch/arm/boot/dts/st/stm32f469-disco.dts
@@ -181,7 +181,52 @@ dsi_panel_in: endpoint {
};
};
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
<dc {
+ bootph-all;
status = "okay";
port {
@@ -191,10 +236,26 @@ ltdc_out_dsi: endpoint {
};
};
+&pinctrl {
+ bootph-all;
+};
+
+&pwrcfg {
+ bootph-all;
+};
+
+&rcc {
+ bootph-all;
+};
+
&rtc {
status = "okay";
};
+&syscfg {
+ bootph-all;
+};
+
&timers1 {
status = "okay";
@@ -238,6 +299,7 @@ &timers5 {
/* Override timer5 to act as clockevent */
compatible = "st,stm32-timer";
interrupts = <50>;
+ bootph-all;
status = "okay";
/delete-property/#address-cells;
/delete-property/#size-cells;
@@ -252,6 +314,16 @@ &usart3 {
status = "okay";
};
+&usart3_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
+
&usbotg_fs {
dr_mode = "host";
pinctrl-0 = <&usbotg_fs_pins_a>;
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v5 12/19] drm/crtc: Add new atomic_create_state callback
From: Thomas Zimmermann @ 2026-05-26 9:22 UTC (permalink / raw)
To: Maxime Ripard, Maarten Lankhorst, David Airlie, Simona Vetter,
Jonathan Corbet, Shuah Khan, Dmitry Baryshkov, Jyri Sarha,
Tomi Valkeinen, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Simon Ser,
Harry Wentland, Melissa Wen, Sebastian Wick, Alex Hung,
Jani Nikula, Rodrigo Vivi, Joonas Lahtinen, Tvrtko Ursulin,
Chen-Yu Tsai, Samuel Holland, Dave Stevenson, Maíra Canal,
Raspberry Pi Kernel Maintenance
Cc: dri-devel, linux-doc, linux-kernel, Daniel Stone, intel-gfx,
intel-xe, linux-arm-kernel, linux-sunxi
In-Reply-To: <20260519-drm-mode-config-init-v5-12-388b03321e38@kernel.org>
Am 19.05.26 um 11:01 schrieb Maxime Ripard:
> Commit 47b5ac7daa46 ("drm/atomic: Add new atomic_create_state callback
> to drm_private_obj") introduced a new pattern for allocating drm object
> states.
>
> Instead of relying on the reset() callback, it created a new
> atomic_create_state hook. This is helpful because reset is a bit
> overloaded: it's used to create the initial software state, reset it,
> but also reset the hardware.
>
> It can also be used either at probe time, to create the initial state
> and possibly reset the hardware to an expected default, but also during
> suspend/resume.
>
> Both these cases come with different expectations too: during the
> initialization, we want to initialize all states, but during
> suspend/resume, drm_private_states for example are expected to be kept
> around.
>
> reset() also isn't fallible, which makes it harder to handle
> initialization errors properly. This is only really relevant for some
> drivers though, since all the helpers for reset only create a new
> state, and don't touch the hardware at all.
>
> It was thus decided to create a new hook that would allocate and
> initialize a pristine state without any side effect:
> atomic_create_state to untangle a bit some of it, and to separate the
> initialization with the actual reset one might need during a
> suspend/resume.
>
> Continue the transition to the new pattern with CRTCs.
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Signed-off-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
[...]
> +
> + crtc_state = crtc->funcs->atomic_create_state(crtc);
> + if (IS_ERR(crtc_state))
> + return PTR_ERR(crtc_state);
> +
> + if (drm_dev_has_vblank(crtc->dev))
> + drm_crtc_vblank_reset(crtc);
I've recently looked at the vblank init and reset code. At some point,
we'll have to make the vblank reset controllable by drivers. Not an
issue for now though.
Best regards
Thomas
> +
> + crtc->state = crtc_state;
> +
> + return 0;
> +}
> +
> +static int drm_mode_config_crtc_reset_with_create_state(struct drm_crtc *crtc)
> +{
> + if (crtc->state) {
> + crtc->funcs->atomic_destroy_state(crtc, crtc->state);
> + crtc->state = NULL;
> + }
> +
> + return drm_mode_config_crtc_create_state(crtc);
> +}
> +
> /**
> * drm_mode_config_reset - call ->reset callbacks
> * @dev: drm device
> *
> * This functions calls all the crtc's, encoder's and connector's ->reset
> @@ -237,13 +266,16 @@ void drm_mode_config_reset(struct drm_device *dev)
> plane->funcs->reset(plane);
> else if (plane->funcs->atomic_create_state)
> drm_mode_config_plane_reset_with_create_state(plane);
> }
>
> - drm_for_each_crtc(crtc, dev)
> + drm_for_each_crtc(crtc, dev) {
> if (crtc->funcs->reset)
> crtc->funcs->reset(crtc);
> + else if (crtc->funcs->atomic_create_state)
> + drm_mode_config_crtc_reset_with_create_state(crtc);
> + }
>
> drm_for_each_encoder(encoder, dev)
> if (encoder->funcs && encoder->funcs->reset)
> encoder->funcs->reset(encoder);
>
> diff --git a/include/drm/drm_atomic_state_helper.h b/include/drm/drm_atomic_state_helper.h
> index 0bb72453464a..213f7e298008 100644
> --- a/include/drm/drm_atomic_state_helper.h
> +++ b/include/drm/drm_atomic_state_helper.h
> @@ -43,10 +43,12 @@ struct drm_device;
> void __drm_atomic_helper_crtc_state_init(struct drm_crtc_state *state,
> struct drm_crtc *crtc);
> void __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc,
> struct drm_crtc_state *state);
> void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc);
> +struct drm_crtc_state *
> +drm_atomic_helper_crtc_create_state(struct drm_crtc *crtc);
> void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc,
> struct drm_crtc_state *state);
> struct drm_crtc_state *
> drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc);
> void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state);
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index c6dbe8b7db9e..152349f973e3 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -636,10 +636,26 @@ struct drm_crtc_funcs {
> * 0 on success or a negative error code on failure.
> */
> int (*set_property)(struct drm_crtc *crtc,
> struct drm_property *property, uint64_t val);
>
> + /**
> + * @atomic_create_state:
> + *
> + * Allocate a pristine, initialized, state for the CRTC object
> + * and return it. This callback must have no side effects: in
> + * particular, the returned state must not be assigned to the
> + * object's state pointer and it must not affect the hardware
> + * state.
> + *
> + * RETURNS:
> + *
> + * A new, pristine, CRTC state instance or an error pointer
> + * on failure.
> + */
> + struct drm_crtc_state *(*atomic_create_state)(struct drm_crtc *crtc);
> +
> /**
> * @atomic_duplicate_state:
> *
> * Duplicate the current atomic state for this CRTC and return it.
> * The core and helpers guarantee that any atomic state duplicated with
>
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
^ permalink raw reply
* Re: [PATCH v7 5/9] dt-bindings: arm: fsl: Add solidrun lx2160a twins board
From: Krzysztof Kozlowski @ 2026-05-26 9:15 UTC (permalink / raw)
To: Josua Mayer
Cc: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx
In-Reply-To: <20260524-lx2160-pci-v7-5-09370c23b952@solid-run.com>
On Sun, May 24, 2026 at 04:54:44PM +0200, Josua Mayer wrote:
> The SolidRun LX2160A Twins board supports two configurations, one with
> with a single CEX-7 module, and one with two (dual).
>
> The single configuration is a specific assembly that maximises
> connectivity for single cpu by routing some second cpu resources to the
> first via zero-Ohm resistors.
>
> The dual configuration was not yet tested and is intentionally omitted.
>
> Initial review strongly suggests that the dual configuration will have
> different bindings, because from either cpu point of view the board
> appears different (e.g. different number of sfp, fewer i2c gpio).
>
> Add binding for the single variant only.
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v8 1/2] media: dt-bindings: Add CSI Pixel Formatter DT bindings
From: Krzysztof Kozlowski @ 2026-05-26 9:13 UTC (permalink / raw)
To: Guoniu Zhou
Cc: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Frank Li, imx, linux-media,
devicetree, linux-arm-kernel, linux-kernel, Guoniu Zhou,
Krzysztof Kozlowski
In-Reply-To: <20260525-csi_formatter-v8-1-6b646231224b@oss.nxp.com>
On Mon, May 25, 2026 at 04:12:22PM +0800, Guoniu Zhou wrote:
> From: Guoniu Zhou <guoniu.zhou@nxp.com>
>
> The i.MX95 CSI pixel formatting module uses packet info, pixel and
> non-pixel data from the CSI-2 host controller and reformat them to
> match Pixel Link(PL) definition.
>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Drop both review tags and request re-review since you made significant
changes.
> Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> ---
> Changes in v8:
> - Use standard port reference instead of video-interfaces.yaml
Why? Properties are not applicable?
> - Add parent syscon node in example to show device integration
> - Add required constraints for port@0 and port@1 in ports node
>
> Changes in v7:
> - Change compatible to imx95-csi-formatter as IP is i.MX95 specific per Marco's suggestion
> Link: https://lore.kernel.org/linux-media/20260511-csi_formatter-v6-0-01028e312e2b@oss.nxp.com/T/#mcd135b3de179b3cb69daa1fd6e0e8e27c85b3332
> ---
> .../bindings/media/fsl,imx95-csi-formatter.yaml | 92 ++++++++++++++++++++++
> 1 file changed, 92 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml b/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
> new file mode 100644
> index 000000000000..bc2f5d448fe5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/fsl,imx95-csi-formatter.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX95 CSI Pixel Formatter
> +
> +maintainers:
> + - Guoniu Zhou <guoniu.zhou@nxp.com>
> +
> +description:
> + The CSI pixel formatting module found on i.MX95 uses packet info, pixel
> + and non-pixel data from the CSI-2 host controller and reformat them to
> + match Pixel Link(PL) definition.
> +
> +properties:
> + compatible:
> + const: fsl,imx95-csi-formatter
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: MIPI CSI-2 RX IDI interface
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Pixel Link Interface
> +
> + required:
> + - port@0
> + - port@1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - power-domains
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/nxp,imx95-clock.h>
> +
> + syscon@4ac10000 {
> + compatible = "nxp,imx95-camera-csr", "syscon";
Drop entire node, not relevant. Or actually this example could be in the
parent binding example.
> + reg = <0x0 0x4ac10000 0x0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + formatter@20 {
> + compatible = "fsl,imx95-csi-formatter";
> + reg = <0x20 0x100>;
> + clocks = <&cameramix_csr IMX95_CLK_CAMBLK_CSI2_FOR0>;
> + power-domains = <&scmi_devpd 3>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + endpoint {
> + remote-endpoint = <&mipi_csi_0_out>;
> + };
> + };
> +
> + port@1 {
Messed indentation.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH] i2c: stm32f7: fix timing computation ignoring i2c-analog-filter
From: Guillermo Rodríguez @ 2026-05-26 9:12 UTC (permalink / raw)
To: Pierre-Yves MORDRET, Alain Volmat, Andi Shyti, Maxime Coquelin,
Alexandre Torgue, Wolfram Sang
Cc: Guillermo Rodríguez, linux-i2c, linux-stm32,
linux-arm-kernel, linux-kernel
stm32f7_i2c_compute_timing() uses i2c_dev->analog_filter to pick
the analog filter delay, but i2c_dev->analog_filter is parsed from
the "i2c-analog-filter" DT property only after the compute_timing
loop in stm32f7_i2c_setup_timing(), so in practice the timing
calculations always ignore the analog filter. On an STM32MP1 board
with clock-frequency = <400000> and i2c-analog-filter set, measured
SCL frequency was ~382 kHz.
This also affects (widens) the computed SDADEL range. At high bus
clock speeds, this can select an SDADEL value that violates tVD;DAT
(data valid time).
Fix by parsing "i2c-analog-filter" before the compute_timing loop.
Fixes: 83c3408f7b9c ("i2c: stm32f7: support DT binding i2c-analog-filter")
Cc: stable@vger.kernel.org
Signed-off-by: Guillermo Rodríguez <guille.rodriguez@gmail.com>
---
drivers/i2c/busses/i2c-stm32f7.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
index 53d9df70ebe4..067af255bd22 100644
--- a/drivers/i2c/busses/i2c-stm32f7.c
+++ b/drivers/i2c/busses/i2c-stm32f7.c
@@ -694,6 +694,9 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev,
if (!of_property_read_bool(i2c_dev->dev->of_node, "i2c-digital-filter"))
i2c_dev->dnf_dt = STM32F7_I2C_DNF_DEFAULT;
+ i2c_dev->analog_filter = of_property_read_bool(i2c_dev->dev->of_node,
+ "i2c-analog-filter");
+
do {
ret = stm32f7_i2c_compute_timing(i2c_dev, setup,
&i2c_dev->timing);
@@ -715,9 +718,6 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev,
return ret;
}
- i2c_dev->analog_filter = of_property_read_bool(i2c_dev->dev->of_node,
- "i2c-analog-filter");
-
dev_dbg(i2c_dev->dev, "I2C Speed(%i), Clk Source(%i)\n",
setup->speed_freq, setup->clock_src);
dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n",
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v5 10/19] drm/plane: Add new atomic_create_state callback
From: Thomas Zimmermann @ 2026-05-26 9:08 UTC (permalink / raw)
To: Maxime Ripard, Maarten Lankhorst, David Airlie, Simona Vetter,
Jonathan Corbet, Shuah Khan, Dmitry Baryshkov, Jyri Sarha,
Tomi Valkeinen, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Simon Ser,
Harry Wentland, Melissa Wen, Sebastian Wick, Alex Hung,
Jani Nikula, Rodrigo Vivi, Joonas Lahtinen, Tvrtko Ursulin,
Chen-Yu Tsai, Samuel Holland, Dave Stevenson, Maíra Canal,
Raspberry Pi Kernel Maintenance
Cc: dri-devel, linux-doc, linux-kernel, Daniel Stone, intel-gfx,
intel-xe, linux-arm-kernel, linux-sunxi, Laurent Pinchart
In-Reply-To: <20260519-drm-mode-config-init-v5-10-388b03321e38@kernel.org>
Am 19.05.26 um 11:01 schrieb Maxime Ripard:
> Commit 47b5ac7daa46 ("drm/atomic: Add new atomic_create_state callback
> to drm_private_obj") introduced a new pattern for allocating drm object
> states.
>
> Instead of relying on the reset() callback, it created a new
> atomic_create_state hook. This is helpful because reset is a bit
> overloaded: it's used to create the initial software state, reset it,
> but also reset the hardware.
>
> It can also be used either at probe time, to create the initial state
> and possibly reset the hardware to an expected default, but also during
> suspend/resume.
>
> Both these cases come with different expectations too: during the
> initialization, we want to initialize all states, but during
> suspend/resume, drm_private_states for example are expected to be kept
> around.
>
> reset() also isn't fallible, which makes it harder to handle
> initialization errors properly. This is only really relevant for some
> drivers though, since all the helpers for reset only create a new
> state, and don't touch the hardware at all.
>
> It was thus decided to create a new hook that would allocate and
> initialize a pristine state without any side effect:
> atomic_create_state to untangle a bit some of it, and to separate the
> initialization with the actual reset one might need during a
> suspend/resume.
>
> Continue the transition to the new pattern with planes.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
> drivers/gpu/drm/drm_atomic_state_helper.c | 25 +++++++++++++++++++++++++
> drivers/gpu/drm/drm_mode_config.c | 31 ++++++++++++++++++++++++++++++-
> include/drm/drm_atomic_state_helper.h | 2 ++
> include/drm/drm_plane.h | 16 ++++++++++++++++
> 4 files changed, 73 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c
> index ee01700d4ca7..ab171bfe6e86 100644
> --- a/drivers/gpu/drm/drm_atomic_state_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_state_helper.c
> @@ -338,10 +338,35 @@ void drm_atomic_helper_plane_reset(struct drm_plane *plane)
> if (plane->state)
> __drm_atomic_helper_plane_reset(plane, plane->state);
> }
> EXPORT_SYMBOL(drm_atomic_helper_plane_reset);
>
> +/**
> + * drm_atomic_helper_plane_create_state - default &drm_plane_funcs.atomic_create_state hook for planes
> + * @plane: plane object
> + *
> + * Allocates and initializes pristine @drm_plane_state.
> + *
> + * This is useful for drivers that don't subclass @drm_plane_state.
> + *
> + * RETURNS:
> + * Pointer to new plane state, or ERR_PTR on failure.
> + */
> +struct drm_plane_state *drm_atomic_helper_plane_create_state(struct drm_plane *plane)
> +{
> + struct drm_plane_state *state;
> +
> + state = kzalloc_obj(*state);
> + if (!state)
> + return ERR_PTR(-ENOMEM);
> +
> + __drm_atomic_helper_plane_state_init(state, plane);
> +
> + return state;
> +}
> +EXPORT_SYMBOL(drm_atomic_helper_plane_create_state);
> +
> /**
> * __drm_atomic_helper_plane_duplicate_state - copy atomic plane state
> * @plane: plane object
> * @state: atomic plane state
> *
> diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
> index c33382a38191..fa609357858f 100644
> --- a/drivers/gpu/drm/drm_mode_config.c
> +++ b/drivers/gpu/drm/drm_mode_config.c
> @@ -180,10 +180,36 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
> drm_connector_list_iter_end(&conn_iter);
>
> return ret;
> }
>
> +static int drm_mode_config_plane_create_state(struct drm_plane *plane)
> +{
> + struct drm_plane_state *plane_state;
> +
> + if (!plane->funcs->atomic_create_state)
> + return 0;
> +
> + plane_state = plane->funcs->atomic_create_state(plane);
> + if (IS_ERR(plane_state))
> + return PTR_ERR(plane_state);
> +
> + plane->state = plane_state;
> +
> + return 0;
> +}
> +
> +static int drm_mode_config_plane_reset_with_create_state(struct drm_plane *plane)
> +{
> + if (plane->state) {
> + plane->funcs->atomic_destroy_state(plane, plane->state);
> + plane->state = NULL;
> + }
> +
> + return drm_mode_config_plane_create_state(plane);
> +}
> +
> /**
> * drm_mode_config_reset - call ->reset callbacks
> * @dev: drm device
> *
> * This functions calls all the crtc's, encoder's and connector's ->reset
> @@ -204,13 +230,16 @@ void drm_mode_config_reset(struct drm_device *dev)
> struct drm_connector_list_iter conn_iter;
>
> drm_for_each_colorop(colorop, dev)
> drm_colorop_reset(colorop);
>
> - drm_for_each_plane(plane, dev)
> + drm_for_each_plane(plane, dev) {
> if (plane->funcs->reset)
> plane->funcs->reset(plane);
> + else if (plane->funcs->atomic_create_state)
> + drm_mode_config_plane_reset_with_create_state(plane);
> + }
>
> drm_for_each_crtc(crtc, dev)
> if (crtc->funcs->reset)
> crtc->funcs->reset(crtc);
>
> diff --git a/include/drm/drm_atomic_state_helper.h b/include/drm/drm_atomic_state_helper.h
> index 691c1ccfa4e0..8d1ef268fdef 100644
> --- a/include/drm/drm_atomic_state_helper.h
> +++ b/include/drm/drm_atomic_state_helper.h
> @@ -53,10 +53,12 @@ void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state);
> void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,
> struct drm_crtc_state *state);
>
> void __drm_atomic_helper_plane_state_init(struct drm_plane_state *state,
> struct drm_plane *plane);
> +struct drm_plane_state *
> +drm_atomic_helper_plane_create_state(struct drm_plane *plane);
> void __drm_atomic_helper_plane_reset(struct drm_plane *plane,
> struct drm_plane_state *state);
> void drm_atomic_helper_plane_reset(struct drm_plane *plane);
> void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
> struct drm_plane_state *state);
> diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
> index 419c88c873a6..2c5a5a70a71b 100644
> --- a/include/drm/drm_plane.h
> +++ b/include/drm/drm_plane.h
> @@ -386,10 +386,26 @@ struct drm_plane_funcs {
> * 0 on success or a negative error code on failure.
> */
> int (*set_property)(struct drm_plane *plane,
> struct drm_property *property, uint64_t val);
>
> + /**
> + * @atomic_create_state:
> + *
> + * Allocate a pristine, initialized, state for the plane object
> + * and return it. This callback must have no side effects: in
> + * particular, the returned state must not be assigned to the
> + * object's state pointer and it must not affect the hardware
> + * state.
> + *
> + * RETURNS:
> + *
> + * A new, pristine, plane state instance or an error pointer
> + * on failure.
> + */
> + struct drm_plane_state *(*atomic_create_state)(struct drm_plane *plane);
> +
> /**
> * @atomic_duplicate_state:
> *
> * Duplicate the current atomic state for this plane and return it.
> * The core and helpers guarantee that any atomic state duplicated with
>
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
^ permalink raw reply
* Re: [PATCH] soc: imx8m: Fix match data lookup for soc device
From: Richard Leitner @ 2026-05-26 9:07 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Greg Kroah-Hartman, Rob Herring (Arm), Bartosz Golaszewski, imx,
linux-arm-kernel, linux-kernel, Peng Fan
In-Reply-To: <20260427-soc-imx8m-fix-v1-1-1fe5b43d8090@nxp.com>
On Mon, Apr 27, 2026 at 09:01:48AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> The i.MX8M soc device is registered via platform_device_register_simple(),
> so it is not associated with a Device Tree node and the imx8m_soc_driver
> has no of_match_table.
>
> As a result, device_get_match_data() always returns NULL when probing
> the soc device.
>
> Retrieve the match data directly from the machine compatible using
> of_machine_get_match_data(imx8_soc_match), which provides the correct SoC
> data.
>
> Fixes: 2524b293a59e5 ("soc: imx8m: don't access of_root directly")
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Thanks for that fix!
Tested-by: Richard Leitner <richard.leitner@linux.dev> # i.MX8MP
regards;rl
> ---
> drivers/soc/imx/soc-imx8m.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c
> index 77763a107edbd11302017e3f61ecb4369fda1ab0..fc080e56f50d423b88a673181a6bc986eb4c1691 100644
> --- a/drivers/soc/imx/soc-imx8m.c
> +++ b/drivers/soc/imx/soc-imx8m.c
> @@ -247,7 +247,7 @@ static int imx8m_soc_probe(struct platform_device *pdev)
> if (ret)
> return ret;
>
> - data = device_get_match_data(dev);
> + data = of_machine_get_match_data(imx8_soc_match);
> if (data) {
> soc_dev_attr->soc_id = data->name;
> ret = imx8m_soc_prepare(pdev, data->ocotp_compatible);
>
> ---
> base-commit: 70c8a7ec6715b5fb14e501731b5b9210a16684f7
> change-id: 20260424-soc-imx8m-fix-90d7ce2397f5
>
> Best regards,
> --
> Peng Fan <peng.fan@nxp.com>
>
>
^ permalink raw reply
* Re: [PATCH v5 05/19] drm/mode-config: Document drm_private_obj exclusion from drm_mode_config_reset()
From: Thomas Zimmermann @ 2026-05-26 9:05 UTC (permalink / raw)
To: Maxime Ripard, Maarten Lankhorst, David Airlie, Simona Vetter,
Jonathan Corbet, Shuah Khan, Dmitry Baryshkov, Jyri Sarha,
Tomi Valkeinen, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Simon Ser,
Harry Wentland, Melissa Wen, Sebastian Wick, Alex Hung,
Jani Nikula, Rodrigo Vivi, Joonas Lahtinen, Tvrtko Ursulin,
Chen-Yu Tsai, Samuel Holland, Dave Stevenson, Maíra Canal,
Raspberry Pi Kernel Maintenance
Cc: dri-devel, linux-doc, linux-kernel, Daniel Stone, intel-gfx,
intel-xe, linux-arm-kernel, linux-sunxi, Laurent Pinchart
In-Reply-To: <20260519-drm-mode-config-init-v5-5-388b03321e38@kernel.org>
Am 19.05.26 um 11:01 schrieb Maxime Ripard:
> drm_mode_config_reset() does not reset drm_private_states by design.
>
> This is especially significant for the DP MST and tunneling code that
> expect to be preserved across a suspend/resume cycle, where
> drm_mode_config_reset() is also used.
>
> Document this expectation.
>
> Link: https://lore.kernel.org/dri-devel/aOaQLx-7EpsHRwkH@ideak-desk/
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
> drivers/gpu/drm/drm_mode_config.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
> index 66f7dc37b597..c33382a38191 100644
> --- a/drivers/gpu/drm/drm_mode_config.c
> +++ b/drivers/gpu/drm/drm_mode_config.c
> @@ -187,10 +187,14 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
> * @dev: drm device
> *
> * This functions calls all the crtc's, encoder's and connector's ->reset
> * callback. Drivers can use this in e.g. their driver load or resume code to
> * reset hardware and software state.
> + *
> + * Note that &drm_private_obj structures are expected to be stable across
> + * suspend/resume cycles, and drm_mode_config_reset() does not affect these
> + * structures.
> */
> void drm_mode_config_reset(struct drm_device *dev)
> {
> struct drm_crtc *crtc;
> struct drm_colorop *colorop;
>
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
^ permalink raw reply
* Re: [PATCH v5 04/19] drm/atomic: Expand atomic_create_state expectations for drm_private_obj
From: Thomas Zimmermann @ 2026-05-26 9:03 UTC (permalink / raw)
To: Maxime Ripard, Maarten Lankhorst, David Airlie, Simona Vetter,
Jonathan Corbet, Shuah Khan, Dmitry Baryshkov, Jyri Sarha,
Tomi Valkeinen, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Simon Ser,
Harry Wentland, Melissa Wen, Sebastian Wick, Alex Hung,
Jani Nikula, Rodrigo Vivi, Joonas Lahtinen, Tvrtko Ursulin,
Chen-Yu Tsai, Samuel Holland, Dave Stevenson, Maíra Canal,
Raspberry Pi Kernel Maintenance
Cc: dri-devel, linux-doc, linux-kernel, Daniel Stone, intel-gfx,
intel-xe, linux-arm-kernel, linux-sunxi, Laurent Pinchart
In-Reply-To: <20260519-drm-mode-config-init-v5-4-388b03321e38@kernel.org>
Am 19.05.26 um 11:01 schrieb Maxime Ripard:
> The atomic_create_state callback documentation for planes, CRTCs, and
> connectors explicitly states the expected behaviour: the returned
> state must not be assigned to the object's state pointer, and hardware
> must not be touched.
>
> The drm_private_state_funcs.atomic_create_state documentation is
> missing this clarification. Add it for consistency.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
> include/drm/drm_atomic.h | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
> index 1a80a8cdf269..88087910ab1a 100644
> --- a/include/drm/drm_atomic.h
> +++ b/include/drm/drm_atomic.h
> @@ -263,11 +263,14 @@ struct drm_private_state;
> struct drm_private_state_funcs {
> /**
> * @atomic_create_state:
> *
> * Allocates a pristine, initialized, state for the private
> - * object and returns it.
> + * object and returns it. This callback must have no side
> + * effects: in particular, the returned state must not be
> + * assigned to the object's state pointer and it must not affect
> + * the hardware state.
> *
> * RETURNS:
> *
> * A new, pristine, private state instance or an error pointer
> * on failure.
>
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
^ permalink raw reply
* Re: [PATCH v5 03/19] drm/atomic: Drop drm_private_obj.state assignment from create_state
From: Thomas Zimmermann @ 2026-05-26 9:03 UTC (permalink / raw)
To: Maxime Ripard, Maarten Lankhorst, David Airlie, Simona Vetter,
Jonathan Corbet, Shuah Khan, Dmitry Baryshkov, Jyri Sarha,
Tomi Valkeinen, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Simon Ser,
Harry Wentland, Melissa Wen, Sebastian Wick, Alex Hung,
Jani Nikula, Rodrigo Vivi, Joonas Lahtinen, Tvrtko Ursulin,
Chen-Yu Tsai, Samuel Holland, Dave Stevenson, Maíra Canal,
Raspberry Pi Kernel Maintenance
Cc: dri-devel, linux-doc, linux-kernel, Daniel Stone, intel-gfx,
intel-xe, linux-arm-kernel, linux-sunxi, Laurent Pinchart
In-Reply-To: <20260519-drm-mode-config-init-v5-3-388b03321e38@kernel.org>
Am 19.05.26 um 11:01 schrieb Maxime Ripard:
> The initial intent of the atomic_create_state hook was to simply
> allocate a proper drm_private_state and return it, without any side
> effect.
>
> However, __drm_atomic_helper_private_obj_create_state(), which most
> atomic_create_state implementations call, introduces a side effect by
> setting drm_private_obj.state to the newly allocated state.
>
> This assignment defeats the purpose, but is also redundant since
> drm_atomic_private_obj_init(), the only call site for the
> atomic_create_state hook, will also set this pointer to the newly
> allocated state.
>
> Drop the assignment in __drm_atomic_helper_private_obj_create_state().
>
> Fixes: e7be39ed1716 ("drm/atomic-helper: Add private_obj atomic_create_state helper")
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
> drivers/gpu/drm/drm_atomic_state_helper.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c
> index cc70508d4fdb..a82568d87e4f 100644
> --- a/drivers/gpu/drm/drm_atomic_state_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_state_helper.c
> @@ -729,12 +729,10 @@ EXPORT_SYMBOL(drm_atomic_helper_connector_destroy_state);
> void __drm_atomic_helper_private_obj_create_state(struct drm_private_obj *obj,
> struct drm_private_state *state)
> {
> if (state)
> state->obj = obj;
> -
> - obj->state = state;
> }
> EXPORT_SYMBOL(__drm_atomic_helper_private_obj_create_state);
>
> /**
> * __drm_atomic_helper_private_obj_duplicate_state - copy atomic private state
>
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
^ permalink raw reply
* RE: [PATCH v2 0/2] i2c: imx: fix SMBus block-read of 0 locking the bus
From: Carlos Song (OSS) @ 2026-05-26 9:00 UTC (permalink / raw)
To: Vincent Jardin, Carlos Song (OSS)
Cc: Oleksij Rempel, Pengutronix Kernel Team, Andi Shyti, Frank Li,
Sascha Hauer, Fabio Estevam, Wolfram Sang, Kaushal Butala,
Shawn Guo, Stefan Eichenberger, linux-i2c@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
In-Reply-To: <ahVV1X_cdhHDmRwc@L30177.local>
> -----Original Message-----
> From: Vincent Jardin <vjardin@free.fr>
> Sent: Tuesday, May 26, 2026 4:12 PM
> To: Carlos Song (OSS) <carlos.song@oss.nxp.com>
> Cc: Oleksij Rempel <o.rempel@pengutronix.de>; Pengutronix Kernel Team
> <kernel@pengutronix.de>; Andi Shyti <andi.shyti@kernel.org>; Frank Li
> <frank.li@nxp.com>; Sascha Hauer <s.hauer@pengutronix.de>; Fabio
> Estevam <festevam@gmail.com>; Wolfram Sang <wsa@kernel.org>; Kaushal
> Butala <kaushalkernelmailinglist@gmail.com>; Shawn Guo
> <shawn.guo@freescale.com>; Stefan Eichenberger
> <stefan.eichenberger@toradex.com>; linux-i2c@vger.kernel.org;
> imx@lists.linux.dev; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; stable@vger.kernel.org
> Subject: Re: [PATCH v2 0/2] i2c: imx: fix SMBus block-read of 0 locking the bus
>
> [You don't often get email from vjardin@free.fr. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> Hi Carlos,
>
> > Thanks for working on this fix, this looks good to me.
>
> thanks for checking it. It took some times to isolate this issue and then find a
> fix.
>
> > SMBus block reads with a length of 0 seem quite uncommon in practice.
> > Was this triggered by a specific device behavior, or mainly found
> > during boundary / compliance testing?
>
> It is trigger by the usage of a mpq8785 on the i2c bus: when the kernel
> attaches on it using its pmsbus/hwmon framework, then the i2c bus get
> locked on lx2160 !
>
> > Regarding the handling of len == 0,
> > I see that the patch sets:
> >
> > msg->buf[0] = 0;
> > msg->len = 2;
> >
> > It relies on the last-byte STOP handling together with TXAK. It will
> > help I2C-IMX generate NACK + STOP and release the bus, right?
>
> Yes, exactly. Reading I2DR for the length byte has already armed the next byte,
> so we set TXAK to NACK it and extend msg->len to 2.
> Next then i2c_imx_isr_read_continue() at msg_buf_idx == msg->len - 1, ie the
> normal last-byte path, which clears MSTA to emit STOP. So NACK + STOP, and
> THEN the bus is released. I do not see any other means to handle it.
>
> > len = 0 is a legal behavior, So it go into a successful path.
>
> Yes. count == 0 is legal (SMBus 3.1 6.5.7), so the transfer reaches
> STATE_DONE and returns success.
>
> > But len > I2C_SMBUS_BLOCK_MAX is abnormal behavior. So it go into a fail
> path.
>
> Correct, and it is a protocol error, so it needs to end up with a -EPROTO while
> a count of 0 is an ok case.
>
> > Do I understand it right?
>
> yes. I do not see any other means to handle it.
>
> > Also, if possible could you briefly describe how you validated this
> > change (e.g. test setup or steps, with and without the fix)?
>
> On a lx2160a board, on its i2c, bind a mpq8785, and enable the Kernel
> pmbus/hwmon framework, then the i2c bus becomes un-useable. Using a
> scope, we can confirm that the lx21260a i2c cannot recover.
>
Hi, Vincent
Thank you very much!
Acked-by: Carlos Song <carlos.song@nxp.com>
> Best regards,
> Vincent
^ permalink raw reply
* Re: [PATCH v5 01/19] drm/atomic: Document atomic commit lifetime
From: Thomas Zimmermann @ 2026-05-26 8:59 UTC (permalink / raw)
To: Maxime Ripard, Maarten Lankhorst, David Airlie, Simona Vetter,
Jonathan Corbet, Shuah Khan, Dmitry Baryshkov, Jyri Sarha,
Tomi Valkeinen, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Simon Ser,
Harry Wentland, Melissa Wen, Sebastian Wick, Alex Hung,
Jani Nikula, Rodrigo Vivi, Joonas Lahtinen, Tvrtko Ursulin,
Chen-Yu Tsai, Samuel Holland, Dave Stevenson, Maíra Canal,
Raspberry Pi Kernel Maintenance
Cc: dri-devel, linux-doc, linux-kernel, Daniel Stone, intel-gfx,
intel-xe, linux-arm-kernel, linux-sunxi, Laurent Pinchart
In-Reply-To: <20260519-drm-mode-config-init-v5-1-388b03321e38@kernel.org>
Hi,
I left a number of comments on the style of writing. Apart from that,
it's great to have the lifetime documented.
Am 19.05.26 um 11:01 schrieb Maxime Ripard:
> How drm_atomic_commit and the various entity structures are allocated
> and freed isn't really trivial. Document it.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Maxime Ripard <mripard@kernel.org>
> ---
> Documentation/gpu/drm-kms.rst | 6 +++++
> drivers/gpu/drm/drm_atomic.c | 58 +++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 64 insertions(+)
>
> diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
> index d22817fdf9aa..36d76e391074 100644
> --- a/Documentation/gpu/drm-kms.rst
> +++ b/Documentation/gpu/drm-kms.rst
> @@ -282,10 +282,16 @@ structure, ordering of committing state changes to hardware is sequenced using
> :c:type:`struct drm_crtc_commit <drm_crtc_commit>`.
>
> Read on in this chapter, and also in :ref:`drm_atomic_helper` for more detailed
> coverage of specific topics.
>
> +Atomic State Lifetime
> +---------------------
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_atomic.c
> + :doc: state lifetime
> +
> Handling Driver Private State
> -----------------------------
>
> .. kernel-doc:: drivers/gpu/drm/drm_atomic.c
> :doc: handling driver private state
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 170de30c28ae..d98586d89bbe 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -45,10 +45,68 @@
> #include <drm/drm_colorop.h>
>
> #include "drm_crtc_internal.h"
> #include "drm_internal.h"
>
> +/**
> + * DOC: state lifetime
> + *
> + * &struct drm_atomic_commit represents an update to video pipeline
I'd say 'modeset pipeline'. Video sounds too much like V4L.
> + * state. It's a transient object that holds a state update as a
> + * collection of pointers to individual objects' states. &struct
> + * drm_atomic_commit has a much shorter lifetime than the objects'
> + * states, since it's only allocated while preparing, checking or
> + * committing the update, while object states are allocated when
> + * preparing the update and kept alive as long as they are active in the
> + * device.
> + *
> + * Their respective lifetimes are:
> + *
> + * - at reset time, the object reset implementation will allocate a new
> + * default state and will store it in the object state pointer.
Using present seems more natural, e.g., 'allocates' and 'stores'
> + *
> + * - whenever a new update is needed:
> + *
> + * + A new &struct drm_atomic_commit is allocated using
> + * drm_atomic_commit_alloc().
Active form: "drm_atomic_commit_alloc() allocates a new instance of
struct drm_atomic_commit."
IIRC the '&' needs to go before drm_atomic_commit.
> + *
> + * + The current active state of all entities affected by the update
> + * is copied into this new &struct drm_atomic_commit using
> + * drm_atomic_get_plane_state(), drm_atomic_get_crtc_state(),
> + * drm_atomic_get_connector_state(), or
> + * drm_atomic_get_private_obj_state(). This new state can then be
> + * modified.
Again use active form. Mention which helper invokes the copying. I
assume it's drm_atomic_commit_alloc() or the UAPI entry points.
> + *
> + * At that point, &struct drm_atomic_commit stores three state
> + * pointers for any affected entity: the "old" and "new" states, and
> + * state_to_destroy. The old state is the state currently active in
> + * the hardware, which is either the one initialized by reset() or a
> + * newer one if a commit has been made. The new state is the state
> + * we just allocated and we might eventually commit to the hardware.
> + * The state_to_destroy points to the state we'll eventually have to
> + * free when the drm_atomic_commit will be destroyed, and points to
> + * the new state for now since the old state is still the active
> + * state.
Ok, sounds good.
> + *
> + * + After the state is populated, it is checked. If the check is
You mean, it populated the new commit with the updated states?
Where does the check happen?
Again, use active form. Like: 'After ... populated the new commit with
the updated states, it checks by invoking atomic_check of all involved
pipeline stages."
> + * successful, the update is committed. Part of the commit is a call
Active form: "successful, ... commits the update."
> + * to drm_atomic_helper_swap_state() which will turn the new states
> + * into the active states. Doing so involves updating the object's
> + * state pointer (&drm_crtc.state or similar) to point to the new
> + * state, and state_to_destroy will now point to the old states,
> + * that used to be active but aren't anymore.
The final sentence ""Doing so..." is serviceable. For splendid writing,
you could write somethink like "After swapping states, each object's
state pointer refers to the formerly new state. The state_to_destroy
pointer refers to the formerly old state."
> + *
> + * + When the commit is done, and when all references to our &struct
> + * drm_atomic_commit are put, __drm_atomic_commit_free() is called.
Active form: "After commiting the new state to hardware, ... puts all
references to strut drm_atomic_commit and calls __drm_atomic_commit_free()".
> + * It will, in turn, call drm_atomic_commit_clear() that will free
Present form: "It calls ... the frees ... and ...."
Best regards
Thomas
> + * all state_to_destroy (ie. old states), and finally free &struct
> + * drm_atomic_commit instance.
> + *
> + * + Now, we don't have any active &struct drm_atomic_commit anymore,
> + * and only the entity active states remain allocated.
> + */
> +
> void __drm_crtc_commit_free(struct kref *kref)
> {
> struct drm_crtc_commit *commit =
> container_of(kref, struct drm_crtc_commit, ref);
>
>
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
^ permalink raw reply
* Re: [PATCH] ARM: zte: clean up zx297520v3 doc. warnings
From: Stefan Dösinger @ 2026-05-26 8:58 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel, linux-doc; +Cc: linux-arm-kernel, Randy Dunlap
In-Reply-To: <ca29c0fe-8725-4cc2-8f4f-db3f80ccafed@infradead.org>
[-- Attachment #1: Type: text/plain, Size: 487 bytes --]
Am Samstag, 23. Mai 2026, 00:20:35 Ostafrikanische Zeit schrieb Randy Dunlap:
> The same way that this commit was merged:
> commit 220ae5d36dba
> Author: Stefan Dösinger <stefandoesinger@gmail.com>
> Date: Tue Jan 27 20:52:08 2026 +0300
> ARM: zte: Add zx297520v3 platform support
>
> I guess to the soc list.
I sent it to the SoC list with my SoB: https://lore.kernel.org/soc/
1991560.tdWV9SEqCh@strix/T/#u . I hope that's what you had in mind.
Cheers,
Stefan
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[-- Type: application/pgp-signature, Size: 870 bytes --]
^ permalink raw reply
* [PATCH v9 3/3] media: nxp: Add i.MX95 CSI pixel formatter v4l2 driver
From: Guoniu Zhou @ 2026-05-26 8:57 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Frank Li, Abel Vesa, Peng Fan,
Michael Turquette, Stephen Boyd
Cc: imx, linux-media, devicetree, linux-arm-kernel, linux-kernel,
linux-clk, Guoniu Zhou, Frank Li
In-Reply-To: <20260526-csi_formatter-v9-0-ca3d8c334c39@oss.nxp.com>
From: Guoniu Zhou <guoniu.zhou@nxp.com>
The CSI pixel formatter is a module found on i.MX95 used to reformat
packet info, pixel and non-pixel data from CSI-2 host controller to
match Pixel Link(PL) definition.
Add data formatting support.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
Changes in v8:
- Remove fmt field and look up format from subdev state instead
- Unify function and structure naming to use csi_formatter_ prefix
- Remove misleading alignment comment from set_fmt function
- Optimize get_frame_desc to call once per start_stream
- Replace V4L2_FRAME_DESC_ENTRY_MAX with CSI_FORMATTER_VC_NUM in loops
- Remove redundant debug message in enable_streams
- Use MEDIA_PAD_FL_MUST_CONNECT flag instead of manual link check
- Fix typo: Formater -> Formatter in Kconfig help text
- Improve grammar in data type index mapping comment
Changes in v7:
- Update references from imx9 to imx95 for consistency with dt-bindings
- Enable PM runtime before async registration
Changes in v6:
- Remove unused header includes
- Unify macro naming: VCx/VCX -> VC and parameter x -> vc
- Remove unused format field from csi_formatter struct
- Use compact initialization for formats array
- Make find_csi_format() return NULL instead of default format
- Use unsigned int for array index in find_csi_format()
- Add err_ prefix to error handling labels
- Add v4l2_subdev_cleanup() and reorder cleanup sequence
- Update enable_streams debug output format
- Rename VC_MAX to VC_NUM and fix boundary check
- Update CSI formatter Kconfig description
- Use v4l2_subdev_get_frame_desc_passthrough() helper
- Fix error paths in async registration and probe
- Add mutex to protect enabled_streams
- Switch to devm_pm_runtime_enable()
- Remove redundant num_routes check in set_routing
- Optimize get_index_by_dt() and add warning for unsupported type
- csi_formatter_start/stop_stream: Process all streams in mask
---
MAINTAINERS | 8 +
drivers/media/platform/nxp/Kconfig | 14 +
drivers/media/platform/nxp/Makefile | 1 +
drivers/media/platform/nxp/imx95-csi-formatter.c | 758 +++++++++++++++++++++++
4 files changed, 781 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3124500ff432..5229b75d930a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19269,6 +19269,14 @@ S: Maintained
F: Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
F: drivers/media/platform/nxp/imx-jpeg
+NXP i.MX 95 CSI PIXEL FORMATTER V4L2 DRIVER
+M: Guoniu Zhou <guoniu.zhou@nxp.com>
+L: imx@lists.linux.dev
+L: linux-media@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
+F: drivers/media/platform/nxp/imx95-csi-formatter.c
+
NXP i.MX CLOCK DRIVERS
M: Abel Vesa <abelvesa@kernel.org>
R: Peng Fan <peng.fan@nxp.com>
diff --git a/drivers/media/platform/nxp/Kconfig b/drivers/media/platform/nxp/Kconfig
index 40e3436669e2..1eccf128d149 100644
--- a/drivers/media/platform/nxp/Kconfig
+++ b/drivers/media/platform/nxp/Kconfig
@@ -28,6 +28,20 @@ config VIDEO_IMX8MQ_MIPI_CSI2
Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
SoC.
+config VIDEO_IMX95_CSI_FORMATTER
+ tristate "NXP i.MX95 CSI Pixel Formatter driver"
+ depends on ARCH_MXC || COMPILE_TEST
+ depends on VIDEO_DEV
+ select MEDIA_CONTROLLER
+ select V4L2_FWNODE
+ select VIDEO_V4L2_SUBDEV_API
+ help
+ This driver provides support for the CSI Pixel Formatter found on
+ i.MX95 series SoCs. This module unpacks the pixels received from the
+ CSI-2 interface and reformats them to meet pixel link requirements.
+
+ Say Y here to enable CSI Pixel Formatter module for i.MX95 SoC.
+
config VIDEO_IMX_MIPI_CSIS
tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models"
depends on ARCH_MXC || COMPILE_TEST
diff --git a/drivers/media/platform/nxp/Makefile b/drivers/media/platform/nxp/Makefile
index 4d90eb713652..6410115d870e 100644
--- a/drivers/media/platform/nxp/Makefile
+++ b/drivers/media/platform/nxp/Makefile
@@ -6,6 +6,7 @@ obj-y += imx8-isi/
obj-$(CONFIG_VIDEO_IMX7_CSI) += imx7-media-csi.o
obj-$(CONFIG_VIDEO_IMX8MQ_MIPI_CSI2) += imx8mq-mipi-csi2.o
+obj-$(CONFIG_VIDEO_IMX95_CSI_FORMATTER) += imx95-csi-formatter.o
obj-$(CONFIG_VIDEO_IMX_MIPI_CSIS) += imx-mipi-csis.o
obj-$(CONFIG_VIDEO_IMX_PXP) += imx-pxp.o
obj-$(CONFIG_VIDEO_MX2_EMMAPRP) += mx2_emmaprp.o
diff --git a/drivers/media/platform/nxp/imx95-csi-formatter.c b/drivers/media/platform/nxp/imx95-csi-formatter.c
new file mode 100644
index 000000000000..9dee38d85839
--- /dev/null
+++ b/drivers/media/platform/nxp/imx95-csi-formatter.c
@@ -0,0 +1,758 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2025 NXP
+ */
+
+#include <linux/bits.h>
+#include <linux/clk.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+
+#include <media/mipi-csi2.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-mc.h>
+#include <media/v4l2-subdev.h>
+
+/* CSI Pixel Formatter registers map */
+
+#define CSI_VC_INTERLACED_LINE_CNT(vc) (0x00 + (vc) * 0x04)
+#define INTERLACED_ODD_LINE_CNT_SET(x) FIELD_PREP(GENMASK(13, 0), (x))
+#define INTERLACED_EVEN_LINE_CNT_SET(x) FIELD_PREP(GENMASK(29, 16), (x))
+
+#define CSI_VC_INTERLACED_CTRL 0x20
+
+#define CSI_VC_INTERLACED_ERR 0x24
+#define CSI_VC_ERR_MASK GENMASK(7, 0)
+#define CSI_VC_ERR(vc) BIT((vc))
+
+#define CSI_VC_YUV420_FIRST_LINE_EVEN 0x28
+#define YUV420_FIRST_LINE_EVEN(vc) BIT((vc))
+
+#define CSI_RAW32_CTRL 0x30
+#define CSI_VC_RAW32_MODE(vc) BIT((vc))
+#define CSI_VC_RAW32_SWAP_MODE(vc) BIT((vc) + 8)
+
+#define CSI_STREAM_FENCING_CTRL 0x34
+#define CSI_VC_STREAM_FENCING(vc) BIT((vc))
+#define CSI_VC_STREAM_FENCING_RST(vc) BIT((vc) + 8)
+
+#define CSI_STREAM_FENCING_STS 0x38
+#define CSI_STREAM_FENCING_STS_MASK GENMASK(7, 0)
+
+#define CSI_VC_NON_PIXEL_DATA_TYPE(vc) (0x40 + (vc) * 0x04)
+
+#define CSI_VC_PIXEL_DATA_CTRL(vc) (0x60 + (vc) * 0x04)
+#define NEW_VC(vc) FIELD_PREP(GENMASK(3, 1), vc)
+#define REROUTE_VC_ENABLE BIT(0)
+
+#define CSI_VC_ROUTE_PIXEL_DATA_TYPE(vc) (0x80 + (vc) * 0x04)
+
+#define CSI_VC_NON_PIXEL_DATA_CTRL(vc) (0xa0 + (vc) * 0x04)
+
+#define CSI_VC_PIXEL_DATA_TYPE(vc) (0xc0 + (vc) * 0x04)
+
+#define CSI_VC_PIXEL_DATA_TYPE_ERR(vc) (0xe0 + (vc) * 0x04)
+
+#define CSI_FORMATTER_PAD_SINK 0
+#define CSI_FORMATTER_PAD_SOURCE 1
+#define CSI_FORMATTER_PAD_NUM 2
+
+#define CSI_FORMATTER_VC_NUM 8 /* Number of virtual channels */
+
+struct csi_formatter_pix_format {
+ u32 code;
+ u32 data_type;
+};
+
+struct csi_formatter {
+ struct device *dev;
+ struct regmap *regs;
+ struct clk *clk;
+
+ struct v4l2_subdev sd;
+ struct v4l2_subdev *csi_sd;
+ struct v4l2_async_notifier notifier;
+ struct media_pad pads[CSI_FORMATTER_PAD_NUM];
+
+ u32 remote_pad;
+ u32 reg_offset;
+
+ /* Protects enabled_streams */
+ struct mutex lock;
+ u64 enabled_streams;
+};
+
+struct csi_formatter_dt_index {
+ u8 dtype;
+ u8 index;
+};
+
+/*
+ * The index corresponds to the bit index in the register that enables
+ * the data type of pixel data transported by the Formatter.
+ */
+static const struct csi_formatter_dt_index formatter_dt_to_index_map[] = {
+ { .dtype = MIPI_CSI2_DT_YUV420_8B, .index = 0 },
+ { .dtype = MIPI_CSI2_DT_YUV420_8B_LEGACY, .index = 2 },
+ { .dtype = MIPI_CSI2_DT_YUV422_8B, .index = 6 },
+ { .dtype = MIPI_CSI2_DT_RGB444, .index = 8 },
+ { .dtype = MIPI_CSI2_DT_RGB555, .index = 9 },
+ { .dtype = MIPI_CSI2_DT_RGB565, .index = 10 },
+ { .dtype = MIPI_CSI2_DT_RGB666, .index = 11 },
+ { .dtype = MIPI_CSI2_DT_RGB888, .index = 12 },
+ { .dtype = MIPI_CSI2_DT_RAW6, .index = 16 },
+ { .dtype = MIPI_CSI2_DT_RAW7, .index = 17 },
+ { .dtype = MIPI_CSI2_DT_RAW8, .index = 18 },
+ { .dtype = MIPI_CSI2_DT_RAW10, .index = 19 },
+ { .dtype = MIPI_CSI2_DT_RAW12, .index = 20 },
+ { .dtype = MIPI_CSI2_DT_RAW14, .index = 21 },
+ { .dtype = MIPI_CSI2_DT_RAW16, .index = 22 },
+};
+
+static const struct csi_formatter_pix_format formats[] = {
+ /* YUV formats */
+ { MEDIA_BUS_FMT_UYVY8_1X16, MIPI_CSI2_DT_YUV422_8B },
+ /* RGB formats */
+ { MEDIA_BUS_FMT_RGB565_1X16, MIPI_CSI2_DT_RGB565 },
+ { MEDIA_BUS_FMT_RGB888_1X24, MIPI_CSI2_DT_RGB888 },
+ /* RAW (Bayer and greyscale) formats */
+ { MEDIA_BUS_FMT_SBGGR8_1X8, MIPI_CSI2_DT_RAW8 },
+ { MEDIA_BUS_FMT_SGBRG8_1X8, MIPI_CSI2_DT_RAW8 },
+ { MEDIA_BUS_FMT_SGRBG8_1X8, MIPI_CSI2_DT_RAW8 },
+ { MEDIA_BUS_FMT_SRGGB8_1X8, MIPI_CSI2_DT_RAW8 },
+ { MEDIA_BUS_FMT_Y8_1X8, MIPI_CSI2_DT_RAW8 },
+ { MEDIA_BUS_FMT_SBGGR10_1X10, MIPI_CSI2_DT_RAW10 },
+ { MEDIA_BUS_FMT_SGBRG10_1X10, MIPI_CSI2_DT_RAW10 },
+ { MEDIA_BUS_FMT_SGRBG10_1X10, MIPI_CSI2_DT_RAW10 },
+ { MEDIA_BUS_FMT_SRGGB10_1X10, MIPI_CSI2_DT_RAW10 },
+ { MEDIA_BUS_FMT_Y10_1X10, MIPI_CSI2_DT_RAW10 },
+ { MEDIA_BUS_FMT_SBGGR12_1X12, MIPI_CSI2_DT_RAW12 },
+ { MEDIA_BUS_FMT_SGBRG12_1X12, MIPI_CSI2_DT_RAW12 },
+ { MEDIA_BUS_FMT_SGRBG12_1X12, MIPI_CSI2_DT_RAW12 },
+ { MEDIA_BUS_FMT_SRGGB12_1X12, MIPI_CSI2_DT_RAW12 },
+ { MEDIA_BUS_FMT_Y12_1X12, MIPI_CSI2_DT_RAW12 },
+ { MEDIA_BUS_FMT_SBGGR14_1X14, MIPI_CSI2_DT_RAW14 },
+ { MEDIA_BUS_FMT_SGBRG14_1X14, MIPI_CSI2_DT_RAW14 },
+ { MEDIA_BUS_FMT_SGRBG14_1X14, MIPI_CSI2_DT_RAW14 },
+ { MEDIA_BUS_FMT_SRGGB14_1X14, MIPI_CSI2_DT_RAW14 },
+ { MEDIA_BUS_FMT_SBGGR16_1X16, MIPI_CSI2_DT_RAW16 },
+ { MEDIA_BUS_FMT_SGBRG16_1X16, MIPI_CSI2_DT_RAW16 },
+ { MEDIA_BUS_FMT_SGRBG16_1X16, MIPI_CSI2_DT_RAW16 },
+ { MEDIA_BUS_FMT_SRGGB16_1X16, MIPI_CSI2_DT_RAW16 },
+};
+
+static const struct v4l2_mbus_framefmt formatter_default_fmt = {
+ .code = MEDIA_BUS_FMT_UYVY8_1X16,
+ .width = 1920U,
+ .height = 1080U,
+ .field = V4L2_FIELD_NONE,
+ .colorspace = V4L2_COLORSPACE_SMPTE170M,
+ .xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SMPTE170M),
+ .ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SMPTE170M),
+ .quantization = V4L2_QUANTIZATION_LIM_RANGE,
+};
+
+static const struct csi_formatter_pix_format *csi_formatter_find_format(u32 code)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(formats); i++)
+ if (code == formats[i].code)
+ return &formats[i];
+
+ return NULL;
+}
+
+/* -----------------------------------------------------------------------------
+ * V4L2 subdev operations
+ */
+
+static inline struct csi_formatter *sd_to_formatter(struct v4l2_subdev *sdev)
+{
+ return container_of(sdev, struct csi_formatter, sd);
+}
+
+static int __csi_formatter_subdev_set_routing(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *state,
+ struct v4l2_subdev_krouting *routing)
+{
+ int ret;
+
+ ret = v4l2_subdev_routing_validate(sd, routing,
+ V4L2_SUBDEV_ROUTING_ONLY_1_TO_1);
+ if (ret)
+ return ret;
+
+ return v4l2_subdev_set_routing_with_fmt(sd, state, routing,
+ &formatter_default_fmt);
+}
+
+static int csi_formatter_subdev_init_state(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *sd_state)
+{
+ struct v4l2_subdev_route routes[] = {
+ {
+ .sink_pad = CSI_FORMATTER_PAD_SINK,
+ .sink_stream = 0,
+ .source_pad = CSI_FORMATTER_PAD_SOURCE,
+ .source_stream = 0,
+ .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE,
+ },
+ };
+
+ struct v4l2_subdev_krouting routing = {
+ .num_routes = ARRAY_SIZE(routes),
+ .routes = routes,
+ };
+
+ return __csi_formatter_subdev_set_routing(sd, sd_state, &routing);
+}
+
+static int csi_formatter_subdev_enum_mbus_code(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *sd_state,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->pad == CSI_FORMATTER_PAD_SOURCE) {
+ struct v4l2_mbus_framefmt *fmt;
+
+ if (code->index > 0)
+ return -EINVAL;
+
+ fmt = v4l2_subdev_state_get_format(sd_state, code->pad,
+ code->stream);
+ code->code = fmt->code;
+ return 0;
+ }
+
+ if (code->index >= ARRAY_SIZE(formats))
+ return -EINVAL;
+
+ code->code = formats[code->index].code;
+
+ return 0;
+}
+
+static int csi_formatter_subdev_set_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *sd_state,
+ struct v4l2_subdev_format *sdformat)
+{
+ struct csi_formatter_pix_format const *format;
+ struct v4l2_mbus_framefmt *fmt;
+
+ if (sdformat->pad == CSI_FORMATTER_PAD_SOURCE)
+ return v4l2_subdev_get_fmt(sd, sd_state, sdformat);
+
+ format = csi_formatter_find_format(sdformat->format.code);
+ if (!format)
+ format = &formats[0];
+
+ v4l_bound_align_image(&sdformat->format.width, 1, 0xffff, 2,
+ &sdformat->format.height, 1, 0xffff, 0, 0);
+
+ fmt = v4l2_subdev_state_get_format(sd_state, sdformat->pad,
+ sdformat->stream);
+ *fmt = sdformat->format;
+
+ /* Set default code if user set an invalid value */
+ fmt->code = format->code;
+
+ /* Propagate the format from sink stream to source stream */
+ fmt = v4l2_subdev_state_get_opposite_stream_format(sd_state, sdformat->pad,
+ sdformat->stream);
+ if (!fmt)
+ return -EINVAL;
+
+ *fmt = sdformat->format;
+
+ return 0;
+}
+
+static int csi_formatter_subdev_set_routing(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *state,
+ enum v4l2_subdev_format_whence which,
+ struct v4l2_subdev_krouting *routing)
+{
+ if (which == V4L2_SUBDEV_FORMAT_ACTIVE &&
+ media_entity_is_streaming(&sd->entity))
+ return -EBUSY;
+
+ return __csi_formatter_subdev_set_routing(sd, state, routing);
+}
+
+static inline void csi_formatter_write(struct csi_formatter *formatter,
+ unsigned int reg, unsigned int value)
+{
+ u32 offset = formatter->reg_offset;
+
+ regmap_write(formatter->regs, reg + offset, value);
+}
+
+static u8 csi_formatter_get_index_by_dt(u8 data_type)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(formatter_dt_to_index_map); ++i) {
+ const struct csi_formatter_dt_index *entry =
+ &formatter_dt_to_index_map[i];
+
+ if (data_type == entry->dtype)
+ return entry->index;
+ }
+
+ pr_warn_once("Unsupported data type 0x%x, using default\n", data_type);
+
+ return formatter_dt_to_index_map[0].index;
+}
+
+static int csi_formatter_get_vc(struct csi_formatter *formatter,
+ struct v4l2_mbus_frame_desc *fd,
+ unsigned int stream)
+{
+ struct v4l2_mbus_frame_desc_entry *entry = NULL;
+ unsigned int i;
+ int vc;
+
+ for (i = 0; i < fd->num_entries; ++i) {
+ if (fd->entry[i].stream == stream) {
+ entry = &fd->entry[i];
+ break;
+ }
+ }
+
+ if (!entry) {
+ dev_err(formatter->dev,
+ "No frame desc entry for stream %u\n", stream);
+ return -EPIPE;
+ }
+
+ vc = entry->bus.csi2.vc;
+
+ if (vc < 0 || vc >= CSI_FORMATTER_VC_NUM) {
+ dev_err(formatter->dev, "Invalid virtual channel %d\n", vc);
+ return -EINVAL;
+ }
+
+ return vc;
+}
+
+static void csi_formatter_stop_stream(struct csi_formatter *formatter,
+ u64 stream_mask)
+{
+ unsigned int i;
+
+ for (i = 0; i < CSI_FORMATTER_VC_NUM; ++i) {
+ if (!(stream_mask & BIT(i)))
+ continue;
+
+ csi_formatter_write(formatter, CSI_VC_PIXEL_DATA_TYPE(i), 0);
+ }
+}
+
+static int csi_formatter_start_stream(struct csi_formatter *formatter,
+ struct v4l2_subdev_state *state,
+ u64 stream_mask)
+{
+ const struct csi_formatter_pix_format *pix_fmt;
+ struct v4l2_mbus_framefmt *fmt;
+ struct v4l2_mbus_frame_desc fd = {};
+ u64 configured_streams = 0;
+ unsigned int i;
+ u32 val;
+ int vc;
+ int ret;
+
+ ret = v4l2_subdev_call(formatter->csi_sd, pad, get_frame_desc,
+ formatter->remote_pad, &fd);
+ if (ret < 0 && ret != -ENOIOCTLCMD) {
+ dev_err(formatter->dev, "Failed to get frame desc: %d\n", ret);
+ return ret;
+ }
+
+ for (i = 0; i < CSI_FORMATTER_VC_NUM; ++i) {
+ if (!(stream_mask & BIT(i)))
+ continue;
+
+ fmt = v4l2_subdev_state_get_format(state,
+ CSI_FORMATTER_PAD_SINK, i);
+
+ pix_fmt = csi_formatter_find_format(fmt->code);
+
+ val = BIT(csi_formatter_get_index_by_dt(pix_fmt->data_type));
+
+ if (ret == -ENOIOCTLCMD) {
+ /*
+ * Source doesn't implement get_frame_desc, use
+ * default VC 0
+ */
+ vc = 0;
+ } else {
+ vc = csi_formatter_get_vc(formatter, &fd, i);
+ if (vc < 0) {
+ ret = vc;
+ goto err_cleanup;
+ }
+ }
+
+ csi_formatter_write(formatter, CSI_VC_PIXEL_DATA_TYPE(vc), val);
+ configured_streams |= BIT(i);
+ }
+
+ return 0;
+
+err_cleanup:
+ csi_formatter_stop_stream(formatter, configured_streams);
+ return ret;
+}
+
+static int csi_formatter_subdev_enable_streams(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *state,
+ u32 pad, u64 streams_mask)
+{
+ struct csi_formatter *formatter = sd_to_formatter(sd);
+ struct device *dev = formatter->dev;
+ u64 sink_streams;
+ int ret;
+
+ sink_streams = v4l2_subdev_state_xlate_streams(state,
+ CSI_FORMATTER_PAD_SOURCE,
+ CSI_FORMATTER_PAD_SINK,
+ &streams_mask);
+ if (!sink_streams || !streams_mask)
+ return -EINVAL;
+
+ guard(mutex)(&formatter->lock);
+
+ if (!formatter->enabled_streams) {
+ ret = pm_runtime_resume_and_get(formatter->dev);
+ if (ret < 0) {
+ dev_err(dev, "Failed to resume runtime PM: %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = csi_formatter_start_stream(formatter, state, streams_mask);
+ if (ret)
+ goto err_runtime_put;
+
+ ret = v4l2_subdev_enable_streams(formatter->csi_sd,
+ formatter->remote_pad,
+ sink_streams);
+ if (ret)
+ goto err_stop_stream;
+
+ formatter->enabled_streams |= streams_mask;
+
+ return 0;
+
+err_stop_stream:
+ csi_formatter_stop_stream(formatter, streams_mask);
+err_runtime_put:
+ if (!formatter->enabled_streams)
+ pm_runtime_put(formatter->dev);
+ return ret;
+}
+
+static int csi_formatter_subdev_disable_streams(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *state,
+ u32 pad, u64 streams_mask)
+{
+ struct csi_formatter *formatter = sd_to_formatter(sd);
+ u64 sink_streams;
+ int ret;
+
+ sink_streams = v4l2_subdev_state_xlate_streams(state,
+ CSI_FORMATTER_PAD_SOURCE,
+ CSI_FORMATTER_PAD_SINK,
+ &streams_mask);
+ if (!sink_streams || !streams_mask)
+ return -EINVAL;
+
+ guard(mutex)(&formatter->lock);
+
+ ret = v4l2_subdev_disable_streams(formatter->csi_sd, formatter->remote_pad,
+ sink_streams);
+ if (ret)
+ dev_err(formatter->dev, "Failed to disable streams: %d\n", ret);
+
+ csi_formatter_stop_stream(formatter, streams_mask);
+
+ formatter->enabled_streams &= ~streams_mask;
+
+ if (!formatter->enabled_streams)
+ pm_runtime_put(formatter->dev);
+
+ return ret;
+}
+
+static const struct v4l2_subdev_pad_ops formatter_subdev_pad_ops = {
+ .enum_mbus_code = csi_formatter_subdev_enum_mbus_code,
+ .get_fmt = v4l2_subdev_get_fmt,
+ .set_fmt = csi_formatter_subdev_set_fmt,
+ .get_frame_desc = v4l2_subdev_get_frame_desc_passthrough,
+ .set_routing = csi_formatter_subdev_set_routing,
+ .enable_streams = csi_formatter_subdev_enable_streams,
+ .disable_streams = csi_formatter_subdev_disable_streams,
+};
+
+static const struct v4l2_subdev_ops formatter_subdev_ops = {
+ .pad = &formatter_subdev_pad_ops,
+};
+
+static const struct v4l2_subdev_internal_ops formatter_internal_ops = {
+ .init_state = csi_formatter_subdev_init_state,
+};
+
+/* -----------------------------------------------------------------------------
+ * Media entity operations
+ */
+
+static const struct media_entity_operations formatter_entity_ops = {
+ .link_validate = v4l2_subdev_link_validate,
+ .get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1,
+};
+
+static int csi_formatter_subdev_init(struct csi_formatter *formatter)
+{
+ struct v4l2_subdev *sd = &formatter->sd;
+ int ret;
+
+ v4l2_subdev_init(sd, &formatter_subdev_ops);
+
+ snprintf(sd->name, sizeof(sd->name), "%s", dev_name(formatter->dev));
+ sd->internal_ops = &formatter_internal_ops;
+
+ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
+ V4L2_SUBDEV_FL_HAS_EVENTS |
+ V4L2_SUBDEV_FL_STREAMS;
+ sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
+ sd->entity.ops = &formatter_entity_ops;
+ sd->dev = formatter->dev;
+
+ formatter->pads[CSI_FORMATTER_PAD_SINK].flags = MEDIA_PAD_FL_SINK
+ | MEDIA_PAD_FL_MUST_CONNECT;
+ formatter->pads[CSI_FORMATTER_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
+
+ ret = media_entity_pads_init(&sd->entity, CSI_FORMATTER_PAD_NUM,
+ formatter->pads);
+ if (ret) {
+ dev_err(formatter->dev, "Failed to init pads\n");
+ return ret;
+ }
+
+ ret = v4l2_subdev_init_finalize(sd);
+ if (ret)
+ media_entity_cleanup(&sd->entity);
+
+ return ret;
+}
+
+static inline struct csi_formatter *
+notifier_to_csi_formatter(struct v4l2_async_notifier *n)
+{
+ return container_of(n, struct csi_formatter, notifier);
+}
+
+static int csi_formatter_notify_bound(struct v4l2_async_notifier *notifier,
+ struct v4l2_subdev *sd,
+ struct v4l2_async_connection *asc)
+{
+ const unsigned int link_flags = MEDIA_LNK_FL_IMMUTABLE
+ | MEDIA_LNK_FL_ENABLED;
+ struct csi_formatter *formatter = notifier_to_csi_formatter(notifier);
+ struct v4l2_subdev *sdev = &formatter->sd;
+ struct media_pad *sink = &sdev->entity.pads[CSI_FORMATTER_PAD_SINK];
+ struct media_pad *remote_pad;
+ int ret;
+
+ formatter->csi_sd = sd;
+
+ dev_dbg(formatter->dev, "Bound subdev: %s pad\n", sd->name);
+
+ ret = v4l2_create_fwnode_links_to_pad(sd, sink, link_flags);
+ if (ret < 0)
+ return ret;
+
+ remote_pad = media_pad_remote_pad_first(sink);
+ if (!remote_pad) {
+ dev_err(formatter->dev, "Pipe not setup correctly\n");
+ return -EPIPE;
+ }
+ formatter->remote_pad = remote_pad->index;
+
+ return 0;
+}
+
+static const struct v4l2_async_notifier_operations formatter_notify_ops = {
+ .bound = csi_formatter_notify_bound,
+};
+
+static int csi_formatter_async_register(struct csi_formatter *formatter)
+{
+ struct device *dev = formatter->dev;
+ struct v4l2_async_connection *asc;
+ int ret;
+
+ struct fwnode_handle *ep __free(fwnode_handle) =
+ fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0,
+ FWNODE_GRAPH_ENDPOINT_NEXT);
+ if (!ep)
+ return -ENOTCONN;
+
+ v4l2_async_subdev_nf_init(&formatter->notifier, &formatter->sd);
+
+ asc = v4l2_async_nf_add_fwnode_remote(&formatter->notifier, ep,
+ struct v4l2_async_connection);
+ if (IS_ERR(asc)) {
+ ret = PTR_ERR(asc);
+ goto err_cleanup_notifier;
+ }
+
+ formatter->notifier.ops = &formatter_notify_ops;
+
+ ret = v4l2_async_nf_register(&formatter->notifier);
+ if (ret)
+ goto err_cleanup_notifier;
+
+ ret = v4l2_async_register_subdev(&formatter->sd);
+ if (ret)
+ goto err_unregister_notifier;
+
+ return 0;
+
+err_unregister_notifier:
+ v4l2_async_nf_unregister(&formatter->notifier);
+err_cleanup_notifier:
+ v4l2_async_nf_cleanup(&formatter->notifier);
+ return ret;
+}
+
+static void csi_formatter_async_unregister(struct csi_formatter *formatter)
+{
+ v4l2_async_unregister_subdev(&formatter->sd);
+ v4l2_async_nf_unregister(&formatter->notifier);
+ v4l2_async_nf_cleanup(&formatter->notifier);
+}
+
+/* -----------------------------------------------------------------------------
+ * Suspend/resume
+ */
+
+static int csi_formatter_runtime_suspend(struct device *dev)
+{
+ struct v4l2_subdev *sd = dev_get_drvdata(dev);
+ struct csi_formatter *formatter = sd_to_formatter(sd);
+
+ clk_disable_unprepare(formatter->clk);
+
+ return 0;
+}
+
+static int csi_formatter_runtime_resume(struct device *dev)
+{
+ struct v4l2_subdev *sd = dev_get_drvdata(dev);
+ struct csi_formatter *formatter = sd_to_formatter(sd);
+
+ return clk_prepare_enable(formatter->clk);
+}
+
+static DEFINE_RUNTIME_DEV_PM_OPS(csi_formatter_pm_ops,
+ csi_formatter_runtime_suspend,
+ csi_formatter_runtime_resume, NULL);
+
+static int csi_formatter_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct csi_formatter *formatter;
+ u32 val;
+ int ret;
+
+ formatter = devm_kzalloc(dev, sizeof(*formatter), GFP_KERNEL);
+ if (!formatter)
+ return -ENOMEM;
+
+ formatter->dev = dev;
+
+ ret = devm_mutex_init(dev, &formatter->lock);
+ if (ret)
+ return ret;
+
+ formatter->regs = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(formatter->regs))
+ return dev_err_probe(dev, PTR_ERR(formatter->regs),
+ "Failed to get csi formatter regmap\n");
+
+ ret = of_property_read_u32(dev->of_node, "reg", &val);
+ if (ret < 0)
+ return dev_err_probe(dev, ret,
+ "Failed to get csi formatter reg property\n");
+
+ formatter->reg_offset = val;
+
+ formatter->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(formatter->clk))
+ return dev_err_probe(dev, PTR_ERR(formatter->clk),
+ "Failed to get pixel clock\n");
+
+ ret = csi_formatter_subdev_init(formatter);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "Failed to initialize formatter subdev\n");
+
+ platform_set_drvdata(pdev, &formatter->sd);
+
+ /* Enable runtime PM. */
+ ret = devm_pm_runtime_enable(dev);
+ if (ret)
+ goto err_cleanup_subdev;
+
+ ret = csi_formatter_async_register(formatter);
+ if (ret < 0) {
+ dev_err_probe(dev, ret, "Failed to register async subdevice\n");
+ goto err_cleanup_subdev;
+ }
+
+ return 0;
+
+err_cleanup_subdev:
+ v4l2_subdev_cleanup(&formatter->sd);
+ media_entity_cleanup(&formatter->sd.entity);
+ return ret;
+}
+
+static void csi_formatter_remove(struct platform_device *pdev)
+{
+ struct v4l2_subdev *sd = platform_get_drvdata(pdev);
+ struct csi_formatter *formatter = sd_to_formatter(sd);
+
+ csi_formatter_async_unregister(formatter);
+
+ v4l2_subdev_cleanup(&formatter->sd);
+ media_entity_cleanup(&formatter->sd.entity);
+}
+
+static const struct of_device_id csi_formatter_of_match[] = {
+ { .compatible = "fsl,imx95-csi-formatter" },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, csi_formatter_of_match);
+
+static struct platform_driver csi_formatter_device_driver = {
+ .driver = {
+ .name = "csi-pixel-formatter",
+ .of_match_table = csi_formatter_of_match,
+ .pm = pm_ptr(&csi_formatter_pm_ops),
+ },
+ .probe = csi_formatter_probe,
+ .remove = csi_formatter_remove,
+};
+
+module_platform_driver(csi_formatter_device_driver);
+
+MODULE_AUTHOR("NXP Semiconductor, Inc.");
+MODULE_DESCRIPTION("NXP i.MX95 CSI Pixel Formatter driver");
+MODULE_LICENSE("GPL");
--
2.34.1
^ permalink raw reply related
* [PATCH v9 2/3] media: dt-bindings: Add CSI Pixel Formatter DT bindings
From: Guoniu Zhou @ 2026-05-26 8:57 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Frank Li, Abel Vesa, Peng Fan,
Michael Turquette, Stephen Boyd
Cc: imx, linux-media, devicetree, linux-arm-kernel, linux-kernel,
linux-clk, Guoniu Zhou, Frank Li, Krzysztof Kozlowski
In-Reply-To: <20260526-csi_formatter-v9-0-ca3d8c334c39@oss.nxp.com>
From: Guoniu Zhou <guoniu.zhou@nxp.com>
The i.MX95 CSI pixel formatting module uses packet info, pixel and
non-pixel data from the CSI-2 host controller and reformat them to
match Pixel Link(PL) definition.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
Changes in v8:
- Use standard port reference instead of video-interfaces.yaml
- Add parent syscon node in example to show device integration
- Add required constraints for port@0 and port@1 in ports node
Changes in v7:
- Change compatible to imx95-csi-formatter as IP is i.MX95 specific per Marco's suggestion
Link: https://lore.kernel.org/linux-media/20260511-csi_formatter-v6-0-01028e312e2b@oss.nxp.com/T/#mcd135b3de179b3cb69daa1fd6e0e8e27c85b3332
---
.../bindings/media/fsl,imx95-csi-formatter.yaml | 96 ++++++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml b/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
new file mode 100644
index 000000000000..61068ea0a69a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/fsl,imx95-csi-formatter.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX95 CSI Pixel Formatter
+
+maintainers:
+ - Guoniu Zhou <guoniu.zhou@nxp.com>
+
+description:
+ The CSI pixel formatting module found on i.MX95 uses packet info, pixel
+ and non-pixel data from the CSI-2 host controller and reformat them to
+ match Pixel Link(PL) definition.
+
+properties:
+ compatible:
+ const: fsl,imx95-csi-formatter
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: MIPI CSI-2 RX IDI interface
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Pixel Link Interface
+
+ required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - power-domains
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/nxp,imx95-clock.h>
+
+ syscon@4c100000 {
+ compatible = "nxp,imx95-camera-csr", "syscon";
+ reg = <0x4ac10000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #clock-cells = <1>;
+ clocks = <&scmi_clk 62>;
+ power-domains = <&scmi_devpd 3>;
+
+ formatter@20{
+ compatible = "fsl,imx95-csi-formatter";
+ reg = <0x20 0x100>;
+ clocks = <&cameramix_csr IMX95_CLK_CAMBLK_CSI2_FOR0>;
+ power-domains = <&scmi_devpd 3>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ endpoint {
+ remote-endpoint = <&mipi_csi_0_out>;
+ };
+
+ };
+
+ port@1 {
+ reg = <1>;
+
+ endpoint {
+ remote-endpoint = <&isi_in_2>;
+ };
+ };
+ };
+ };
+ };
--
2.34.1
^ permalink raw reply related
* [PATCH v9 1/3] dt-bindings: clock: imx95-blk-ctl: Allow child nodes
From: Guoniu Zhou @ 2026-05-26 8:57 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Frank Li, Abel Vesa, Peng Fan,
Michael Turquette, Stephen Boyd
Cc: imx, linux-media, devicetree, linux-arm-kernel, linux-kernel,
linux-clk, Guoniu Zhou, Guoniu Zhou
In-Reply-To: <20260526-csi_formatter-v9-0-ca3d8c334c39@oss.nxp.com>
Add support for child nodes in the imx95-blk-ctl binding to match
the driver implementation which calls devm_of_platform_populate().
Add #address-cells, #size-cells properties and patternProperties
to allow child device nodes with their own bindings.
Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v9:
- New patch to address the issue of formatter acting as a child node of syscon
---
.../devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
index 27403b4c52d6..33ad1c15cc9c 100644
--- a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
+++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
@@ -39,6 +39,17 @@ properties:
ID in its "clocks" phandle cell. See
include/dt-bindings/clock/nxp,imx95-clock.h
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ type: object
+ description: Child nodes with their own bindings
+
required:
- compatible
- reg
--
2.34.1
^ permalink raw reply related
* [PATCH v9 0/3] media: nxp: Add CSI Pixel Formatter support
From: Guoniu Zhou @ 2026-05-26 8:57 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Frank Li, Abel Vesa, Peng Fan,
Michael Turquette, Stephen Boyd
Cc: imx, linux-media, devicetree, linux-arm-kernel, linux-kernel,
linux-clk, Guoniu Zhou, Guoniu Zhou, Frank Li,
Krzysztof Kozlowski
CSI Pixel Formatter is a module found on i.MX95. It could unpack the
pixels received by the formatter and reformat them to meet the pixel
link format requirement.
This patch series adds a new V4L2 driver for CSI Pixel Formatter.
v4l2-compliance 1.28.1-5233, 64 bits, 64-bit time_t
v4l2-compliance SHA: fc15e229d9d3 2024-07-23 19:22:15
Compliance test for device /dev/v4l-subdev9:
Driver Info:
Driver version : 7.1.0
Capabilities : 0x00000002
Streams Support
Client Capabilities: 0x0000000000000003
streams interval-uses-which
Required ioctls:
test VIDIOC_SUDBEV_QUERYCAP: OK
test invalid ioctls: OK
Allow for multiple opens:
test second /dev/v4l-subdev9 open: OK
test VIDIOC_SUBDEV_QUERYCAP: OK
test for unlimited opens: OK
Debug ioctls:
test VIDIOC_LOG_STATUS: OK (Not Supported)
Input ioctls:
test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
test VIDIOC_ENUMAUDIO: OK (Not Supported)
test VIDIOC_G/S/ENUMINPUT: OK (Not Supported)
test VIDIOC_G/S_AUDIO: OK (Not Supported)
Inputs: 0 Audio Inputs: 0 Tuners: 0
Output ioctls:
test VIDIOC_G/S_MODULATOR: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_ENUMAUDOUT: OK (Not Supported)
test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
test VIDIOC_G/S_AUDOUT: OK (Not Supported)
Outputs: 0 Audio Outputs: 0 Modulators: 0
Input/Output configuration ioctls:
test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
test VIDIOC_G/S_EDID: OK (Not Supported)
Sub-Device routing ioctls:
test Try VIDIOC_SUBDEV_G_ROUTING/VIDIOC_SUBDEV_S_ROUTING: OK
test Active VIDIOC_SUBDEV_G_ROUTING/VIDIOC_SUBDEV_S_ROUTING: OK
Control ioctls:
test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK (Not Supported)
test VIDIOC_QUERYCTRL: OK (Not Supported)
test VIDIOC_G/S_CTRL: OK (Not Supported)
test VIDIOC_G/S/TRY_EXT_CTRLS: OK (Not Supported)
test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK (Not Supported)
test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
Standard Controls: 0 Private Controls: 0
Format ioctls:
test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK (Not Supported)
test VIDIOC_G/S_PARM: OK (Not Supported)
test VIDIOC_G_FBUF: OK (Not Supported)
test VIDIOC_G_FMT: OK (Not Supported)
test VIDIOC_TRY_FMT: OK (Not Supported)
test VIDIOC_S_FMT: OK (Not Supported)
test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
test Cropping: OK (Not Supported)
test Composing: OK (Not Supported)
test Scaling: OK (Not Supported)
Codec ioctls:
test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
test VIDIOC_G_ENC_INDEX: OK (Not Supported)
test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
Buffer ioctls:
test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK (Not Supported)
test CREATE_BUFS maximum buffers: OK
test VIDIOC_REMOVE_BUFS: OK
test VIDIOC_EXPBUF: OK (Not Supported)
test Requests: OK (Not Supported)
Total for device /dev/v4l-subdev9: 47, Succeeded: 47, Failed: 0, Warnings: 0
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
Changes in v9:
- [NEW PATCH] Fix formatter as syscon child node issue
- Link to v8: https://lore.kernel.org/r/20260525-csi_formatter-v8-0-6b646231224b@oss.nxp.com
Changes in v8:
- Rebase to latest media/next
- Use standard port reference instead of video-interfaces.yaml
- Add parent syscon node in example to show device integration
- Remove fmt field and look up format from subdev state instead
- Unify function and structure naming to use csi_formatter_ prefix
- Remove misleading alignment comment from set_fmt function
- Optimize get_frame_desc to call once per start_stream
- Replace V4L2_FRAME_DESC_ENTRY_MAX with CSI_FORMATTER_VC_NUM in loops
- Remove redundant debug message in enable_streams
- Use MEDIA_PAD_FL_MUST_CONNECT flag instead of manual link check
- Link to v7: https://lore.kernel.org/r/20260518-csi_formatter-v7-0-562b750557e3@oss.nxp.com
Changes in v7:
- Change compatible to imx95-csi-formatter as IP is i.MX95 specific per Marco's suggestion
Link: https://lore.kernel.org/linux-media/20260511-csi_formatter-v6-0-01028e312e2b@oss.nxp.com/T/#mcd135b3de179b3cb69daa1fd6e0e8e27c85b3332
- Update references from imx9 to imx95 for consistency with dt-bindings
- Enable PM runtime before async registration
- Link to v6: https://lore.kernel.org/r/20260511-csi_formatter-v6-0-01028e312e2b@oss.nxp.com
Changes in v6:
- Rebase to latest media/next
- Update v4l2-compliace test
- Remove unused header includes
- Unify macro naming: VCx/VCX -> VC and parameter x -> vc
- Remove unused format field from csi_formatter struct
- Use compact initialization for formats array
- Make find_csi_format() return NULL instead of default format
- Use unsigned int for array index in find_csi_format()
- Add err_ prefix to error handling labels
- Add v4l2_subdev_cleanup() and reorder cleanup sequence
- Update enable_streams debug output format
- Rename VC_MAX to VC_NUM and fix boundary check
- Update CSI formatter Kconfig description
- Use v4l2_subdev_get_frame_desc_passthrough() helper
- Fix error paths in async registration and probe
- Add mutex to protect enabled_streams
- Switch to devm_pm_runtime_enable()
- Remove redundant num_routes check in set_routing
- Optimize get_index_by_dt() and add warning for unsupported type
- csi_formatter_start/stop_stream: Process all streams in mask
- Link to v5: https://lore.kernel.org/r/20260123-csi_formatter-v5-0-d5b803f867bf@nxp.com
Changes in v5:
- Remove CSI_FORMATTER_DRV_NAME macro since only use once.
- Remove sd->owner = THIS_MODULE;
- Simplify code by using DEFINE_RUNTIME_DEV_PM_OPS macro.
- Link to v4: https://lore.kernel.org/r/20260122-csi_formatter-v4-0-6f6fcad1c33a@nxp.com
Changes in v4:
- Rebase to latest media/next.
- Add comments to describe the index field in formatter_dt_to_index_map array.
- Link to v3: https://lore.kernel.org/r/20251219-csi_formatter-v3-0-8680d6d87091@nxp.com
Changes in v3:
- Rename nxp,imx9-csi-formatter.yaml to fsl,imx9-csi-formatter.yaml.
- Drop clock-names property.
- Drop macro IMX95_PD_CAMERA definition and use a constant directly.
[PATCH 1/2] media: dt-bindings: Add CSI Pixel Formatter DT bindings
- Remove the assignment driver.owner = THIS_MODULE.
- Assign struct fwnode_handle *ep __free(fwnode_handle) when definition.
- Update yaml file name for csi formatter in MAINTAINERS.
[PATCH 2/2] media: nxp: Add i.MX9 CSI pixel formatter v4l2 driver
- Link to v2: https://lore.kernel.org/r/20251217-csi_formatter-v2-0-62168af80210@nxp.com
Changes in v2:
- Delete "|" for description key.
- Add empty line between child node and property.
- Delete labels for endpoint of child nodes.
[PATCH 1/2] media: dt-bindings: Add CSI Pixel Formatter DT bindings
- Update commit message.
- Use the value defined by bellow macros directly since they are used only once.
#define CSI_FORMATTER_DEF_MBUS_CODE MEDIA_BUS_FMT_UYVY8_1X16
#define CSI_FORMATTER_DEF_PIX_WIDTH 1920U
#define CSI_FORMATTER_DEF_PIX_HEIGHT 1080U
#define CSI_FORMATTER_MAX_PIX_WIDTH 0xffff
#define CSI_FORMATTER_MAX_PIX_HEIGHT 0xffff
- Use macro pm_ptr() to fix build warning when CONFIG_PM is disabled.
- Finish route loop by break statement, instead of goto.
- Return dev_err_probe() when meet errors in probe() function instead of dev_err().
- Remove MODULE_ALIAS().
- Refine .enable(.dsable)_stream callback implementation, include bellow changes:
Add stream checking.
Fix potential pm runtime count unbalance issue.
Add stop stream error handling when enabling remote subdev stream.
- Use __free(fwnode_handle) to drop reference to a device node automatically.
[PATCH 2/2] media: nxp: Add i.MX9 CSI pixel formatter v4l2 driver
- Link to v1: https://lore.kernel.org/r/20251203-csi_formatter-v1-0-eb9e1147b49e@nxp.com
---
Guoniu Zhou (3):
dt-bindings: clock: imx95-blk-ctl: Allow child nodes
media: dt-bindings: Add CSI Pixel Formatter DT bindings
media: nxp: Add i.MX95 CSI pixel formatter v4l2 driver
.../bindings/clock/nxp,imx95-blk-ctl.yaml | 11 +
.../bindings/media/fsl,imx95-csi-formatter.yaml | 96 +++
MAINTAINERS | 8 +
drivers/media/platform/nxp/Kconfig | 14 +
drivers/media/platform/nxp/Makefile | 1 +
drivers/media/platform/nxp/imx95-csi-formatter.c | 758 +++++++++++++++++++++
6 files changed, 888 insertions(+)
---
base-commit: a3d78e74dd3ed04797ea351edb7f0a19b961c063
change-id: 20251125-csi_formatter-e6d29316dce6
Best regards,
--
Guoniu Zhou <guoniu.zhou@oss.nxp.com>
^ permalink raw reply
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