Re: [PATCH v3 RESEND 2/5] arm64: dts: qcom: Add device tree for Nord SoC series

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 7/4/26 3:05 AM, Shawn Guo wrote:
> On Tue, Jun 16, 2026 at 12:57:42PM +0200, Konrad Dybcio wrote:
>> On 5/26/26 7:12 AM, Shawn Guo wrote:
>>> Add base device tree include (nord.dtsi) for the Nord SoC series
>>> describing the core hardware components:
>>>
>>>  - 18 Oryon (qcom,oryon-1-5) cores in three clusters, with PSCI-based
>>>    power management and CPU/cluster idle states
>>>  - ARM GICv3 interrupt controller with ITS
>>>  - TLMM GPIO/pinctrl controller
>>>  - 8 TSENS thermal sensors with thermal zones
>>>  - 3 APPS SMMU-500 instances
>>>  - 3 QUPv3 GENI SE QUP blocks
>>>  - PDP SCMI channel and mailbox
>>>  - Watchdog, TRNG and TCSR
>>>  - Reserved memory, CMD-DB and firmware SCM
>>>  - PSCI and architected timers
>>
>> [...]
>>
>>> +		dump_mem: mem-dump-region {
>>> +			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
>>
>> off-by-1?
> 
> Yes. We have the same thing in sdm845.dtsi and sm8750.dtsi. Unless you
> think that missing the last byte is functionally problematic, I would
> rather be consistent with the established pattern in the tree.

It's difficult to tell whether it's cargo cult or whether the hw
actually has an issue decoding 0xffff_ffff. I would skew towards
the former, but I have nothing to prove that

Konrad