Re: [PATCH v3 RESEND 2/5] arm64: dts: qcom: Add device tree for Nord SoC series

[Shawn Guo <shengchao.guo@oss.qualcomm.com>]

On Tue, Jun 16, 2026 at 12:58:38PM +0200, Konrad Dybcio wrote:
> On 5/26/26 7:12 AM, Shawn Guo wrote:
> > Add base device tree include (nord.dtsi) for the Nord SoC series
> > describing the core hardware components:
> > 
> >  - 18 Oryon (qcom,oryon-1-5) cores in three clusters, with PSCI-based
> >    power management and CPU/cluster idle states
> >  - ARM GICv3 interrupt controller with ITS
> >  - TLMM GPIO/pinctrl controller
> >  - 8 TSENS thermal sensors with thermal zones
> >  - 3 APPS SMMU-500 instances
> >  - 3 QUPv3 GENI SE QUP blocks
> >  - PDP SCMI channel and mailbox
> >  - Watchdog, TRNG and TCSR
> >  - Reserved memory, CMD-DB and firmware SCM
> >  - PSCI and architected timers
> > 
> > Co-developed-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
> > Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
> > Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
> > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
> > Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
> > ---
> 
> [...]
> 
> > +		pdc: interrupt-controller@b220000 {
> > +			compatible = "qcom,nord-pdc",
> > +				     "qcom,pdc";
> > +			reg = <0x0 0x0b220000 0x0 0x10000>;
> > +			qcom,pdc-ranges = <0 745 43>, <67 543 31>,
> > +					 <98 609 32>, <130 717 12>,
> > +					 <142 251 5>, <147 796 16>;
> 
> One triple per line would be neat

Indeed, I agree!

Shawn