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From: Francesco Lavra <flavra@baylibre.com>
To: "Lorenzo Bianconi" <lorenzo@kernel.org>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"David Lechner" <dlechner@baylibre.com>,
	"Nuno Sá" <nuno.sa@analog.com>,
	"Andy Shevchenko" <andy@kernel.org>,
	linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/9] iio: imu: st_lsm6dsx: move wakeup event enable mask to event_src
Date: Thu, 30 Oct 2025 08:27:46 +0100	[thread overview]
Message-ID: <20251030072752.349633-4-flavra@baylibre.com> (raw)
In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com>

The mask value being assigned to the irq1_func and irq2_func fields
of the irq_config struct is specific to a single event source (i.e.
the wakeup event), and as such it should be separate from the
definition of the interrupt function registers, which cover
multiple event sources.
In preparation for adding support for more event types, change the
irq1_func and irq2_func type from an {address, mask} pair to an
address, and move the mask value to a new field of struct
st_lsm6dsx_event_src. No functional changes.

Signed-off-by: Francesco Lavra <flavra@baylibre.com>
---
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h      |  7 +-
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 80 +++++++-------------
 2 files changed, 30 insertions(+), 57 deletions(-)

diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
index 05689887f7ec..5c73156b714a 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
@@ -228,6 +228,7 @@ enum st_lsm6dsx_event_id {
 
 struct st_lsm6dsx_event_src {
 	struct st_lsm6dsx_reg value;
+	u8 enable_mask;
 	u8 status_reg;
 	u8 status_mask;
 	u8 status_x_mask;
@@ -320,8 +321,8 @@ struct st_lsm6dsx_settings {
 	struct {
 		struct st_lsm6dsx_reg irq1;
 		struct st_lsm6dsx_reg irq2;
-		struct st_lsm6dsx_reg irq1_func;
-		struct st_lsm6dsx_reg irq2_func;
+		u8 irq1_func;
+		u8 irq2_func;
 		struct st_lsm6dsx_reg lir;
 		struct st_lsm6dsx_reg clear_on_read;
 		struct st_lsm6dsx_reg hla;
@@ -420,7 +421,7 @@ struct st_lsm6dsx_hw {
 	u8 ts_sip;
 	u8 sip;
 
-	const struct st_lsm6dsx_reg *irq_routing;
+	u8 irq_routing;
 	u8 event_threshold;
 	u8 enable_event;
 
diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
index bb4c4c531128..4bae5da8910e 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
@@ -290,14 +290,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x58,
 				.mask = BIT(0),
 			},
-			.irq1_func = {
-				.addr = 0x5e,
-				.mask = BIT(5),
-			},
-			.irq2_func = {
-				.addr = 0x5f,
-				.mask = BIT(5),
-			},
+			.irq1_func = 0x5e,
+			.irq2_func = 0x5f,
 			.hla = {
 				.addr = 0x12,
 				.mask = BIT(5),
@@ -356,6 +350,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 						.addr = 0x5b,
 						.mask = GENMASK(5, 0),
 					},
+					.enable_mask = BIT(5),
 					.status_reg = 0x1b,
 					.status_mask = BIT(3),
 					.status_z_mask = BIT(0),
@@ -454,14 +449,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x58,
 				.mask = BIT(0),
 			},
-			.irq1_func = {
-				.addr = 0x5e,
-				.mask = BIT(5),
-			},
-			.irq2_func = {
-				.addr = 0x5f,
-				.mask = BIT(5),
-			},
+			.irq1_func = 0x5e,
+			.irq2_func = 0x5f,
 			.hla = {
 				.addr = 0x12,
 				.mask = BIT(5),
@@ -520,6 +509,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 						.addr = 0x5b,
 						.mask = GENMASK(5, 0),
 					},
+					.enable_mask = BIT(5),
 					.status_reg = 0x1b,
 					.status_mask = BIT(3),
 					.status_z_mask = BIT(0),
@@ -648,14 +638,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x58,
 				.mask = BIT(0),
 			},
-			.irq1_func = {
-				.addr = 0x5e,
-				.mask = BIT(5),
-			},
-			.irq2_func = {
-				.addr = 0x5f,
-				.mask = BIT(5),
-			},
+			.irq1_func = 0x5e,
+			.irq2_func = 0x5f,
 			.hla = {
 				.addr = 0x12,
 				.mask = BIT(5),
@@ -755,6 +739,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 						.addr = 0x5b,
 						.mask = GENMASK(5, 0),
 					},
+					.enable_mask = BIT(5),
 					.status_reg = 0x1b,
 					.status_mask = BIT(3),
 					.status_z_mask = BIT(0),
@@ -895,14 +880,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x56,
 				.mask = BIT(6),
 			},
-			.irq1_func = {
-				.addr = 0x5e,
-				.mask = BIT(5),
-			},
-			.irq2_func = {
-				.addr = 0x5f,
-				.mask = BIT(5),
-			},
+			.irq1_func = 0x5e,
+			.irq2_func = 0x5f,
 			.hla = {
 				.addr = 0x12,
 				.mask = BIT(5),
@@ -990,6 +969,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 						.addr = 0x5b,
 						.mask = GENMASK(5, 0),
 					},
+					.enable_mask = BIT(5),
 					.status_reg = 0x1b,
 					.status_mask = BIT(3),
 					.status_z_mask = BIT(0),
@@ -1106,14 +1086,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x56,
 				.mask = BIT(6),
 			},
-			.irq1_func = {
-				.addr = 0x5e,
-				.mask = BIT(5),
-			},
-			.irq2_func = {
-				.addr = 0x5f,
-				.mask = BIT(5),
-			},
+			.irq1_func = 0x5e,
+			.irq2_func = 0x5f,
 			.hla = {
 				.addr = 0x12,
 				.mask = BIT(5),
@@ -1169,6 +1143,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 						.addr = 0x5b,
 						.mask = GENMASK(5, 0),
 					},
+					.enable_mask = BIT(5),
 					.status_reg = 0x1b,
 					.status_mask = BIT(3),
 					.status_z_mask = BIT(0),
@@ -1279,14 +1254,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x56,
 				.mask = BIT(0),
 			},
-			.irq1_func = {
-				.addr = 0x5e,
-				.mask = BIT(5),
-			},
-			.irq2_func = {
-				.addr = 0x5f,
-				.mask = BIT(5),
-			},
+			.irq1_func = 0x5e,
+			.irq2_func = 0x5f,
 			.hla = {
 				.addr = 0x03,
 				.mask = BIT(4),
@@ -1373,6 +1342,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 						.addr = 0x5b,
 						.mask = GENMASK(5, 0),
 					},
+					.enable_mask = BIT(5),
 					.status_reg = 0x45,
 					.status_mask = BIT(3),
 					.status_z_mask = BIT(0),
@@ -1825,10 +1795,11 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state)
 {
 	const struct st_lsm6dsx_reg *reg;
+	u8 enable_mask;
 	unsigned int data;
 	int err;
 
-	if (!hw->settings->irq_config.irq1_func.addr)
+	if (!hw->irq_routing)
 		return -ENOTSUPP;
 
 	reg = &hw->settings->event_settings.enable_reg;
@@ -1841,9 +1812,10 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state)
 	}
 
 	/* Enable wakeup interrupt */
-	data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
-	return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
-					     hw->irq_routing->mask, data);
+	enable_mask = hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].enable_mask;
+	data = ST_LSM6DSX_SHIFT_VAL(state, enable_mask);
+	return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing,
+					     enable_mask, data);
 }
 
 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
@@ -2097,11 +2069,11 @@ st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
 
 	switch (drdy_pin) {
 	case 1:
-		hw->irq_routing = &hw->settings->irq_config.irq1_func;
+		hw->irq_routing = hw->settings->irq_config.irq1_func;
 		*drdy_reg = &hw->settings->irq_config.irq1;
 		break;
 	case 2:
-		hw->irq_routing = &hw->settings->irq_config.irq2_func;
+		hw->irq_routing = hw->settings->irq_config.irq2_func;
 		*drdy_reg = &hw->settings->irq_config.irq2;
 		break;
 	default:
-- 
2.39.5


  parent reply	other threads:[~2025-10-30  7:27 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-30  7:27 [PATCH 0/9] st_lsm6dsx: add tap event detection Francesco Lavra
2025-10-30  7:27 ` [PATCH 1/9] iio: imu: st_lsm6dsx: dynamically initialize iio_chan_spec data Francesco Lavra
2025-10-30  7:57   ` Andy Shevchenko
2025-10-30 11:03     ` Francesco Lavra
2025-10-30 16:42   ` Lorenzo Bianconi
2025-10-31  8:04     ` Francesco Lavra
2025-10-31  8:09       ` Andy Shevchenko
2025-10-31  8:26     ` Francesco Lavra
2025-10-31  8:32       ` Andy Shevchenko
2025-10-31 11:43         ` Francesco Lavra
2025-11-02 11:16   ` Jonathan Cameron
2025-11-03  9:24     ` Francesco Lavra
2025-11-09 13:32       ` Jonathan Cameron
2025-10-30  7:27 ` [PATCH 2/9] iio: imu: st_lsm6dsx: make event_settings more generic Francesco Lavra
2025-10-30 16:44   ` Lorenzo Bianconi
2025-10-31  8:08     ` Francesco Lavra
2025-10-30  7:27 ` Francesco Lavra [this message]
2025-10-30  7:59   ` [PATCH 3/9] iio: imu: st_lsm6dsx: move wakeup event enable mask to event_src Andy Shevchenko
2025-10-30  7:27 ` [PATCH 4/9] iio: imu: st_lsm6dsx: dynamically allocate iio_event_spec structs Francesco Lavra
2025-11-02 11:22   ` Jonathan Cameron
2025-10-30  7:27 ` [PATCH 5/9] iio: imu: st_lsm6dsx: rework code to check for enabled events Francesco Lavra
2025-10-30  7:27 ` [PATCH 6/9] iio: imu: st_lsm6dsx: remove event_threshold field from hw struct Francesco Lavra
2025-10-30  8:01   ` Andy Shevchenko
2025-10-30 11:10     ` Francesco Lavra
2025-10-30 13:49       ` Andy Shevchenko
2025-11-02 11:29         ` Jonathan Cameron
2025-11-02 13:45           ` Andy Shevchenko
2025-11-03  9:34             ` Francesco Lavra
2025-11-03  9:40               ` Andy Shevchenko
2025-11-03 14:53               ` David Lechner
2025-11-09 13:31                 ` Jonathan Cameron
2025-10-30  7:27 ` [PATCH 7/9] iio: imu: st_lsm6dsx: make event management functions generic Francesco Lavra
2025-10-30  8:15   ` Andy Shevchenko
2025-10-30 11:17     ` Francesco Lavra
2025-10-30 13:36       ` Andy Shevchenko
2025-11-02 11:33   ` Jonathan Cameron
2025-10-30  7:27 ` [PATCH 8/9] iio: imu: st_lsm6dsx: add event configurability on a per axis basis Francesco Lavra
2025-10-30  8:24   ` Andy Shevchenko
2025-10-30 11:23     ` Francesco Lavra
2025-10-30 13:56       ` Andy Shevchenko
2025-11-17 19:23         ` Francesco Lavra
2025-11-18 10:44           ` Andy Shevchenko
2025-11-18 11:01             ` Francesco Lavra
2025-11-20  9:05               ` Andy Shevchenko
2025-11-20 11:43                 ` Francesco Lavra
2025-11-20 13:59                   ` Andy Shevchenko
2025-11-20 18:31                     ` Andy Shevchenko
2025-11-21  9:14                       ` Francesco Lavra
2025-11-21  9:31                         ` Andy Shevchenko
2025-11-21 14:57                           ` Francesco Lavra
2025-12-07 15:11                             ` Jonathan Cameron
2025-10-30  7:27 ` [PATCH 9/9] iio: imu: st_lsm6dsx: add tap event detection Francesco Lavra

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