public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Eugeni Dodonov <eugeni.dodonov@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Eugeni Dodonov <eugeni.dodonov@intel.com>
Subject: [PATCH 14/24] drm/i915: account for only one PCH receiver on Haswell
Date: Thu, 26 Apr 2012 15:21:09 -0300	[thread overview]
Message-ID: <1335464479-648-15-git-send-email-eugeni.dodonov@intel.com> (raw)
In-Reply-To: <1335464479-648-1-git-send-email-eugeni.dodonov@intel.com>

On Haswell, only one pipe can work in FDI mode, so this patch prevents
messing with wrong registers when FDI is being used by non-first pipe.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b2d3dc1..6509402 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -978,9 +978,14 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
 	u32 val;
 	bool cur_state;
 
-	reg = FDI_RX_CTL(pipe);
-	val = I915_READ(reg);
-	cur_state = !!(val & FDI_RX_ENABLE);
+	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
+			DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe > 0\n");
+			return;
+	} else {
+		reg = FDI_RX_CTL(pipe);
+		val = I915_READ(reg);
+		cur_state = !!(val & FDI_RX_ENABLE);
+	}
 	WARN(cur_state != state,
 	     "FDI RX state assertion failure (expected %s, current %s)\n",
 	     state_string(state), state_string(cur_state));
@@ -1013,6 +1018,10 @@ static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv,
 	int reg;
 	u32 val;
 
+	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
+		DRM_ERROR("Attempting to enable FDI on Haswell with pipe > 0\n");
+		return;
+	}
 	reg = FDI_RX_CTL(pipe);
 	val = I915_READ(reg);
 	WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");
@@ -1484,6 +1493,10 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
 	assert_fdi_tx_enabled(dev_priv, pipe);
 	assert_fdi_rx_enabled(dev_priv, pipe);
 
+	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
+		DRM_ERROR("Attempting to enable transcoder on Haswell with pipe > 0\n");
+		return;
+	}
 	reg = TRANSCONF(pipe);
 	val = I915_READ(reg);
 	pipeconf_val = I915_READ(PIPECONF(pipe));
-- 
1.7.10

  parent reply	other threads:[~2012-04-26 18:21 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-26 18:20 [PATCH 00/24] Haswell v4 Eugeni Dodonov
2012-04-26 18:20 ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-26 19:18   ` Daniel Vetter
2012-04-30 23:46     ` Jesse Barnes
2012-04-26 18:20 ` [PATCH 02/24] drm/i915: support infoframes on Haswell Eugeni Dodonov
2012-04-26 18:20 ` [PATCH 03/24] drm/i915: add support for SBI ops Eugeni Dodonov
2012-04-30 23:53   ` Jesse Barnes
2012-04-26 18:20 ` [PATCH 04/24] drm/i915: calculate same watermarks on Haswell as on Ivy Bridge Eugeni Dodonov
2012-04-26 18:31   ` Jesse Barnes
2012-04-26 18:51     ` Eugeni Dodonov
2012-04-30 23:54       ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 05/24] drm/i915: reuse Ivybridge interrupts code for Haswell Eugeni Dodonov
2012-04-30 23:55   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 06/24] drm/i915: properly check for pipe count Eugeni Dodonov
2012-04-30 23:57   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 07/24] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-04-30 23:58   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 08/24] drm/i915: do not use fdi_normal_train on haswell Eugeni Dodonov
2012-04-30 23:59   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 09/24] drm/i915: detect PCH encoders on Haswell Eugeni Dodonov
2012-05-01  0:00   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 10/24] drm/i915: enable power wells on haswell init Eugeni Dodonov
2012-05-01  0:05   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 11/24] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-05-01  0:05   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 12/24] drm/i915: add LPT PCH checks Eugeni Dodonov
2012-05-01  0:06   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 13/24] drm/i915: handle DDI-related assertions Eugeni Dodonov
2012-05-01  0:07   ` Jesse Barnes
2012-04-26 18:21 ` Eugeni Dodonov [this message]
2012-04-26 19:54   ` [PATCH 14/24] drm/i915: account for only one PCH receiver on Haswell Daniel Vetter
2012-05-01  0:09   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 15/24] drm/i915: initialize DDI buffer translations Eugeni Dodonov
2012-04-26 19:16   ` Eugeni Dodonov
2012-05-01  0:20   ` Jesse Barnes
2012-05-01  0:27     ` Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 16/24] drm/i915: support DDI training in FDI mode Eugeni Dodonov
2012-04-26 19:43   ` Daniel Vetter
2012-04-26 18:21 ` [PATCH 17/24] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-05-01  0:23   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 18/24] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-05-01  0:26   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 19/24] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-05-01  0:27   ` Jesse Barnes
2012-05-01  0:33     ` Eugeni Dodonov
2012-05-01 15:01       ` Jesse Barnes
2012-05-02  3:02         ` Keith Packard
2012-04-26 18:21 ` [PATCH 20/24] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-05-01  0:28   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 21/24] drm/i915: add WR PLL programming table Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 22/24] drm/i915: move HDMI structs to shared location Eugeni Dodonov
2012-05-01  0:29   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 23/24] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 24/24] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-04-26 19:33 ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-26 19:33   ` [PATCH 02/24] drm/i915: support infoframes on Haswell Eugeni Dodonov
2012-04-26 19:42     ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-30 23:50       ` Jesse Barnes

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1335464479-648-15-git-send-email-eugeni.dodonov@intel.com \
    --to=eugeni.dodonov@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox