Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Eugeni Dodonov <eugeni.dodonov@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 04/24] drm/i915: calculate same watermarks on Haswell as on Ivy Bridge
Date: Mon, 30 Apr 2012 16:54:39 -0700	[thread overview]
Message-ID: <20120430165439.543edd25@jbarnes-desktop> (raw)
In-Reply-To: <1335466304-8141-1-git-send-email-eugeni.dodonov@intel.com>

On Thu, 26 Apr 2012 15:51:44 -0300
Eugeni Dodonov <eugeni.dodonov@intel.com> wrote:

> v2: check for num_pipe instead, as suggested by Jesse
> 
> CC: Jesse Barnes <jbarnes@virtuousgeek.org>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c |    3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 0552058..4e0af68 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1694,8 +1694,7 @@ static void sandybridge_update_wm(struct drm_device *dev)
>  		enabled |= 2;
>  	}
>  
> -	/* IVB has 3 pipes */
> -	if (IS_IVYBRIDGE(dev) &&
> +	if ((dev_priv->num_pipe == 2) &&
>  	    g4x_compute_wm0(dev, 2,
>  			    &sandybridge_display_wm_info, latency,
>  			    &sandybridge_cursor_wm_info, latency,

As noted on IRC, a cleanup (one of many for the WM code) would be to
use a loop for calculating the per-pipe watermarks.

But that can be done on top.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center

  reply	other threads:[~2012-04-30 23:54 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-26 18:20 [PATCH 00/24] Haswell v4 Eugeni Dodonov
2012-04-26 18:20 ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-26 19:18   ` Daniel Vetter
2012-04-30 23:46     ` Jesse Barnes
2012-04-26 18:20 ` [PATCH 02/24] drm/i915: support infoframes on Haswell Eugeni Dodonov
2012-04-26 18:20 ` [PATCH 03/24] drm/i915: add support for SBI ops Eugeni Dodonov
2012-04-30 23:53   ` Jesse Barnes
2012-04-26 18:20 ` [PATCH 04/24] drm/i915: calculate same watermarks on Haswell as on Ivy Bridge Eugeni Dodonov
2012-04-26 18:31   ` Jesse Barnes
2012-04-26 18:51     ` Eugeni Dodonov
2012-04-30 23:54       ` Jesse Barnes [this message]
2012-04-26 18:21 ` [PATCH 05/24] drm/i915: reuse Ivybridge interrupts code for Haswell Eugeni Dodonov
2012-04-30 23:55   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 06/24] drm/i915: properly check for pipe count Eugeni Dodonov
2012-04-30 23:57   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 07/24] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-04-30 23:58   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 08/24] drm/i915: do not use fdi_normal_train on haswell Eugeni Dodonov
2012-04-30 23:59   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 09/24] drm/i915: detect PCH encoders on Haswell Eugeni Dodonov
2012-05-01  0:00   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 10/24] drm/i915: enable power wells on haswell init Eugeni Dodonov
2012-05-01  0:05   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 11/24] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-05-01  0:05   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 12/24] drm/i915: add LPT PCH checks Eugeni Dodonov
2012-05-01  0:06   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 13/24] drm/i915: handle DDI-related assertions Eugeni Dodonov
2012-05-01  0:07   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 14/24] drm/i915: account for only one PCH receiver on Haswell Eugeni Dodonov
2012-04-26 19:54   ` Daniel Vetter
2012-05-01  0:09   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 15/24] drm/i915: initialize DDI buffer translations Eugeni Dodonov
2012-04-26 19:16   ` Eugeni Dodonov
2012-05-01  0:20   ` Jesse Barnes
2012-05-01  0:27     ` Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 16/24] drm/i915: support DDI training in FDI mode Eugeni Dodonov
2012-04-26 19:43   ` Daniel Vetter
2012-04-26 18:21 ` [PATCH 17/24] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-05-01  0:23   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 18/24] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-05-01  0:26   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 19/24] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-05-01  0:27   ` Jesse Barnes
2012-05-01  0:33     ` Eugeni Dodonov
2012-05-01 15:01       ` Jesse Barnes
2012-05-02  3:02         ` Keith Packard
2012-04-26 18:21 ` [PATCH 20/24] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-05-01  0:28   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 21/24] drm/i915: add WR PLL programming table Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 22/24] drm/i915: move HDMI structs to shared location Eugeni Dodonov
2012-05-01  0:29   ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 23/24] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 24/24] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-04-26 19:33 ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-26 19:33   ` [PATCH 02/24] drm/i915: support infoframes on Haswell Eugeni Dodonov
2012-04-26 19:42     ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-30 23:50       ` Jesse Barnes

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20120430165439.543edd25@jbarnes-desktop \
    --to=jbarnes@virtuousgeek.org \
    --cc=eugeni.dodonov@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox