From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Eugeni Dodonov <eugeni.dodonov@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 15/24] drm/i915: initialize DDI buffer translations
Date: Mon, 30 Apr 2012 17:20:18 -0700 [thread overview]
Message-ID: <20120430172018.639e57a8@jbarnes-desktop> (raw)
In-Reply-To: <1335464479-648-16-git-send-email-eugeni.dodonov@intel.com>
On Thu, 26 Apr 2012 15:21:10 -0300
Eugeni Dodonov <eugeni.dodonov@intel.com> wrote:
> DDI is introduced starting with Haswell GPU generation. So to simplify its
> management in the future, we also add intel_ddi.c to hold all the
> DDI-related items.
>
> Buffer translations for DDI links must be initialized prior to enablement.
> For FDI and DP, first 9 pairs of values are used to select the connection
> parameters. HDMI uses the last pair of values and ignores the first 9
> pairs. So we program HDMI values in both cases, which allows HDMI to work
> over both FDI and DP-friendly buffers.
>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/intel_ddi.c | 111 ++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_display.c | 2 +
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 4 files changed, 115 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/intel_ddi.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 8b8bbc7..0ca7f76 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -19,6 +19,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
> intel_crt.o \
> intel_lvds.o \
> intel_bios.o \
> + intel_ddi.o \
> intel_dp.o \
> intel_hdmi.o \
> intel_sdvo.o \
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> new file mode 100644
> index 0000000..32594a8
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -0,0 +1,111 @@
> +/*
> + * Copyright © 2012 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + * Authors:
> + * Eugeni Dodonov <eugeni.dodonov@intel.com>
> + *
> + */
> +
> +#include "i915_drv.h"
> +#include "intel_drv.h"
> +
> +/* HDMI/DVI modes ignore everything but the last 2 items. So we share
> + * them for both DP and FDI transports, allowing those ports to
> + * automatically adapt to HDMI connections as well
> + */
> +static const long hsw_ddi_translations_dp[] = {
> + 0x00FFFFFF, 0x0006000E,
> + 0x00D75FFF, 0x0005000A,
> + 0x00C30FFF, 0x00040006,
> + 0x80AAAFFF, 0x000B0000,
> + 0x00FFFFFF, 0x0005000A,
> + 0x00D75FFF, 0x000C0004,
> + 0x80C30FFF, 0x000B0000,
> + 0x00FFFFFF, 0x00040006,
> + 0x80D75FFF, 0x000B0000,
> + 0x00FFFFFF, 0x00040006
> +};
> +
> +static const long hsw_ddi_translations_fdi[] = {
> + 0x00FFFFFF, 0x0007000E,
> + 0x00D75FFF, 0x000F000A,
> + 0x00C30FFF, 0x00060006,
> + 0x00AAAFFF, 0x001E0000,
> + 0x00FFFFFF, 0x000F000A,
> + 0x00D75FFF, 0x00160004,
> + 0x00C30FFF, 0x001E0000,
> + 0x00FFFFFF, 0x00060006,
> + 0x00D75FFF, 0x001E0000,
> + 0x00FFFFFF, 0x00040006
> +};
Ahh these are vswing and preemphasis values for the various types...
Doesn't look like this goes up to the 19 dwords the docs specify?
> +
> +/* On Haswell, DDI port buffers must be programmed with correct values
> + * in advance. The buffer values are different for FDI and DP modes,
> + * but the HDMI/DVI fields are shared among those. So we program the DDI
> + * in either FDI or DP modes only, as HDMI connections will work with both
> + * of those
> + */
> +void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool use_fdi_mode)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + u32 reg;
> + int i, j;
> +
> + DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n",
> + port_name(port),
> + use_fdi_mode ? "FDI" : "DP");
> +
> + WARN((use_fdi_mode && (port != PORT_E)),
> + "Programming port %c in FDI mode, this probably will not work.\n",
> + port_name(port));
> +
> + /* Those registers seem to be double-buffered, so write them twice */
> + for (j=0; j < 2; j++) {
> + for (i=0, reg=DDI_BUF_TRANS(port); i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
> + I915_WRITE(reg,
> + (use_fdi_mode) ?
> + hsw_ddi_translations_fdi[i] :
> + hsw_ddi_translations_dp[i]);
> + reg += 4;
> + }
> + udelay(20);
> + }
Usually, double buffered means we need to write a trigger reg somewhere
for the values to be latched in, or wait for vblank. What's different
here?
--
Jesse Barnes, Intel Open Source Technology Center
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next prev parent reply other threads:[~2012-05-01 0:20 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-26 18:20 [PATCH 00/24] Haswell v4 Eugeni Dodonov
2012-04-26 18:20 ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-26 19:18 ` Daniel Vetter
2012-04-30 23:46 ` Jesse Barnes
2012-04-26 18:20 ` [PATCH 02/24] drm/i915: support infoframes on Haswell Eugeni Dodonov
2012-04-26 18:20 ` [PATCH 03/24] drm/i915: add support for SBI ops Eugeni Dodonov
2012-04-30 23:53 ` Jesse Barnes
2012-04-26 18:20 ` [PATCH 04/24] drm/i915: calculate same watermarks on Haswell as on Ivy Bridge Eugeni Dodonov
2012-04-26 18:31 ` Jesse Barnes
2012-04-26 18:51 ` Eugeni Dodonov
2012-04-30 23:54 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 05/24] drm/i915: reuse Ivybridge interrupts code for Haswell Eugeni Dodonov
2012-04-30 23:55 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 06/24] drm/i915: properly check for pipe count Eugeni Dodonov
2012-04-30 23:57 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 07/24] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-04-30 23:58 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 08/24] drm/i915: do not use fdi_normal_train on haswell Eugeni Dodonov
2012-04-30 23:59 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 09/24] drm/i915: detect PCH encoders on Haswell Eugeni Dodonov
2012-05-01 0:00 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 10/24] drm/i915: enable power wells on haswell init Eugeni Dodonov
2012-05-01 0:05 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 11/24] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-05-01 0:05 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 12/24] drm/i915: add LPT PCH checks Eugeni Dodonov
2012-05-01 0:06 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 13/24] drm/i915: handle DDI-related assertions Eugeni Dodonov
2012-05-01 0:07 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 14/24] drm/i915: account for only one PCH receiver on Haswell Eugeni Dodonov
2012-04-26 19:54 ` Daniel Vetter
2012-05-01 0:09 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 15/24] drm/i915: initialize DDI buffer translations Eugeni Dodonov
2012-04-26 19:16 ` Eugeni Dodonov
2012-05-01 0:20 ` Jesse Barnes [this message]
2012-05-01 0:27 ` Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 16/24] drm/i915: support DDI training in FDI mode Eugeni Dodonov
2012-04-26 19:43 ` Daniel Vetter
2012-04-26 18:21 ` [PATCH 17/24] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-05-01 0:23 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 18/24] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-05-01 0:26 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 19/24] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-05-01 0:27 ` Jesse Barnes
2012-05-01 0:33 ` Eugeni Dodonov
2012-05-01 15:01 ` Jesse Barnes
2012-05-02 3:02 ` Keith Packard
2012-04-26 18:21 ` [PATCH 20/24] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-05-01 0:28 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 21/24] drm/i915: add WR PLL programming table Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 22/24] drm/i915: move HDMI structs to shared location Eugeni Dodonov
2012-05-01 0:29 ` Jesse Barnes
2012-04-26 18:21 ` [PATCH 23/24] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-04-26 18:21 ` [PATCH 24/24] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-04-26 19:33 ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-26 19:33 ` [PATCH 02/24] drm/i915: support infoframes on Haswell Eugeni Dodonov
2012-04-26 19:42 ` [PATCH 01/24] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-30 23:50 ` Jesse Barnes
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