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From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 44/47] drm/i915: split intel_dp_init into encoder and connector pieces
Date: Tue,  2 Oct 2012 17:52:19 -0300	[thread overview]
Message-ID: <1349211142-4802-45-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1349211142-4802-1-git-send-email-przanoni@gmail.com>

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

Same reason as the previous HDMI commit: the DDI code will have its
own encoder init function but still use the DP and HDMI connectors.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |  127 +++++++++++++++++++++------------------
 1 file changed, 69 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index d9655e5..0a4ac6f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2654,37 +2654,23 @@ intel_dp_add_properties(struct drm_connector *connector)
 	intel_attach_broadcast_rgb_property(connector);
 }
 
-void
-intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
+static void
+intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
+			struct intel_connector *intel_connector)
 {
+	struct drm_connector *connector = &intel_connector->base;
+	struct intel_dp *intel_dp = &intel_dig_port->dp;
+	struct intel_encoder *intel_encoder = &intel_dig_port->base;
+	struct drm_device *dev = intel_encoder->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct drm_connector *connector;
-	struct intel_dp *intel_dp;
-	struct intel_encoder *intel_encoder;
-	struct intel_connector *intel_connector;
-	struct intel_digital_port *intel_dig_port;
+	enum port port = intel_dig_port->port;
 	const char *name = NULL;
 	int type;
 
-	intel_dig_port = kzalloc(sizeof(struct intel_digital_port), GFP_KERNEL);
-	if (!intel_dig_port)
-		return;
-
-	intel_dig_port->port = port;
-
-	intel_dp = &intel_dig_port->dp;
-	intel_dp->output_reg = output_reg;
 	/* Preserve the current hw state. */
 	intel_dp->DP = I915_READ(intel_dp->output_reg);
 
-	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-	if (!intel_connector) {
-		kfree(intel_dig_port);
-		return;
-	}
-	intel_encoder = &intel_dig_port->base;
-
-	if (HAS_PCH_SPLIT(dev) && output_reg == PCH_DP_D)
+	if (HAS_PCH_SPLIT(dev) && port == PORT_D)
 		if (intel_dpd_is_edp(dev))
 			intel_dp->is_pch_edp = true;
 
@@ -2692,10 +2678,10 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
 	 * FIXME : We need to initialize built-in panels before external panels.
 	 * For X0, DP_C is fixed as eDP. Revisit this as part of VLV eDP cleanup
 	 */
-	if (IS_VALLEYVIEW(dev) && output_reg == DP_C) {
+	if (IS_VALLEYVIEW(dev) && port == PORT_C) {
 		type = DRM_MODE_CONNECTOR_eDP;
 		intel_encoder->type = INTEL_OUTPUT_EDP;
-	} else if (output_reg == DP_A || is_pch_edp(intel_dp)) {
+	} else if (port == PORT_A || is_pch_edp(intel_dp)) {
 		type = DRM_MODE_CONNECTOR_eDP;
 		intel_encoder->type = INTEL_OUTPUT_EDP;
 	} else {
@@ -2703,48 +2689,19 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
 		intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
 	}
 
-	connector = &intel_connector->base;
 	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
 	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
 
 	connector->polled = DRM_CONNECTOR_POLL_HPD;
-
-	intel_encoder->cloneable = false;
-
-	INIT_DELAYED_WORK(&intel_dp->panel_vdd_work,
-			  ironlake_panel_vdd_work);
-
-	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
-
 	connector->interlace_allowed = true;
 	connector->doublescan_allowed = 0;
 
-	drm_encoder_init(dev, &intel_encoder->base, &intel_dp_enc_funcs,
-			 DRM_MODE_ENCODER_TMDS);
-
-	if (IS_HASWELL(dev))
-		drm_encoder_helper_add(&intel_encoder->base,
-				       &intel_dp_helper_funcs_hsw);
-	else
-		drm_encoder_helper_add(&intel_encoder->base,
-				       &intel_dp_helper_funcs);
+	INIT_DELAYED_WORK(&intel_dp->panel_vdd_work,
+			  ironlake_panel_vdd_work);
 
 	intel_connector_attach_encoder(intel_connector, intel_encoder);
 	drm_sysfs_connector_add(connector);
 
-	if (IS_HASWELL(dev)) {
-		intel_encoder->enable = intel_enable_ddi;
-		intel_encoder->pre_enable = intel_ddi_pre_enable;
-		intel_encoder->disable = intel_disable_ddi;
-		intel_encoder->post_disable = intel_ddi_post_disable;
-		intel_encoder->get_hw_state = intel_ddi_get_hw_state;
-	} else {
-		intel_encoder->enable = intel_enable_dp;
-		intel_encoder->pre_enable = intel_pre_enable_dp;
-		intel_encoder->disable = intel_disable_dp;
-		intel_encoder->post_disable = intel_post_disable_dp;
-		intel_encoder->get_hw_state = intel_dp_get_hw_state;
-	}
 	intel_connector->get_hw_state = intel_connector_get_hw_state;
 
 	/* Set up the DDC bus. */
@@ -2861,8 +2818,6 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
 		ironlake_edp_panel_vdd_off(intel_dp, false);
 	}
 
-	intel_encoder->hot_plug = intel_dp_hot_plug;
-
 	if (is_edp(intel_dp)) {
 		dev_priv->int_edp_connector = connector;
 		intel_panel_setup_backlight(dev);
@@ -2879,3 +2834,59 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
 		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
 	}
 }
+
+void
+intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
+{
+	struct intel_digital_port *intel_dig_port;
+	struct intel_encoder *intel_encoder;
+	struct drm_encoder *encoder;
+	struct intel_connector *intel_connector;
+
+	intel_dig_port = kzalloc(sizeof(struct intel_digital_port), GFP_KERNEL);
+	if (!intel_dig_port)
+		return;
+
+	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
+	if (!intel_connector) {
+		kfree(intel_dig_port);
+		return;
+	}
+
+	intel_encoder = &intel_dig_port->base;
+	encoder = &intel_encoder->base;
+
+	drm_encoder_init(dev, &intel_encoder->base, &intel_dp_enc_funcs,
+			 DRM_MODE_ENCODER_TMDS);
+
+	if (IS_HASWELL(dev))
+		drm_encoder_helper_add(&intel_encoder->base,
+				       &intel_dp_helper_funcs_hsw);
+	else
+		drm_encoder_helper_add(&intel_encoder->base,
+				       &intel_dp_helper_funcs);
+
+	if (IS_HASWELL(dev)) {
+		intel_encoder->enable = intel_enable_ddi;
+		intel_encoder->pre_enable = intel_ddi_pre_enable;
+		intel_encoder->disable = intel_disable_ddi;
+		intel_encoder->post_disable = intel_ddi_post_disable;
+		intel_encoder->get_hw_state = intel_ddi_get_hw_state;
+	} else {
+		intel_encoder->enable = intel_enable_dp;
+		intel_encoder->pre_enable = intel_pre_enable_dp;
+		intel_encoder->disable = intel_disable_dp;
+		intel_encoder->post_disable = intel_post_disable_dp;
+		intel_encoder->get_hw_state = intel_dp_get_hw_state;
+	}
+
+	intel_dig_port->port = port;
+	intel_dig_port->hdmi.sdvox_reg = 0;
+	intel_dig_port->dp.output_reg = output_reg;
+
+	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+	intel_encoder->cloneable = false;
+	intel_encoder->hot_plug = intel_dp_hot_plug;
+
+	intel_dp_init_connector(intel_dig_port, intel_connector);
+}
-- 
1.7.10.4

  parent reply	other threads:[~2012-10-02 20:54 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-02 20:51 [PATCH 00/47] Haswell clocking and HDMI fixes, DP and eDP support Paulo Zanoni
2012-10-02 20:51 ` [PATCH 01/47] drm/i915: rewrite the LCPLL code Paulo Zanoni
2012-10-03 16:47   ` Lespiau, Damien
2012-10-02 20:51 ` [PATCH 02/47] drm/i915: enable and disable DDI_FUNC_CTL at the right time Paulo Zanoni
2012-10-03 17:44   ` Lespiau, Damien
2012-10-04 20:15     ` Paulo Zanoni
2012-10-02 20:51 ` [PATCH 03/47] drm/i915: enable and disable PIPE_CLK_SEL " Paulo Zanoni
2012-10-04 11:28   ` Lespiau, Damien
2012-10-02 20:51 ` [PATCH 04/47] drm/i915: completely rewrite the Haswell PLL handling code Paulo Zanoni
2012-10-02 20:51 ` [PATCH 05/47] drm/i915: don't rely on previous values set on DDI_BUF_CTL Paulo Zanoni
2012-10-02 20:51 ` [PATCH 06/47] drm/i915: disable DDI_BUF_CTL at the correct time Paulo Zanoni
2012-10-02 20:51 ` [PATCH 07/47] drm/i915: add haswell_crtc_mode_set Paulo Zanoni
2012-10-04 14:38   ` Lespiau, Damien
2012-10-02 20:51 ` [PATCH 08/47] drm/i915: add proper CPU/PCH checks to crtc_mode_set functions Paulo Zanoni
2012-10-02 20:51 ` [PATCH 09/47] drm/i915: add haswell_set_pipeconf Paulo Zanoni
2012-10-04 14:36   ` Lespiau, Damien
2012-10-02 20:51 ` [PATCH 10/47] drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set Paulo Zanoni
2012-10-04 14:14   ` Lespiau, Damien
2012-10-05 12:53     ` Paulo Zanoni
2012-10-05 13:15       ` Lespiau, Damien
2012-10-02 20:51 ` [PATCH 11/47] drm/i915: add DP support to intel_ddi_enable_pipe_func Paulo Zanoni
2012-10-02 20:51 ` [PATCH 12/47] drm/i915: add intel_ddi_set_pipe_settings Paulo Zanoni
2012-10-02 20:51 ` [PATCH 13/47] drm/i915: add DP support to intel_ddi_pll_mode_set Paulo Zanoni
2012-10-02 20:51 ` [PATCH 14/47] drm/i915: add DP support to intel_ddi_disable_port Paulo Zanoni
2012-10-02 20:51 ` [PATCH 15/47] drm/i915: add DP support to intel_ddi_mode_set Paulo Zanoni
2012-10-02 20:51 ` [PATCH 16/47] drm/i915: add basic Haswell DP link train bits Paulo Zanoni
2012-10-02 20:51 ` [PATCH 17/47] drm/i915: use TU_SIZE macro at intel_dp_set_m_n Paulo Zanoni
2012-10-02 20:51 ` [PATCH 18/47] drm/i915: fix Haswell DP M/N registers Paulo Zanoni
2012-10-02 20:51 ` [PATCH 19/47] drm/i915: fix DP AUX register definitions on Haswell Paulo Zanoni
2012-10-02 20:51 ` [PATCH 20/47] drm/i915: add DP support to intel_ddi_get_encoder_port Paulo Zanoni
2012-10-02 20:51 ` [PATCH 21/47] drm/i915: add DP support to intel_ddi_get_hw_state Paulo Zanoni
2012-10-02 20:51 ` [PATCH 22/47] drm/i915: add DP support to intel_enable_ddi Paulo Zanoni
2012-10-02 20:51 ` [PATCH 23/47] drm/i915: implement Haswell DP link train sequence Paulo Zanoni
2012-10-02 20:51 ` [PATCH 24/47] drm/i915: set the correct function pointers for Haswell DP Paulo Zanoni
2012-10-02 20:52 ` [PATCH 25/47] drm/i915: add TRANSCODER_EDP Paulo Zanoni
2012-10-02 20:52 ` [PATCH 26/47] drm/i915: convert PIPE_CLK_SEL to transcoder Paulo Zanoni
2012-10-02 20:52 ` [PATCH 27/47] drm/i915: convert DDI_FUNC_CTL " Paulo Zanoni
2012-10-02 20:52 ` [PATCH 28/47] drm/i915: check TRANSCODER_EDP on intel_modeset_setup_hw_state Paulo Zanoni
2012-10-02 20:52 ` [PATCH 29/47] drm/i915: convert PIPECONF to use transcoder instead of pipe Paulo Zanoni
2012-10-02 20:52 ` [PATCH 30/47] drm/i915: convert PIPE_MSA_MISC to transcoder Paulo Zanoni
2012-10-02 20:52 ` [PATCH 31/47] drm/i915: convert CPU M/N timings " Paulo Zanoni
2012-10-02 20:52 ` [PATCH 32/47] drm/i915: convert pipe timing definitions " Paulo Zanoni
2012-10-02 20:52 ` [PATCH 33/47] drm/i915: implement workaround for VTOTAL when using TRANSCODER_EDP Paulo Zanoni
2012-10-02 20:52 ` [PATCH 34/47] drm/i915: select the correct pipe " Paulo Zanoni
2012-10-02 20:52 ` [PATCH 35/47] drm/i915: set the correct eDP aux channel clock divider on DDI Paulo Zanoni
2012-10-02 20:52 ` [PATCH 36/47] drm/i915: set/unset the DDI eDP backlight Paulo Zanoni
2012-10-02 20:52 ` [PATCH 37/47] drm/i915: turn the eDP DDI panel on/off Paulo Zanoni
2012-10-02 20:52 ` [PATCH 38/47] drm/i915: enable DDI eDP Paulo Zanoni
2012-10-02 20:52 ` [PATCH 39/47] drm/i915: simplify assignments inside intel_dp.c Paulo Zanoni
2012-10-02 20:52 ` [PATCH 40/47] drm/i915: add intel_dp_to_dev and intel_hdmi_to_dev Paulo Zanoni
2012-10-02 20:52 ` [PATCH 41/47] drm/i915: create intel_digital_port and use it Paulo Zanoni
2012-10-02 20:52 ` [PATCH 42/47] drm/i915: remove encoder args from intel_{dp, hdmi}_add_properties Paulo Zanoni
2012-10-02 20:52 ` [PATCH 43/47] drm/i915: split intel_hdmi_init into encoder and connector pieces Paulo Zanoni
2012-10-02 20:52 ` Paulo Zanoni [this message]
2012-10-02 20:52 ` [PATCH 45/47] drm/i915: reset intel_encoder->type when DP or HDMI is detected Paulo Zanoni
2012-10-02 20:52 ` [PATCH 46/47] drm/i915: add intel_ddi_connector_get_hw_state Paulo Zanoni
2012-10-02 20:52 ` [PATCH 47/47] drm/i915: create the DDI encoder Paulo Zanoni
2012-10-05 15:05 ` [PATCH 00/10] Haswell pipe and clocking fixes Paulo Zanoni
2012-10-05 15:05   ` [PATCH 01/10] drm/i915: rewrite the LCPLL code Paulo Zanoni
2012-10-10 12:47     ` Lespiau, Damien
2012-10-10 12:53       ` Lespiau, Damien
2012-10-05 15:05   ` [PATCH 02/10] drm/i915: enable and disable DDI_FUNC_CTL at the right time Paulo Zanoni
2012-10-10 13:04     ` Lespiau, Damien
2012-10-05 15:05   ` [PATCH 03/10] drm/i915: enable and disable PIPE_CLK_SEL " Paulo Zanoni
2012-10-10 13:05     ` Lespiau, Damien
2012-10-05 15:05   ` [PATCH 04/10] drm/i915: add haswell_crtc_mode_set Paulo Zanoni
2012-10-10 13:07     ` Lespiau, Damien
2012-10-05 15:05   ` [PATCH 05/10] drm/i915: add proper CPU/PCH checks to crtc_mode_set functions Paulo Zanoni
2012-10-10 13:52     ` Lespiau, Damien
2012-10-05 15:05   ` [PATCH 06/10] drm/i915: add haswell_set_pipeconf Paulo Zanoni
2012-10-10 13:59     ` Lespiau, Damien
2012-10-05 15:05   ` [PATCH 07/10] drm/i915: completely rewrite the Haswell PLL handling code Paulo Zanoni
2012-10-10 14:22     ` Lespiau, Damien
2012-10-10 14:52       ` Daniel Vetter
2012-10-05 15:05   ` [PATCH 08/10] drm/i915: don't rely on previous values set on DDI_BUF_CTL Paulo Zanoni
2012-10-10 14:27     ` Lespiau, Damien
2012-10-10 14:56       ` Daniel Vetter
2012-10-10 18:18         ` Daniel Vetter
2012-10-05 15:06   ` [PATCH 09/10] drm/i915: disable DDI_BUF_CTL at the correct time Paulo Zanoni
2012-10-10 22:30     ` Lespiau, Damien
2012-10-05 15:06   ` [PATCH 10/10] drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set Paulo Zanoni
2012-10-10 21:57     ` Lespiau, Damien
2012-10-10 22:47       ` Daniel Vetter

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