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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 04/14] drm/i915: Polish the skl+ plane keyval/msk/max register setup
Date: Wed, 7 Nov 2018 22:56:27 +0200	[thread overview]
Message-ID: <20181107205627.GP9144@intel.com> (raw)
In-Reply-To: <20181107195527.GF2237@intel.com>

On Wed, Nov 07, 2018 at 11:55:27AM -0800, Rodrigo Vivi wrote:
> On Thu, Nov 01, 2018 at 05:05:55PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Due to the constant alpha we're going to have to program two of
> > the the tree keying registers anyway, so might as well always
> > program all three.
> > 
> > And parametrize the plane constant alpha define while at it.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I'm not 100% confident we can just ignore the key->flags,
> but I couldn't convince me that we need that either.

The colorkey registers should be nops unless we enable the relevant bits
in the control register (skl_plane_ctl()). If not we'd already have a
bug because we were leaving stale values in those registers when
colorkeying was not enabled.

> 
> And clean-up by itself looks good, so:
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> 
> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h     |  2 +-
> >  drivers/gpu/drm/i915/intel_sprite.c | 22 +++++++++-------------
> >  2 files changed, 10 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 8d089ef848b2..b6ee863b5df2 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -6545,7 +6545,7 @@ enum {
> >  #define  PLANE_KEYMSK_ALPHA_ENABLE		(1 << 31)
> >  #define _PLANE_KEYMAX_1_A			0x701a0
> >  #define _PLANE_KEYMAX_2_A			0x702a0
> > -#define  PLANE_KEYMAX_ALPHA_SHIFT		24
> > +#define  PLANE_KEYMAX_ALPHA(a)			((a) << 24)
> >  #define _PLANE_AUX_DIST_1_A			0x701c0
> >  #define _PLANE_AUX_DIST_2_A			0x702c0
> >  #define _PLANE_AUX_OFFSET_1_A			0x701c4
> > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> > index 399d44c57a7d..b36238282b4e 100644
> > --- a/drivers/gpu/drm/i915/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/intel_sprite.c
> > @@ -382,31 +382,27 @@ skl_program_plane(struct intel_plane *plane,
> >  	uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16;
> >  	uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16;
> >  	struct intel_plane *linked = plane_state->linked_plane;
> > +	u8 alpha = plane_state->base.alpha >> 8;
> >  	unsigned long irqflags;
> > -	u32 keymsk = 0, keymax = 0;
> > +	u32 keymsk, keymax;
> >  
> >  	/* Sizes are 0 based */
> >  	src_w--;
> >  	src_h--;
> >  
> > +	keymax = (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha);
> > +
> > +	keymsk = key->channel_mask & 0x3ffffff;
> > +	if (alpha < 0xff)
> > +		keymsk |= PLANE_KEYMSK_ALPHA_ENABLE;
> > +
> >  	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> >  
> >  	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> >  		I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
> >  			      plane_state->color_ctl);
> >  
> > -	if (key->flags) {
> > -		I915_WRITE_FW(PLANE_KEYVAL(pipe, plane_id), key->min_value);
> > -
> > -		keymax |= key->max_value & 0xffffff;
> > -		keymsk |= key->channel_mask & 0x3ffffff;
> > -	}
> > -
> > -	keymax |= (plane_state->base.alpha >> 8) << PLANE_KEYMAX_ALPHA_SHIFT;
> > -
> > -	if (plane_state->base.alpha < 0xff00)
> > -		keymsk |= PLANE_KEYMSK_ALPHA_ENABLE;
> > -
> > +	I915_WRITE_FW(PLANE_KEYVAL(pipe, plane_id), key->min_value);
> >  	I915_WRITE_FW(PLANE_KEYMAX(pipe, plane_id), keymax);
> >  	I915_WRITE_FW(PLANE_KEYMSK(pipe, plane_id), keymsk);
> >  
> > -- 
> > 2.18.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-11-07 20:56 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-01 15:05 [PATCH 00/14] drm/i915: Program SKL+ watermarks/ddb more carefully Ville Syrjala
2018-11-01 15:05 ` [PATCH 01/14] drm/i915: Nuke posting reads from plane update/disable funcs Ville Syrjala
2018-11-01 18:08   ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 02/14] drm/i915: Clean up skl_program_scaler() Ville Syrjala
2018-11-01 15:17   ` [PATCH v2 " Ville Syrjala
2018-11-01 18:13     ` Rodrigo Vivi
2018-11-07 18:29       ` Ville Syrjälä
2018-11-09 17:24         ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 03/14] drm/i915: Remove the PS_PWR_GATE write from skl_program_scaler() Ville Syrjala
2018-11-07 18:53   ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 04/14] drm/i915: Polish the skl+ plane keyval/msk/max register setup Ville Syrjala
2018-11-07 18:41   ` [PATCH v2 " Ville Syrjala
2018-11-07 19:55   ` [PATCH " Rodrigo Vivi
2018-11-07 20:56     ` Ville Syrjälä [this message]
2018-11-01 15:05 ` [PATCH 05/14] drm/i915: Clean up skl+ PLANE_POS vs. scaler handling Ville Syrjala
2018-11-07 19:56   ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 06/14] drm/i915: Reorganize plane register writes to make them more atomic Ville Syrjala
2018-11-07 18:42   ` [PATCH v2 " Ville Syrjala
2018-11-08 19:30     ` Matt Roper
2018-11-08 19:48       ` Ville Syrjälä
2018-11-07 21:26   ` [PATCH " Rodrigo Vivi
2018-11-07 21:38     ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 07/14] drm/i915: Move single buffered plane register writes to the end Ville Syrjala
2018-11-07 21:26   ` Rodrigo Vivi
2018-11-08 22:06   ` Matt Roper
2018-11-09 13:55     ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 08/14] drm/i915: Generalize skl_ddb_allocation_overlaps() Ville Syrjala
2018-11-07 21:28   ` Rodrigo Vivi
2018-11-01 15:06 ` [PATCH 09/14] drm/i915: Introduce crtc_state->update_planes bitmask Ville Syrjala
2018-11-07 21:49   ` Rodrigo Vivi
2018-11-08 11:32     ` Ville Syrjälä
2018-11-08 23:22   ` Matt Roper
2018-11-09 13:57     ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 10/14] drm/i915: Pass the new crtc_state to ->disable_plane() Ville Syrjala
2018-11-07 22:08   ` Rodrigo Vivi
2018-11-08 11:43     ` Ville Syrjälä
2018-11-08 23:52   ` Matt Roper
2018-11-09 14:32     ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 11/14] drm/i915: Fix latency==0 handling for level 0 watermark on skl+ Ville Syrjala
2018-11-07 22:09   ` Rodrigo Vivi
2018-11-09  0:01   ` Matt Roper
2018-11-09 14:34     ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 12/14] drm/i915: Remove some useless zeroing on skl+ wm calculations Ville Syrjala
2018-11-07 18:43   ` [PATCH v2 " Ville Syrjala
2018-11-07 22:11   ` [PATCH " Rodrigo Vivi
2018-11-08 11:46     ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 13/14] drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+ Ville Syrjala
2018-11-07 18:44   ` [PATCH v2 " Ville Syrjala
2018-11-09  1:38     ` Matt Roper
2018-11-09 14:53       ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 14/14] drm/i915: Commit skl+ planes in an order that avoids ddb overlaps Ville Syrjala
2018-11-01 15:08 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully Patchwork
2018-11-01 16:04 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Program SKL+ watermarks/ddb more carefully (rev2) Patchwork
2018-11-01 16:09 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-01 16:26 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-01 18:13 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-07 19:01 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully (rev6) Patchwork

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